1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
/**
* @ingroup io68_mfp_devel
* @file io68/mfpemul.h
* @author Benjamin Gerard
* @date 1999/03/20
* @brief MFP-68901 emulator header.
*
*/
/* Copyright (C) 1998-2011 Benjamin Gerard */
/**
* @defgroup io68_mfp_devel MFP-68901 emulator
* @ingroup io68_devel
* @brief MFP-68901 (Atari-ST timers) emulator.
*
* Motorola Multi Function Peripheral is a multi purpose IO chip:
* - 8 bit parallele port.
* - Each bit has indepedant direction
* - Each bit can be a interruption source
* - 16 interruption sources
* - 4 universal timers (most part of this emulator)
* - Integrated serial interface.
* - 24 registers
*
* @p Registers
*
* - 00 @b GPIP (General Purpose I/O Interrupt port):
*
* Data Register for the 8 bit port for reading or writing.
* - bit#0 : Centronics (parrallele port)
* - bit#1 : Rs232 carrier detection
* - bit#1 : Rs232 CTS (clear to send)
* - bit#3 : Blitter
* - bit#4 : MIDI/Keyboard irq
* - bit#5 : FDC/DMA interrupt
* - bit#6 : Rs232 ring
* - bit#7 : Monochorm monitor detect
*
* - 01 @b AER (Active Edge Register):
*
* If port's bit are an interruption source this register
* selects interruption direction (0:descending 1:ascending).
*
* - 02 @b DDR (Data Direction Register):
*
* Port's bit direction select. 0 => input / 1 => output.
*
* - 03 @b IERA (Interrupt Enable Register A)
* - 04 @b IERB (Interrupt Enable Register B)
*
* Control the 16 interrupt source. 0 => Disable / 1 => Enable.
* - iera bit#7 : bit 7 of I/O port (highest priority)
* - iera bit#6 : bit 6 of I/O port
* - iera bit#5 : Timer A
* - iera bit#4 : Receive Buffer Full
* - iera bit#3 : Receive Error
* - iera bit#2 : Send Buffer Empty
* - iera bit#1 : Send Error
* - iera bit#0 : Timer B
* - ierb bit#7 : bit 5 of I/O port
* - ierb bit#6 : bit 4 of I/O port
* - ierb bit#5 : Timer C
* - ierb bit#4 : Timer D
* - ierb bit#3 : bit 3 of I/O port
* - ierb bit#2 : bit 2 of I/O port
* - ierb bit#1 : bit 1 of I/O port
* - ierb bit#0 : bit 0 of I/O port (lowest priority)
*
* - 05 @b IPRA (Interrupt Pending Register A)
* - 06 @b IPRB (Interrupt Pending Register B)
*
* Bit is set if an interruption occurs. Interruption have to
* be enable (see IER). If the MFP can produce an interruption
* vector the bit is cleared automatically at this moment. In
* the contrary the bit should be clear by writing this
* register (~1<<bit).
*
* - 07 @b ISRA (Interrupt In Service Register A)
* - 08 @b ISRB (Interrupt In Service Register B)
*
* In AEI mode the bit is cleared after the MFP has produced
* the interruptio n vector and a new event can trigger a new
* interruption while another is been proced by the CPU. In
* SEI mode the bit is set and the interrupt routine have to
* clear it by writing this register (~1<<bit). While ISR bit
* is 1 all less prioritary bit are unmasked (?). When IPR is
* cleared (vector has been produced) a similar interrupt may
* occur. Anyway this interruption and the one less prioritary
* can be process only if ISR is disabled.
*
* - 09 @b IMRA (Interrupt Mask Register A)
* - 0A @b IMRB (Interrupt Mask Register B)
*
* If register allow ennable interrupt event to occur but not
* to produce an interrupt if corresponding bit in IMR is
* clear.
*
* - 0B @b VR (Vector Register)
*
* - bit#0-2 : unknown ?
* - bit#3 : 0:AEI 1:SEI (automatic/software end of interrupt)
* - bit#4-7 : 4 MSB of interrupt vector
*
* - 0C @b TACR (Timer A Control Register)
* - 0D @b TBCR (Timer B Control Register)
* - 0E @b TCDCR (Timer C/D Control Register)
* - 0F @b TADR (Timer A Data Register)
* - 10 @b TBDR (Timer B Data Register)
* - 11 @b TCDR (Timer C Data Register)
* - 12 @b TDDR (Timer D Data Register)
*
* @see Programming MFP Timers
*
* - 13 @b SCR (Synchronous Character Register)
*
* Within a syncronous data transfer writing a specific value
* in this register use to start transfer as soon has it is
* recieved.
*
* - 14 UCR,USART (Control Register)
*
* USART is Universal Synchronous/Asynchronous Receiver/Transmitter.
* -bit#0 : unused
* -bit#1 : 0:odd 1:even
* -bit#2 : 0:parity-off 1:parity-on
* -bit#3-4 : Transfert mode
* -00 Start 0, Stop 0, Synchronous
* -01 Start 1, Stop 1, Asynchronous
* -10 Start 1, Stop 1.5, Asynchronous
* -11 Start 1, Stop 2, Asynchronous
* -bit#5-6 : Data Length (8-value)
* -bit#7 : 0 use Timer-C frequency directly (synchornous only),
* 1 use predivisor by 16
*
* - 15 RSR (Receiver Status Register)
*
* -bit#0 : Receiver Enable Bit
* -bit#1 : Synchronous Strip Enable (sync)
* -bit#2 : Match (sync)/Character in progress (async)
* -bit#3 : Found-Search(sync)/Break Detect(async)
* -bit#4 : Frame Error
* -bit#5 : Parity Error
* -bit#6 : Overrun Error
* -bit#7 : Buffer Full
*
* - 16 TSR (Tranmitter Status Register)
*
* -bit#0 : Transmitter Enable
* -bit#1 : High bit
* -bit#2 : Low bit
* -bit#3 : Break
* -bit#4 : End of transmission
* -bit#5 : Auto Turnaround
* -bit#6 : Underrun Error
* -bit#7 : Buffer Empty
*
* - 17 UDR,USART (DataRegister)
*
* Data to send (write access) or recieve (read access)
*
* @p Programming MFP Timers
*
* TODO
*
* @{
*/
/** @name MFP-68901 timers
* @{
*/
/** MFP-68901 timer identifers. */
;
/** bogo-cycle definition (1 Bogo = 192 "8mhz 68K" = 625 "mfp" cycle). */
typedef cycle68_t bogoc68_t;
/** Timer definition struct. */
typedef struct mfp_timer_def_t;
/** MFP-68901 timer struct. */
typedef struct
mfp_timer_t;
/** @} */
/** MFP register name. */
;
/** MFP-68901 emulator. */
typedef struct mfp_t;
/** @name MFP-68901 emulator library.
* @{
*/
/** MFP-68901 emulator library initialization.
*
* The mfp_init() function intialize MFP emulator library. It
* must be call prior to any other mfp_ function.
*
* @return error-code
* @retval 0 Success
* @retval -1 Failure
*/
int ;
/** MFP-68901 emulator library shutdown.
*/
void ;
/** @} */
/** @name MFP-68901 emulator functions.
* @{
*/
/** Setup mfp instance.
*
* @param mfp mfp emulator instance.
*
* @return Error-code
* @retval 0 Success
* @retval -1 Failure
*/
int ;
/** Cleanup mfp instance.
*
* @param mfp mfp emulator instance.
*
*/
void ;
/** Reset mfp instance.
*
* @param mfp mfp emulator instance.
*
* @return Error-code
* @retval 0 Success
* @retval -1 Failure
*/
int ;
/** Destroy mfp instance.
*
* @param mfp mfp emulator instance.
*/
void ;
/** @} */
/** MFP get Timer Data register.
*
* @param mfp mfp emulator instance.
* @param timer Timer-id (see mfp_timer_e).
* @param bogoc Current bogo-cycle.
*
* @return timer data register (TDR) value
*/
int68_t ;
/** MFP write Timer data register.
*
* @param mfp mfp emulator instance.
* @param timer Timer-id (see mfp_timer_e).
* @param v New timer data register (TDR) value.
* @param bogoc Current bogo-cycle.
*
*/
void ;
/** MFP write Timer control register.
*
* @param mfp mfp emulator instance.
* @param timer Timer-id (see mfp_timer_e).
* @param v New timer control register (TCR) value.
* @param bogoc Current bogo-cycle.
*
*/
void ;
/** Get MFP pending interruption.
*
* @param mfp mfp emulator instance.
* @param bogoc Current bogo-cycle.
*
* @return interruption info structure.
* @retval 0 no pending interruption.
*
*/
interrupt68_t * ;
/** Get cycle for the next MFP interruption.
*
* @param mfp mfp emulator instance.
*
* @return CPU-cycle when MFP will interrupt
* @retval IO68_NO_INT no interrupt will occur.
*/
bogoc68_t ;
/** Change cycle count base.
*
* @param mfp mfp emulator instance.
* @param bogoc New base for internal cycle counter.
*/
void ;
/**
* @}
*/
/* #ifndef _IO68_MFPEMUL_H_ */