mun_codegen 0.3.0

LLVM IR code generation for Mun
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---
source: crates/mun_codegen/src/test.rs
expression: "\n    pub fn assign_leftshift(a: u32, b: u32) -> u32 {\n        a <<= b;\n        a\n    }\n    pub fn assign_rightshift(a: u32, b: u32) -> u32 {\n        a >>= b;\n        a\n    }\n                        "
---
; == FILE IR (mod) =====================================
; ModuleID = 'mod'
source_filename = "mod"

%"mun_codegen::ir::types::TypeInfo" = type <{ [0 x i64], [16 x i8], [0 x i64], i8*, [0 x i64], i32, [0 x i64], i8, [3 x i8], %"mun_codegen::ir::types::TypeInfoData", [0 x i64] }>
%"mun_codegen::ir::types::TypeInfoData" = type <{ [0 x i8], i8, [39 x i8] }>

@global_type_table = external global [1 x %"mun_codegen::ir::types::TypeInfo"*]

define i32 @assign_leftshift(i32 %0, i32 %1) {
body:
  %left_shift = shl i32 %0, %1
  ret i32 %left_shift
}

define i32 @assign_rightshift(i32 %0, i32 %1) {
body:
  %right_shift = lshr i32 %0, %1
  ret i32 %right_shift
}

; == GROUP IR (mod) ====================================
; ModuleID = 'group_name'
source_filename = "group_name"

%"mun_codegen::ir::types::TypeInfo" = type <{ [0 x i64], [16 x i8], [0 x i64], i8*, [0 x i64], i32, [0 x i64], i8, [3 x i8], %"mun_codegen::ir::types::TypeInfoData", [0 x i64] }>
%"mun_codegen::ir::types::TypeInfoData" = type <{ [0 x i8], i8, [39 x i8] }>

@"type_info::<core::u32>::name" = private unnamed_addr constant [10 x i8] c"core::u32\00"
@"type_info::<core::u32>" = private unnamed_addr constant <{ [16 x i8], i8*, [48 x i8] }> <{ [16 x i8] c"daz5d\A6\BE\88\81=&Y\A1+\C6\1D", i8* getelementptr inbounds ([10 x i8], [10 x i8]* @"type_info::<core::u32>::name", i32 0, i32 0), [48 x i8] c" \00\00\00\04\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00" }>
@global_type_table = constant [1 x %"mun_codegen::ir::types::TypeInfo"*] [%"mun_codegen::ir::types::TypeInfo"* @"type_info::<core::u32>"]