1# [doc = "Register `MTPR` reader"] pub type R = crate :: R < MTPR_SPEC > ; # [doc = "Register `MTPR` writer"] pub type W = crate :: W < MTPR_SPEC > ; # [doc = "Field `MTPR_TPR` reader - Timer Period This field is used in the equation to configure SCL_PERIOD : SCL_PERIOD = (1 + TPR ) * (SCL_LP + SCL_HP ) * INT_CLK_PRD where: SCL_PRD is the SCL line period (I2C clock). TPR is the Timer Period register value (range of 1 to 127). SCL_LP is the SCL Low period (fixed at 6). SCL_HP is the SCL High period (fixed at 4). CLK_PRD is the functional clock period in ns."] pub type MTPR_TPR_R = crate :: FieldReader ; # [doc = "Field `MTPR_TPR` writer - Timer Period This field is used in the equation to configure SCL_PERIOD : SCL_PERIOD = (1 + TPR ) * (SCL_LP + SCL_HP ) * INT_CLK_PRD where: SCL_PRD is the SCL line period (I2C clock). TPR is the Timer Period register value (range of 1 to 127). SCL_LP is the SCL Low period (fixed at 6). SCL_HP is the SCL High period (fixed at 4). CLK_PRD is the functional clock period in ns."] pub type MTPR_TPR_W < 'a , REG , const O : u8 > = crate :: FieldWriter < 'a , REG , 7 , O > ; impl R { # [doc = "Bits 0:6 - Timer Period This field is used in the equation to configure SCL_PERIOD : SCL_PERIOD = (1 + TPR ) * (SCL_LP + SCL_HP ) * INT_CLK_PRD where: SCL_PRD is the SCL line period (I2C clock). TPR is the Timer Period register value (range of 1 to 127). SCL_LP is the SCL Low period (fixed at 6). SCL_HP is the SCL High period (fixed at 4). CLK_PRD is the functional clock period in ns."] # [inline (always)] pub fn mtpr_tpr (& self) -> MTPR_TPR_R { MTPR_TPR_R :: new ((self . bits & 0x7f) as u8) } } impl W { # [doc = "Bits 0:6 - Timer Period This field is used in the equation to configure SCL_PERIOD : SCL_PERIOD = (1 + TPR ) * (SCL_LP + SCL_HP ) * INT_CLK_PRD where: SCL_PRD is the SCL line period (I2C clock). TPR is the Timer Period register value (range of 1 to 127). SCL_LP is the SCL Low period (fixed at 6). SCL_HP is the SCL High period (fixed at 4). CLK_PRD is the functional clock period in ns."] # [inline (always)] # [must_use] pub fn mtpr_tpr (& mut self) -> MTPR_TPR_W < MTPR_SPEC , 0 > { MTPR_TPR_W :: new (self) } # [doc = r" Writes raw bits to the register."] # [doc = r""] # [doc = r" # Safety"] # [doc = r""] # [doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . bits = bits ; self } } # [doc = "I2C Master Timer Period\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mtpr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mtpr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MTPR_SPEC ; impl crate :: RegisterSpec for MTPR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [`mtpr::R`](R) reader structure"] impl crate :: Readable for MTPR_SPEC { } # [doc = "`write(|w| ..)` method takes [`mtpr::W`](W) writer structure"] impl crate :: Writable for MTPR_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP : Self :: Ux = 0 ; const ONE_TO_MODIFY_FIELDS_BITMAP : Self :: Ux = 0 ; } # [doc = "`reset()` method sets MTPR to value 0x01"] impl crate :: Resettable for MTPR_SPEC { const RESET_VALUE : Self :: Ux = 0x01 ; }