1#[doc = r"Value read from the register"]
2pub struct R {
3 bits: u8,
4}
5#[doc = r"Value to write to the register"]
6pub struct W {
7 bits: u8,
8}
9impl super::RXCSRL5 {
10 #[doc = r"Modifies the contents of the register"]
11 #[inline(always)]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 self.register.set(f(&R { bits }, &mut W { bits }).bits);
18 }
19 #[doc = r"Reads the contents of the register"]
20 #[inline(always)]
21 pub fn read(&self) -> R {
22 R {
23 bits: self.register.get(),
24 }
25 }
26 #[doc = r"Writes to the register"]
27 #[inline(always)]
28 pub fn write<F>(&self, f: F)
29 where
30 F: FnOnce(&mut W) -> &mut W,
31 {
32 self.register.set(
33 f(&mut W {
34 bits: Self::reset_value(),
35 })
36 .bits,
37 );
38 }
39 #[doc = r"Reset value of the register"]
40 #[inline(always)]
41 pub const fn reset_value() -> u8 {
42 0
43 }
44 #[doc = r"Writes the reset value to the register"]
45 #[inline(always)]
46 pub fn reset(&self) {
47 self.register.set(Self::reset_value())
48 }
49}
50#[doc = r"Value of the field"]
51pub struct USB_RXCSRL5_RXRDYR {
52 bits: bool,
53}
54impl USB_RXCSRL5_RXRDYR {
55 #[doc = r"Value of the field as raw bits"]
56 #[inline(always)]
57 pub fn bit(&self) -> bool {
58 self.bits
59 }
60 #[doc = r"Returns `true` if the bit is clear (0)"]
61 #[inline(always)]
62 pub fn bit_is_clear(&self) -> bool {
63 !self.bit()
64 }
65 #[doc = r"Returns `true` if the bit is set (1)"]
66 #[inline(always)]
67 pub fn bit_is_set(&self) -> bool {
68 self.bit()
69 }
70}
71#[doc = r"Proxy"]
72pub struct _USB_RXCSRL5_RXRDYW<'a> {
73 w: &'a mut W,
74}
75impl<'a> _USB_RXCSRL5_RXRDYW<'a> {
76 #[doc = r"Sets the field bit"]
77 #[inline(always)]
78 pub fn set_bit(self) -> &'a mut W {
79 self.bit(true)
80 }
81 #[doc = r"Clears the field bit"]
82 #[inline(always)]
83 pub fn clear_bit(self) -> &'a mut W {
84 self.bit(false)
85 }
86 #[doc = r"Writes raw bits to the field"]
87 #[inline(always)]
88 pub fn bit(self, value: bool) -> &'a mut W {
89 self.w.bits &= !(1 << 0);
90 self.w.bits |= ((value as u8) & 1) << 0;
91 self.w
92 }
93}
94#[doc = r"Value of the field"]
95pub struct USB_RXCSRL5_FULLR {
96 bits: bool,
97}
98impl USB_RXCSRL5_FULLR {
99 #[doc = r"Value of the field as raw bits"]
100 #[inline(always)]
101 pub fn bit(&self) -> bool {
102 self.bits
103 }
104 #[doc = r"Returns `true` if the bit is clear (0)"]
105 #[inline(always)]
106 pub fn bit_is_clear(&self) -> bool {
107 !self.bit()
108 }
109 #[doc = r"Returns `true` if the bit is set (1)"]
110 #[inline(always)]
111 pub fn bit_is_set(&self) -> bool {
112 self.bit()
113 }
114}
115#[doc = r"Proxy"]
116pub struct _USB_RXCSRL5_FULLW<'a> {
117 w: &'a mut W,
118}
119impl<'a> _USB_RXCSRL5_FULLW<'a> {
120 #[doc = r"Sets the field bit"]
121 #[inline(always)]
122 pub fn set_bit(self) -> &'a mut W {
123 self.bit(true)
124 }
125 #[doc = r"Clears the field bit"]
126 #[inline(always)]
127 pub fn clear_bit(self) -> &'a mut W {
128 self.bit(false)
129 }
130 #[doc = r"Writes raw bits to the field"]
131 #[inline(always)]
132 pub fn bit(self, value: bool) -> &'a mut W {
133 self.w.bits &= !(1 << 1);
134 self.w.bits |= ((value as u8) & 1) << 1;
135 self.w
136 }
137}
138#[doc = r"Value of the field"]
139pub struct USB_RXCSRL5_OVERR {
140 bits: bool,
141}
142impl USB_RXCSRL5_OVERR {
143 #[doc = r"Value of the field as raw bits"]
144 #[inline(always)]
145 pub fn bit(&self) -> bool {
146 self.bits
147 }
148 #[doc = r"Returns `true` if the bit is clear (0)"]
149 #[inline(always)]
150 pub fn bit_is_clear(&self) -> bool {
151 !self.bit()
152 }
153 #[doc = r"Returns `true` if the bit is set (1)"]
154 #[inline(always)]
155 pub fn bit_is_set(&self) -> bool {
156 self.bit()
157 }
158}
159#[doc = r"Proxy"]
160pub struct _USB_RXCSRL5_OVERW<'a> {
161 w: &'a mut W,
162}
163impl<'a> _USB_RXCSRL5_OVERW<'a> {
164 #[doc = r"Sets the field bit"]
165 #[inline(always)]
166 pub fn set_bit(self) -> &'a mut W {
167 self.bit(true)
168 }
169 #[doc = r"Clears the field bit"]
170 #[inline(always)]
171 pub fn clear_bit(self) -> &'a mut W {
172 self.bit(false)
173 }
174 #[doc = r"Writes raw bits to the field"]
175 #[inline(always)]
176 pub fn bit(self, value: bool) -> &'a mut W {
177 self.w.bits &= !(1 << 2);
178 self.w.bits |= ((value as u8) & 1) << 2;
179 self.w
180 }
181}
182#[doc = r"Value of the field"]
183pub struct USB_RXCSRL5_DATAERRR {
184 bits: bool,
185}
186impl USB_RXCSRL5_DATAERRR {
187 #[doc = r"Value of the field as raw bits"]
188 #[inline(always)]
189 pub fn bit(&self) -> bool {
190 self.bits
191 }
192 #[doc = r"Returns `true` if the bit is clear (0)"]
193 #[inline(always)]
194 pub fn bit_is_clear(&self) -> bool {
195 !self.bit()
196 }
197 #[doc = r"Returns `true` if the bit is set (1)"]
198 #[inline(always)]
199 pub fn bit_is_set(&self) -> bool {
200 self.bit()
201 }
202}
203#[doc = r"Proxy"]
204pub struct _USB_RXCSRL5_DATAERRW<'a> {
205 w: &'a mut W,
206}
207impl<'a> _USB_RXCSRL5_DATAERRW<'a> {
208 #[doc = r"Sets the field bit"]
209 #[inline(always)]
210 pub fn set_bit(self) -> &'a mut W {
211 self.bit(true)
212 }
213 #[doc = r"Clears the field bit"]
214 #[inline(always)]
215 pub fn clear_bit(self) -> &'a mut W {
216 self.bit(false)
217 }
218 #[doc = r"Writes raw bits to the field"]
219 #[inline(always)]
220 pub fn bit(self, value: bool) -> &'a mut W {
221 self.w.bits &= !(1 << 3);
222 self.w.bits |= ((value as u8) & 1) << 3;
223 self.w
224 }
225}
226#[doc = r"Value of the field"]
227pub struct USB_RXCSRL5_FLUSHR {
228 bits: bool,
229}
230impl USB_RXCSRL5_FLUSHR {
231 #[doc = r"Value of the field as raw bits"]
232 #[inline(always)]
233 pub fn bit(&self) -> bool {
234 self.bits
235 }
236 #[doc = r"Returns `true` if the bit is clear (0)"]
237 #[inline(always)]
238 pub fn bit_is_clear(&self) -> bool {
239 !self.bit()
240 }
241 #[doc = r"Returns `true` if the bit is set (1)"]
242 #[inline(always)]
243 pub fn bit_is_set(&self) -> bool {
244 self.bit()
245 }
246}
247#[doc = r"Proxy"]
248pub struct _USB_RXCSRL5_FLUSHW<'a> {
249 w: &'a mut W,
250}
251impl<'a> _USB_RXCSRL5_FLUSHW<'a> {
252 #[doc = r"Sets the field bit"]
253 #[inline(always)]
254 pub fn set_bit(self) -> &'a mut W {
255 self.bit(true)
256 }
257 #[doc = r"Clears the field bit"]
258 #[inline(always)]
259 pub fn clear_bit(self) -> &'a mut W {
260 self.bit(false)
261 }
262 #[doc = r"Writes raw bits to the field"]
263 #[inline(always)]
264 pub fn bit(self, value: bool) -> &'a mut W {
265 self.w.bits &= !(1 << 4);
266 self.w.bits |= ((value as u8) & 1) << 4;
267 self.w
268 }
269}
270#[doc = r"Value of the field"]
271pub struct USB_RXCSRL5_STALLR {
272 bits: bool,
273}
274impl USB_RXCSRL5_STALLR {
275 #[doc = r"Value of the field as raw bits"]
276 #[inline(always)]
277 pub fn bit(&self) -> bool {
278 self.bits
279 }
280 #[doc = r"Returns `true` if the bit is clear (0)"]
281 #[inline(always)]
282 pub fn bit_is_clear(&self) -> bool {
283 !self.bit()
284 }
285 #[doc = r"Returns `true` if the bit is set (1)"]
286 #[inline(always)]
287 pub fn bit_is_set(&self) -> bool {
288 self.bit()
289 }
290}
291#[doc = r"Proxy"]
292pub struct _USB_RXCSRL5_STALLW<'a> {
293 w: &'a mut W,
294}
295impl<'a> _USB_RXCSRL5_STALLW<'a> {
296 #[doc = r"Sets the field bit"]
297 #[inline(always)]
298 pub fn set_bit(self) -> &'a mut W {
299 self.bit(true)
300 }
301 #[doc = r"Clears the field bit"]
302 #[inline(always)]
303 pub fn clear_bit(self) -> &'a mut W {
304 self.bit(false)
305 }
306 #[doc = r"Writes raw bits to the field"]
307 #[inline(always)]
308 pub fn bit(self, value: bool) -> &'a mut W {
309 self.w.bits &= !(1 << 5);
310 self.w.bits |= ((value as u8) & 1) << 5;
311 self.w
312 }
313}
314#[doc = r"Value of the field"]
315pub struct USB_RXCSRL5_STALLEDR {
316 bits: bool,
317}
318impl USB_RXCSRL5_STALLEDR {
319 #[doc = r"Value of the field as raw bits"]
320 #[inline(always)]
321 pub fn bit(&self) -> bool {
322 self.bits
323 }
324 #[doc = r"Returns `true` if the bit is clear (0)"]
325 #[inline(always)]
326 pub fn bit_is_clear(&self) -> bool {
327 !self.bit()
328 }
329 #[doc = r"Returns `true` if the bit is set (1)"]
330 #[inline(always)]
331 pub fn bit_is_set(&self) -> bool {
332 self.bit()
333 }
334}
335#[doc = r"Proxy"]
336pub struct _USB_RXCSRL5_STALLEDW<'a> {
337 w: &'a mut W,
338}
339impl<'a> _USB_RXCSRL5_STALLEDW<'a> {
340 #[doc = r"Sets the field bit"]
341 #[inline(always)]
342 pub fn set_bit(self) -> &'a mut W {
343 self.bit(true)
344 }
345 #[doc = r"Clears the field bit"]
346 #[inline(always)]
347 pub fn clear_bit(self) -> &'a mut W {
348 self.bit(false)
349 }
350 #[doc = r"Writes raw bits to the field"]
351 #[inline(always)]
352 pub fn bit(self, value: bool) -> &'a mut W {
353 self.w.bits &= !(1 << 6);
354 self.w.bits |= ((value as u8) & 1) << 6;
355 self.w
356 }
357}
358#[doc = r"Value of the field"]
359pub struct USB_RXCSRL5_CLRDTR {
360 bits: bool,
361}
362impl USB_RXCSRL5_CLRDTR {
363 #[doc = r"Value of the field as raw bits"]
364 #[inline(always)]
365 pub fn bit(&self) -> bool {
366 self.bits
367 }
368 #[doc = r"Returns `true` if the bit is clear (0)"]
369 #[inline(always)]
370 pub fn bit_is_clear(&self) -> bool {
371 !self.bit()
372 }
373 #[doc = r"Returns `true` if the bit is set (1)"]
374 #[inline(always)]
375 pub fn bit_is_set(&self) -> bool {
376 self.bit()
377 }
378}
379#[doc = r"Proxy"]
380pub struct _USB_RXCSRL5_CLRDTW<'a> {
381 w: &'a mut W,
382}
383impl<'a> _USB_RXCSRL5_CLRDTW<'a> {
384 #[doc = r"Sets the field bit"]
385 #[inline(always)]
386 pub fn set_bit(self) -> &'a mut W {
387 self.bit(true)
388 }
389 #[doc = r"Clears the field bit"]
390 #[inline(always)]
391 pub fn clear_bit(self) -> &'a mut W {
392 self.bit(false)
393 }
394 #[doc = r"Writes raw bits to the field"]
395 #[inline(always)]
396 pub fn bit(self, value: bool) -> &'a mut W {
397 self.w.bits &= !(1 << 7);
398 self.w.bits |= ((value as u8) & 1) << 7;
399 self.w
400 }
401}
402#[doc = r"Value of the field"]
403pub struct USB_RXCSRL5_ERRORR {
404 bits: bool,
405}
406impl USB_RXCSRL5_ERRORR {
407 #[doc = r"Value of the field as raw bits"]
408 #[inline(always)]
409 pub fn bit(&self) -> bool {
410 self.bits
411 }
412 #[doc = r"Returns `true` if the bit is clear (0)"]
413 #[inline(always)]
414 pub fn bit_is_clear(&self) -> bool {
415 !self.bit()
416 }
417 #[doc = r"Returns `true` if the bit is set (1)"]
418 #[inline(always)]
419 pub fn bit_is_set(&self) -> bool {
420 self.bit()
421 }
422}
423#[doc = r"Proxy"]
424pub struct _USB_RXCSRL5_ERRORW<'a> {
425 w: &'a mut W,
426}
427impl<'a> _USB_RXCSRL5_ERRORW<'a> {
428 #[doc = r"Sets the field bit"]
429 #[inline(always)]
430 pub fn set_bit(self) -> &'a mut W {
431 self.bit(true)
432 }
433 #[doc = r"Clears the field bit"]
434 #[inline(always)]
435 pub fn clear_bit(self) -> &'a mut W {
436 self.bit(false)
437 }
438 #[doc = r"Writes raw bits to the field"]
439 #[inline(always)]
440 pub fn bit(self, value: bool) -> &'a mut W {
441 self.w.bits &= !(1 << 2);
442 self.w.bits |= ((value as u8) & 1) << 2;
443 self.w
444 }
445}
446#[doc = r"Value of the field"]
447pub struct USB_RXCSRL5_NAKTOR {
448 bits: bool,
449}
450impl USB_RXCSRL5_NAKTOR {
451 #[doc = r"Value of the field as raw bits"]
452 #[inline(always)]
453 pub fn bit(&self) -> bool {
454 self.bits
455 }
456 #[doc = r"Returns `true` if the bit is clear (0)"]
457 #[inline(always)]
458 pub fn bit_is_clear(&self) -> bool {
459 !self.bit()
460 }
461 #[doc = r"Returns `true` if the bit is set (1)"]
462 #[inline(always)]
463 pub fn bit_is_set(&self) -> bool {
464 self.bit()
465 }
466}
467#[doc = r"Proxy"]
468pub struct _USB_RXCSRL5_NAKTOW<'a> {
469 w: &'a mut W,
470}
471impl<'a> _USB_RXCSRL5_NAKTOW<'a> {
472 #[doc = r"Sets the field bit"]
473 #[inline(always)]
474 pub fn set_bit(self) -> &'a mut W {
475 self.bit(true)
476 }
477 #[doc = r"Clears the field bit"]
478 #[inline(always)]
479 pub fn clear_bit(self) -> &'a mut W {
480 self.bit(false)
481 }
482 #[doc = r"Writes raw bits to the field"]
483 #[inline(always)]
484 pub fn bit(self, value: bool) -> &'a mut W {
485 self.w.bits &= !(1 << 3);
486 self.w.bits |= ((value as u8) & 1) << 3;
487 self.w
488 }
489}
490#[doc = r"Value of the field"]
491pub struct USB_RXCSRL5_REQPKTR {
492 bits: bool,
493}
494impl USB_RXCSRL5_REQPKTR {
495 #[doc = r"Value of the field as raw bits"]
496 #[inline(always)]
497 pub fn bit(&self) -> bool {
498 self.bits
499 }
500 #[doc = r"Returns `true` if the bit is clear (0)"]
501 #[inline(always)]
502 pub fn bit_is_clear(&self) -> bool {
503 !self.bit()
504 }
505 #[doc = r"Returns `true` if the bit is set (1)"]
506 #[inline(always)]
507 pub fn bit_is_set(&self) -> bool {
508 self.bit()
509 }
510}
511#[doc = r"Proxy"]
512pub struct _USB_RXCSRL5_REQPKTW<'a> {
513 w: &'a mut W,
514}
515impl<'a> _USB_RXCSRL5_REQPKTW<'a> {
516 #[doc = r"Sets the field bit"]
517 #[inline(always)]
518 pub fn set_bit(self) -> &'a mut W {
519 self.bit(true)
520 }
521 #[doc = r"Clears the field bit"]
522 #[inline(always)]
523 pub fn clear_bit(self) -> &'a mut W {
524 self.bit(false)
525 }
526 #[doc = r"Writes raw bits to the field"]
527 #[inline(always)]
528 pub fn bit(self, value: bool) -> &'a mut W {
529 self.w.bits &= !(1 << 5);
530 self.w.bits |= ((value as u8) & 1) << 5;
531 self.w
532 }
533}
534impl R {
535 #[doc = r"Value of the register as raw bits"]
536 #[inline(always)]
537 pub fn bits(&self) -> u8 {
538 self.bits
539 }
540 #[doc = "Bit 0 - Receive Packet Ready"]
541 #[inline(always)]
542 pub fn usb_rxcsrl5_rxrdy(&self) -> USB_RXCSRL5_RXRDYR {
543 let bits = ((self.bits >> 0) & 1) != 0;
544 USB_RXCSRL5_RXRDYR { bits }
545 }
546 #[doc = "Bit 1 - FIFO Full"]
547 #[inline(always)]
548 pub fn usb_rxcsrl5_full(&self) -> USB_RXCSRL5_FULLR {
549 let bits = ((self.bits >> 1) & 1) != 0;
550 USB_RXCSRL5_FULLR { bits }
551 }
552 #[doc = "Bit 2 - Overrun"]
553 #[inline(always)]
554 pub fn usb_rxcsrl5_over(&self) -> USB_RXCSRL5_OVERR {
555 let bits = ((self.bits >> 2) & 1) != 0;
556 USB_RXCSRL5_OVERR { bits }
557 }
558 #[doc = "Bit 3 - Data Error"]
559 #[inline(always)]
560 pub fn usb_rxcsrl5_dataerr(&self) -> USB_RXCSRL5_DATAERRR {
561 let bits = ((self.bits >> 3) & 1) != 0;
562 USB_RXCSRL5_DATAERRR { bits }
563 }
564 #[doc = "Bit 4 - Flush FIFO"]
565 #[inline(always)]
566 pub fn usb_rxcsrl5_flush(&self) -> USB_RXCSRL5_FLUSHR {
567 let bits = ((self.bits >> 4) & 1) != 0;
568 USB_RXCSRL5_FLUSHR { bits }
569 }
570 #[doc = "Bit 5 - Send STALL"]
571 #[inline(always)]
572 pub fn usb_rxcsrl5_stall(&self) -> USB_RXCSRL5_STALLR {
573 let bits = ((self.bits >> 5) & 1) != 0;
574 USB_RXCSRL5_STALLR { bits }
575 }
576 #[doc = "Bit 6 - Endpoint Stalled"]
577 #[inline(always)]
578 pub fn usb_rxcsrl5_stalled(&self) -> USB_RXCSRL5_STALLEDR {
579 let bits = ((self.bits >> 6) & 1) != 0;
580 USB_RXCSRL5_STALLEDR { bits }
581 }
582 #[doc = "Bit 7 - Clear Data Toggle"]
583 #[inline(always)]
584 pub fn usb_rxcsrl5_clrdt(&self) -> USB_RXCSRL5_CLRDTR {
585 let bits = ((self.bits >> 7) & 1) != 0;
586 USB_RXCSRL5_CLRDTR { bits }
587 }
588 #[doc = "Bit 2 - Error"]
589 #[inline(always)]
590 pub fn usb_rxcsrl5_error(&self) -> USB_RXCSRL5_ERRORR {
591 let bits = ((self.bits >> 2) & 1) != 0;
592 USB_RXCSRL5_ERRORR { bits }
593 }
594 #[doc = "Bit 3 - NAK Timeout"]
595 #[inline(always)]
596 pub fn usb_rxcsrl5_nakto(&self) -> USB_RXCSRL5_NAKTOR {
597 let bits = ((self.bits >> 3) & 1) != 0;
598 USB_RXCSRL5_NAKTOR { bits }
599 }
600 #[doc = "Bit 5 - Request Packet"]
601 #[inline(always)]
602 pub fn usb_rxcsrl5_reqpkt(&self) -> USB_RXCSRL5_REQPKTR {
603 let bits = ((self.bits >> 5) & 1) != 0;
604 USB_RXCSRL5_REQPKTR { bits }
605 }
606}
607impl W {
608 #[doc = r"Writes raw bits to the register"]
609 #[inline(always)]
610 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
611 self.bits = bits;
612 self
613 }
614 #[doc = "Bit 0 - Receive Packet Ready"]
615 #[inline(always)]
616 pub fn usb_rxcsrl5_rxrdy(&mut self) -> _USB_RXCSRL5_RXRDYW {
617 _USB_RXCSRL5_RXRDYW { w: self }
618 }
619 #[doc = "Bit 1 - FIFO Full"]
620 #[inline(always)]
621 pub fn usb_rxcsrl5_full(&mut self) -> _USB_RXCSRL5_FULLW {
622 _USB_RXCSRL5_FULLW { w: self }
623 }
624 #[doc = "Bit 2 - Overrun"]
625 #[inline(always)]
626 pub fn usb_rxcsrl5_over(&mut self) -> _USB_RXCSRL5_OVERW {
627 _USB_RXCSRL5_OVERW { w: self }
628 }
629 #[doc = "Bit 3 - Data Error"]
630 #[inline(always)]
631 pub fn usb_rxcsrl5_dataerr(&mut self) -> _USB_RXCSRL5_DATAERRW {
632 _USB_RXCSRL5_DATAERRW { w: self }
633 }
634 #[doc = "Bit 4 - Flush FIFO"]
635 #[inline(always)]
636 pub fn usb_rxcsrl5_flush(&mut self) -> _USB_RXCSRL5_FLUSHW {
637 _USB_RXCSRL5_FLUSHW { w: self }
638 }
639 #[doc = "Bit 5 - Send STALL"]
640 #[inline(always)]
641 pub fn usb_rxcsrl5_stall(&mut self) -> _USB_RXCSRL5_STALLW {
642 _USB_RXCSRL5_STALLW { w: self }
643 }
644 #[doc = "Bit 6 - Endpoint Stalled"]
645 #[inline(always)]
646 pub fn usb_rxcsrl5_stalled(&mut self) -> _USB_RXCSRL5_STALLEDW {
647 _USB_RXCSRL5_STALLEDW { w: self }
648 }
649 #[doc = "Bit 7 - Clear Data Toggle"]
650 #[inline(always)]
651 pub fn usb_rxcsrl5_clrdt(&mut self) -> _USB_RXCSRL5_CLRDTW {
652 _USB_RXCSRL5_CLRDTW { w: self }
653 }
654 #[doc = "Bit 2 - Error"]
655 #[inline(always)]
656 pub fn usb_rxcsrl5_error(&mut self) -> _USB_RXCSRL5_ERRORW {
657 _USB_RXCSRL5_ERRORW { w: self }
658 }
659 #[doc = "Bit 3 - NAK Timeout"]
660 #[inline(always)]
661 pub fn usb_rxcsrl5_nakto(&mut self) -> _USB_RXCSRL5_NAKTOW {
662 _USB_RXCSRL5_NAKTOW { w: self }
663 }
664 #[doc = "Bit 5 - Request Packet"]
665 #[inline(always)]
666 pub fn usb_rxcsrl5_reqpkt(&mut self) -> _USB_RXCSRL5_REQPKTW {
667 _USB_RXCSRL5_REQPKTW { w: self }
668 }
669}