msp432e4/shamd5/
sysconfig.rs

1#[doc = r"Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r"Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::SYSCONFIG {
10    #[doc = r"Modifies the contents of the register"]
11    #[inline(always)]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        self.register.set(f(&R { bits }, &mut W { bits }).bits);
18    }
19    #[doc = r"Reads the contents of the register"]
20    #[inline(always)]
21    pub fn read(&self) -> R {
22        R {
23            bits: self.register.get(),
24        }
25    }
26    #[doc = r"Writes to the register"]
27    #[inline(always)]
28    pub fn write<F>(&self, f: F)
29    where
30        F: FnOnce(&mut W) -> &mut W,
31    {
32        self.register.set(
33            f(&mut W {
34                bits: Self::reset_value(),
35            })
36            .bits,
37        );
38    }
39    #[doc = r"Reset value of the register"]
40    #[inline(always)]
41    pub const fn reset_value() -> u32 {
42        0
43    }
44    #[doc = r"Writes the reset value to the register"]
45    #[inline(always)]
46    pub fn reset(&self) {
47        self.register.set(Self::reset_value())
48    }
49}
50#[doc = r"Value of the field"]
51pub struct SHAMD5_SYSCONFIG_SOFTRESETR {
52    bits: bool,
53}
54impl SHAMD5_SYSCONFIG_SOFTRESETR {
55    #[doc = r"Value of the field as raw bits"]
56    #[inline(always)]
57    pub fn bit(&self) -> bool {
58        self.bits
59    }
60    #[doc = r"Returns `true` if the bit is clear (0)"]
61    #[inline(always)]
62    pub fn bit_is_clear(&self) -> bool {
63        !self.bit()
64    }
65    #[doc = r"Returns `true` if the bit is set (1)"]
66    #[inline(always)]
67    pub fn bit_is_set(&self) -> bool {
68        self.bit()
69    }
70}
71#[doc = r"Proxy"]
72pub struct _SHAMD5_SYSCONFIG_SOFTRESETW<'a> {
73    w: &'a mut W,
74}
75impl<'a> _SHAMD5_SYSCONFIG_SOFTRESETW<'a> {
76    #[doc = r"Sets the field bit"]
77    #[inline(always)]
78    pub fn set_bit(self) -> &'a mut W {
79        self.bit(true)
80    }
81    #[doc = r"Clears the field bit"]
82    #[inline(always)]
83    pub fn clear_bit(self) -> &'a mut W {
84        self.bit(false)
85    }
86    #[doc = r"Writes raw bits to the field"]
87    #[inline(always)]
88    pub fn bit(self, value: bool) -> &'a mut W {
89        self.w.bits &= !(1 << 1);
90        self.w.bits |= ((value as u32) & 1) << 1;
91        self.w
92    }
93}
94#[doc = r"Value of the field"]
95pub struct SHAMD5_SYSCONFIG_IT_ENR {
96    bits: bool,
97}
98impl SHAMD5_SYSCONFIG_IT_ENR {
99    #[doc = r"Value of the field as raw bits"]
100    #[inline(always)]
101    pub fn bit(&self) -> bool {
102        self.bits
103    }
104    #[doc = r"Returns `true` if the bit is clear (0)"]
105    #[inline(always)]
106    pub fn bit_is_clear(&self) -> bool {
107        !self.bit()
108    }
109    #[doc = r"Returns `true` if the bit is set (1)"]
110    #[inline(always)]
111    pub fn bit_is_set(&self) -> bool {
112        self.bit()
113    }
114}
115#[doc = r"Proxy"]
116pub struct _SHAMD5_SYSCONFIG_IT_ENW<'a> {
117    w: &'a mut W,
118}
119impl<'a> _SHAMD5_SYSCONFIG_IT_ENW<'a> {
120    #[doc = r"Sets the field bit"]
121    #[inline(always)]
122    pub fn set_bit(self) -> &'a mut W {
123        self.bit(true)
124    }
125    #[doc = r"Clears the field bit"]
126    #[inline(always)]
127    pub fn clear_bit(self) -> &'a mut W {
128        self.bit(false)
129    }
130    #[doc = r"Writes raw bits to the field"]
131    #[inline(always)]
132    pub fn bit(self, value: bool) -> &'a mut W {
133        self.w.bits &= !(1 << 2);
134        self.w.bits |= ((value as u32) & 1) << 2;
135        self.w
136    }
137}
138#[doc = r"Value of the field"]
139pub struct SHAMD5_SYSCONFIG_DMA_ENR {
140    bits: bool,
141}
142impl SHAMD5_SYSCONFIG_DMA_ENR {
143    #[doc = r"Value of the field as raw bits"]
144    #[inline(always)]
145    pub fn bit(&self) -> bool {
146        self.bits
147    }
148    #[doc = r"Returns `true` if the bit is clear (0)"]
149    #[inline(always)]
150    pub fn bit_is_clear(&self) -> bool {
151        !self.bit()
152    }
153    #[doc = r"Returns `true` if the bit is set (1)"]
154    #[inline(always)]
155    pub fn bit_is_set(&self) -> bool {
156        self.bit()
157    }
158}
159#[doc = r"Proxy"]
160pub struct _SHAMD5_SYSCONFIG_DMA_ENW<'a> {
161    w: &'a mut W,
162}
163impl<'a> _SHAMD5_SYSCONFIG_DMA_ENW<'a> {
164    #[doc = r"Sets the field bit"]
165    #[inline(always)]
166    pub fn set_bit(self) -> &'a mut W {
167        self.bit(true)
168    }
169    #[doc = r"Clears the field bit"]
170    #[inline(always)]
171    pub fn clear_bit(self) -> &'a mut W {
172        self.bit(false)
173    }
174    #[doc = r"Writes raw bits to the field"]
175    #[inline(always)]
176    pub fn bit(self, value: bool) -> &'a mut W {
177        self.w.bits &= !(1 << 3);
178        self.w.bits |= ((value as u32) & 1) << 3;
179        self.w
180    }
181}
182#[doc = "Possible values of the field `SHAMD5_SYSCONFIG_SIDLE`"]
183#[derive(Clone, Copy, Debug, PartialEq)]
184pub enum SHAMD5_SYSCONFIG_SIDLER {
185    #[doc = "Force-idle mode"]
186    SHAMD5_SYSCONFIG_SIDLE_FORCE,
187    #[doc = r"Reserved"]
188    _Reserved(u8),
189}
190impl SHAMD5_SYSCONFIG_SIDLER {
191    #[doc = r"Value of the field as raw bits"]
192    #[inline(always)]
193    pub fn bits(&self) -> u8 {
194        match *self {
195            SHAMD5_SYSCONFIG_SIDLER::SHAMD5_SYSCONFIG_SIDLE_FORCE => 0,
196            SHAMD5_SYSCONFIG_SIDLER::_Reserved(bits) => bits,
197        }
198    }
199    #[allow(missing_docs)]
200    #[doc(hidden)]
201    #[inline(always)]
202    pub fn _from(value: u8) -> SHAMD5_SYSCONFIG_SIDLER {
203        match value {
204            0 => SHAMD5_SYSCONFIG_SIDLER::SHAMD5_SYSCONFIG_SIDLE_FORCE,
205            i => SHAMD5_SYSCONFIG_SIDLER::_Reserved(i),
206        }
207    }
208    #[doc = "Checks if the value of the field is `SHAMD5_SYSCONFIG_SIDLE_FORCE`"]
209    #[inline(always)]
210    pub fn is_shamd5_sysconfig_sidle_force(&self) -> bool {
211        *self == SHAMD5_SYSCONFIG_SIDLER::SHAMD5_SYSCONFIG_SIDLE_FORCE
212    }
213}
214#[doc = "Values that can be written to the field `SHAMD5_SYSCONFIG_SIDLE`"]
215#[derive(Clone, Copy, Debug, PartialEq)]
216pub enum SHAMD5_SYSCONFIG_SIDLEW {
217    #[doc = "Force-idle mode"]
218    SHAMD5_SYSCONFIG_SIDLE_FORCE,
219}
220impl SHAMD5_SYSCONFIG_SIDLEW {
221    #[allow(missing_docs)]
222    #[doc(hidden)]
223    #[inline(always)]
224    pub fn _bits(&self) -> u8 {
225        match *self {
226            SHAMD5_SYSCONFIG_SIDLEW::SHAMD5_SYSCONFIG_SIDLE_FORCE => 0,
227        }
228    }
229}
230#[doc = r"Proxy"]
231pub struct _SHAMD5_SYSCONFIG_SIDLEW<'a> {
232    w: &'a mut W,
233}
234impl<'a> _SHAMD5_SYSCONFIG_SIDLEW<'a> {
235    #[doc = r"Writes `variant` to the field"]
236    #[inline(always)]
237    pub fn variant(self, variant: SHAMD5_SYSCONFIG_SIDLEW) -> &'a mut W {
238        unsafe { self.bits(variant._bits()) }
239    }
240    #[doc = "Force-idle mode"]
241    #[inline(always)]
242    pub fn shamd5_sysconfig_sidle_force(self) -> &'a mut W {
243        self.variant(SHAMD5_SYSCONFIG_SIDLEW::SHAMD5_SYSCONFIG_SIDLE_FORCE)
244    }
245    #[doc = r"Writes raw bits to the field"]
246    #[inline(always)]
247    pub unsafe fn bits(self, value: u8) -> &'a mut W {
248        self.w.bits &= !(3 << 4);
249        self.w.bits |= ((value as u32) & 3) << 4;
250        self.w
251    }
252}
253#[doc = r"Value of the field"]
254pub struct SHAMD5_SYSCONFIG_SADVANCEDR {
255    bits: bool,
256}
257impl SHAMD5_SYSCONFIG_SADVANCEDR {
258    #[doc = r"Value of the field as raw bits"]
259    #[inline(always)]
260    pub fn bit(&self) -> bool {
261        self.bits
262    }
263    #[doc = r"Returns `true` if the bit is clear (0)"]
264    #[inline(always)]
265    pub fn bit_is_clear(&self) -> bool {
266        !self.bit()
267    }
268    #[doc = r"Returns `true` if the bit is set (1)"]
269    #[inline(always)]
270    pub fn bit_is_set(&self) -> bool {
271        self.bit()
272    }
273}
274#[doc = r"Proxy"]
275pub struct _SHAMD5_SYSCONFIG_SADVANCEDW<'a> {
276    w: &'a mut W,
277}
278impl<'a> _SHAMD5_SYSCONFIG_SADVANCEDW<'a> {
279    #[doc = r"Sets the field bit"]
280    #[inline(always)]
281    pub fn set_bit(self) -> &'a mut W {
282        self.bit(true)
283    }
284    #[doc = r"Clears the field bit"]
285    #[inline(always)]
286    pub fn clear_bit(self) -> &'a mut W {
287        self.bit(false)
288    }
289    #[doc = r"Writes raw bits to the field"]
290    #[inline(always)]
291    pub fn bit(self, value: bool) -> &'a mut W {
292        self.w.bits &= !(1 << 7);
293        self.w.bits |= ((value as u32) & 1) << 7;
294        self.w
295    }
296}
297impl R {
298    #[doc = r"Value of the register as raw bits"]
299    #[inline(always)]
300    pub fn bits(&self) -> u32 {
301        self.bits
302    }
303    #[doc = "Bit 1 - Soft reset"]
304    #[inline(always)]
305    pub fn shamd5_sysconfig_softreset(&self) -> SHAMD5_SYSCONFIG_SOFTRESETR {
306        let bits = ((self.bits >> 1) & 1) != 0;
307        SHAMD5_SYSCONFIG_SOFTRESETR { bits }
308    }
309    #[doc = "Bit 2 - Interrupt Enable"]
310    #[inline(always)]
311    pub fn shamd5_sysconfig_it_en(&self) -> SHAMD5_SYSCONFIG_IT_ENR {
312        let bits = ((self.bits >> 2) & 1) != 0;
313        SHAMD5_SYSCONFIG_IT_ENR { bits }
314    }
315    #[doc = "Bit 3 - uDMA Request Enable"]
316    #[inline(always)]
317    pub fn shamd5_sysconfig_dma_en(&self) -> SHAMD5_SYSCONFIG_DMA_ENR {
318        let bits = ((self.bits >> 3) & 1) != 0;
319        SHAMD5_SYSCONFIG_DMA_ENR { bits }
320    }
321    #[doc = "Bits 4:5 - Sidle mode"]
322    #[inline(always)]
323    pub fn shamd5_sysconfig_sidle(&self) -> SHAMD5_SYSCONFIG_SIDLER {
324        SHAMD5_SYSCONFIG_SIDLER::_from(((self.bits >> 4) & 3) as u8)
325    }
326    #[doc = "Bit 7 - Advanced Mode Enable"]
327    #[inline(always)]
328    pub fn shamd5_sysconfig_sadvanced(&self) -> SHAMD5_SYSCONFIG_SADVANCEDR {
329        let bits = ((self.bits >> 7) & 1) != 0;
330        SHAMD5_SYSCONFIG_SADVANCEDR { bits }
331    }
332}
333impl W {
334    #[doc = r"Writes raw bits to the register"]
335    #[inline(always)]
336    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
337        self.bits = bits;
338        self
339    }
340    #[doc = "Bit 1 - Soft reset"]
341    #[inline(always)]
342    pub fn shamd5_sysconfig_softreset(&mut self) -> _SHAMD5_SYSCONFIG_SOFTRESETW {
343        _SHAMD5_SYSCONFIG_SOFTRESETW { w: self }
344    }
345    #[doc = "Bit 2 - Interrupt Enable"]
346    #[inline(always)]
347    pub fn shamd5_sysconfig_it_en(&mut self) -> _SHAMD5_SYSCONFIG_IT_ENW {
348        _SHAMD5_SYSCONFIG_IT_ENW { w: self }
349    }
350    #[doc = "Bit 3 - uDMA Request Enable"]
351    #[inline(always)]
352    pub fn shamd5_sysconfig_dma_en(&mut self) -> _SHAMD5_SYSCONFIG_DMA_ENW {
353        _SHAMD5_SYSCONFIG_DMA_ENW { w: self }
354    }
355    #[doc = "Bits 4:5 - Sidle mode"]
356    #[inline(always)]
357    pub fn shamd5_sysconfig_sidle(&mut self) -> _SHAMD5_SYSCONFIG_SIDLEW {
358        _SHAMD5_SYSCONFIG_SIDLEW { w: self }
359    }
360    #[doc = "Bit 7 - Advanced Mode Enable"]
361    #[inline(always)]
362    pub fn shamd5_sysconfig_sadvanced(&mut self) -> _SHAMD5_SYSCONFIG_SADVANCEDW {
363        _SHAMD5_SYSCONFIG_SADVANCEDW { w: self }
364    }
365}
msp432e4/shamd5/sysconfig.rs

msp432e4/shamd5/
sysconfig.rs
