1#[doc = r"Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r"Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::MISC {
10 #[doc = r"Modifies the contents of the register"]
11 #[inline(always)]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 self.register.set(f(&R { bits }, &mut W { bits }).bits);
18 }
19 #[doc = r"Reads the contents of the register"]
20 #[inline(always)]
21 pub fn read(&self) -> R {
22 R {
23 bits: self.register.get(),
24 }
25 }
26 #[doc = r"Writes to the register"]
27 #[inline(always)]
28 pub fn write<F>(&self, f: F)
29 where
30 F: FnOnce(&mut W) -> &mut W,
31 {
32 self.register.set(
33 f(&mut W {
34 bits: Self::reset_value(),
35 })
36 .bits,
37 );
38 }
39 #[doc = r"Reset value of the register"]
40 #[inline(always)]
41 pub const fn reset_value() -> u32 {
42 0
43 }
44 #[doc = r"Writes the reset value to the register"]
45 #[inline(always)]
46 pub fn reset(&self) {
47 self.register.set(Self::reset_value())
48 }
49}
50#[doc = r"Value of the field"]
51pub struct SYSCTL_MISC_BORMISR {
52 bits: bool,
53}
54impl SYSCTL_MISC_BORMISR {
55 #[doc = r"Value of the field as raw bits"]
56 #[inline(always)]
57 pub fn bit(&self) -> bool {
58 self.bits
59 }
60 #[doc = r"Returns `true` if the bit is clear (0)"]
61 #[inline(always)]
62 pub fn bit_is_clear(&self) -> bool {
63 !self.bit()
64 }
65 #[doc = r"Returns `true` if the bit is set (1)"]
66 #[inline(always)]
67 pub fn bit_is_set(&self) -> bool {
68 self.bit()
69 }
70}
71#[doc = r"Proxy"]
72pub struct _SYSCTL_MISC_BORMISW<'a> {
73 w: &'a mut W,
74}
75impl<'a> _SYSCTL_MISC_BORMISW<'a> {
76 #[doc = r"Sets the field bit"]
77 #[inline(always)]
78 pub fn set_bit(self) -> &'a mut W {
79 self.bit(true)
80 }
81 #[doc = r"Clears the field bit"]
82 #[inline(always)]
83 pub fn clear_bit(self) -> &'a mut W {
84 self.bit(false)
85 }
86 #[doc = r"Writes raw bits to the field"]
87 #[inline(always)]
88 pub fn bit(self, value: bool) -> &'a mut W {
89 self.w.bits &= !(1 << 1);
90 self.w.bits |= ((value as u32) & 1) << 1;
91 self.w
92 }
93}
94#[doc = r"Value of the field"]
95pub struct SYSCTL_MISC_MOFMISR {
96 bits: bool,
97}
98impl SYSCTL_MISC_MOFMISR {
99 #[doc = r"Value of the field as raw bits"]
100 #[inline(always)]
101 pub fn bit(&self) -> bool {
102 self.bits
103 }
104 #[doc = r"Returns `true` if the bit is clear (0)"]
105 #[inline(always)]
106 pub fn bit_is_clear(&self) -> bool {
107 !self.bit()
108 }
109 #[doc = r"Returns `true` if the bit is set (1)"]
110 #[inline(always)]
111 pub fn bit_is_set(&self) -> bool {
112 self.bit()
113 }
114}
115#[doc = r"Proxy"]
116pub struct _SYSCTL_MISC_MOFMISW<'a> {
117 w: &'a mut W,
118}
119impl<'a> _SYSCTL_MISC_MOFMISW<'a> {
120 #[doc = r"Sets the field bit"]
121 #[inline(always)]
122 pub fn set_bit(self) -> &'a mut W {
123 self.bit(true)
124 }
125 #[doc = r"Clears the field bit"]
126 #[inline(always)]
127 pub fn clear_bit(self) -> &'a mut W {
128 self.bit(false)
129 }
130 #[doc = r"Writes raw bits to the field"]
131 #[inline(always)]
132 pub fn bit(self, value: bool) -> &'a mut W {
133 self.w.bits &= !(1 << 3);
134 self.w.bits |= ((value as u32) & 1) << 3;
135 self.w
136 }
137}
138#[doc = r"Value of the field"]
139pub struct SYSCTL_MISC_PLLLMISR {
140 bits: bool,
141}
142impl SYSCTL_MISC_PLLLMISR {
143 #[doc = r"Value of the field as raw bits"]
144 #[inline(always)]
145 pub fn bit(&self) -> bool {
146 self.bits
147 }
148 #[doc = r"Returns `true` if the bit is clear (0)"]
149 #[inline(always)]
150 pub fn bit_is_clear(&self) -> bool {
151 !self.bit()
152 }
153 #[doc = r"Returns `true` if the bit is set (1)"]
154 #[inline(always)]
155 pub fn bit_is_set(&self) -> bool {
156 self.bit()
157 }
158}
159#[doc = r"Proxy"]
160pub struct _SYSCTL_MISC_PLLLMISW<'a> {
161 w: &'a mut W,
162}
163impl<'a> _SYSCTL_MISC_PLLLMISW<'a> {
164 #[doc = r"Sets the field bit"]
165 #[inline(always)]
166 pub fn set_bit(self) -> &'a mut W {
167 self.bit(true)
168 }
169 #[doc = r"Clears the field bit"]
170 #[inline(always)]
171 pub fn clear_bit(self) -> &'a mut W {
172 self.bit(false)
173 }
174 #[doc = r"Writes raw bits to the field"]
175 #[inline(always)]
176 pub fn bit(self, value: bool) -> &'a mut W {
177 self.w.bits &= !(1 << 6);
178 self.w.bits |= ((value as u32) & 1) << 6;
179 self.w
180 }
181}
182#[doc = r"Value of the field"]
183pub struct SYSCTL_MISC_MOSCPUPMISR {
184 bits: bool,
185}
186impl SYSCTL_MISC_MOSCPUPMISR {
187 #[doc = r"Value of the field as raw bits"]
188 #[inline(always)]
189 pub fn bit(&self) -> bool {
190 self.bits
191 }
192 #[doc = r"Returns `true` if the bit is clear (0)"]
193 #[inline(always)]
194 pub fn bit_is_clear(&self) -> bool {
195 !self.bit()
196 }
197 #[doc = r"Returns `true` if the bit is set (1)"]
198 #[inline(always)]
199 pub fn bit_is_set(&self) -> bool {
200 self.bit()
201 }
202}
203#[doc = r"Proxy"]
204pub struct _SYSCTL_MISC_MOSCPUPMISW<'a> {
205 w: &'a mut W,
206}
207impl<'a> _SYSCTL_MISC_MOSCPUPMISW<'a> {
208 #[doc = r"Sets the field bit"]
209 #[inline(always)]
210 pub fn set_bit(self) -> &'a mut W {
211 self.bit(true)
212 }
213 #[doc = r"Clears the field bit"]
214 #[inline(always)]
215 pub fn clear_bit(self) -> &'a mut W {
216 self.bit(false)
217 }
218 #[doc = r"Writes raw bits to the field"]
219 #[inline(always)]
220 pub fn bit(self, value: bool) -> &'a mut W {
221 self.w.bits &= !(1 << 8);
222 self.w.bits |= ((value as u32) & 1) << 8;
223 self.w
224 }
225}
226impl R {
227 #[doc = r"Value of the register as raw bits"]
228 #[inline(always)]
229 pub fn bits(&self) -> u32 {
230 self.bits
231 }
232 #[doc = "Bit 1 - BOR Masked Interrupt Status"]
233 #[inline(always)]
234 pub fn sysctl_misc_bormis(&self) -> SYSCTL_MISC_BORMISR {
235 let bits = ((self.bits >> 1) & 1) != 0;
236 SYSCTL_MISC_BORMISR { bits }
237 }
238 #[doc = "Bit 3 - Main Oscillator Failure Masked Interrupt Status"]
239 #[inline(always)]
240 pub fn sysctl_misc_mofmis(&self) -> SYSCTL_MISC_MOFMISR {
241 let bits = ((self.bits >> 3) & 1) != 0;
242 SYSCTL_MISC_MOFMISR { bits }
243 }
244 #[doc = "Bit 6 - PLL Lock Masked Interrupt Status"]
245 #[inline(always)]
246 pub fn sysctl_misc_plllmis(&self) -> SYSCTL_MISC_PLLLMISR {
247 let bits = ((self.bits >> 6) & 1) != 0;
248 SYSCTL_MISC_PLLLMISR { bits }
249 }
250 #[doc = "Bit 8 - MOSC Power Up Masked Interrupt Status"]
251 #[inline(always)]
252 pub fn sysctl_misc_moscpupmis(&self) -> SYSCTL_MISC_MOSCPUPMISR {
253 let bits = ((self.bits >> 8) & 1) != 0;
254 SYSCTL_MISC_MOSCPUPMISR { bits }
255 }
256}
257impl W {
258 #[doc = r"Writes raw bits to the register"]
259 #[inline(always)]
260 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
261 self.bits = bits;
262 self
263 }
264 #[doc = "Bit 1 - BOR Masked Interrupt Status"]
265 #[inline(always)]
266 pub fn sysctl_misc_bormis(&mut self) -> _SYSCTL_MISC_BORMISW {
267 _SYSCTL_MISC_BORMISW { w: self }
268 }
269 #[doc = "Bit 3 - Main Oscillator Failure Masked Interrupt Status"]
270 #[inline(always)]
271 pub fn sysctl_misc_mofmis(&mut self) -> _SYSCTL_MISC_MOFMISW {
272 _SYSCTL_MISC_MOFMISW { w: self }
273 }
274 #[doc = "Bit 6 - PLL Lock Masked Interrupt Status"]
275 #[inline(always)]
276 pub fn sysctl_misc_plllmis(&mut self) -> _SYSCTL_MISC_PLLLMISW {
277 _SYSCTL_MISC_PLLLMISW { w: self }
278 }
279 #[doc = "Bit 8 - MOSC Power Up Masked Interrupt Status"]
280 #[inline(always)]
281 pub fn sysctl_misc_moscpupmis(&mut self) -> _SYSCTL_MISC_MOSCPUPMISW {
282 _SYSCTL_MISC_MOSCPUPMISW { w: self }
283 }
284}