msp432e4/sysctl/
rcgcuart.rs1#[doc = r"Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r"Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::RCGCUART {
10 #[doc = r"Modifies the contents of the register"]
11 #[inline(always)]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 self.register.set(f(&R { bits }, &mut W { bits }).bits);
18 }
19 #[doc = r"Reads the contents of the register"]
20 #[inline(always)]
21 pub fn read(&self) -> R {
22 R {
23 bits: self.register.get(),
24 }
25 }
26 #[doc = r"Writes to the register"]
27 #[inline(always)]
28 pub fn write<F>(&self, f: F)
29 where
30 F: FnOnce(&mut W) -> &mut W,
31 {
32 self.register.set(
33 f(&mut W {
34 bits: Self::reset_value(),
35 })
36 .bits,
37 );
38 }
39 #[doc = r"Reset value of the register"]
40 #[inline(always)]
41 pub const fn reset_value() -> u32 {
42 0
43 }
44 #[doc = r"Writes the reset value to the register"]
45 #[inline(always)]
46 pub fn reset(&self) {
47 self.register.set(Self::reset_value())
48 }
49}
50#[doc = r"Value of the field"]
51pub struct SYSCTL_RCGCUART_R0R {
52 bits: bool,
53}
54impl SYSCTL_RCGCUART_R0R {
55 #[doc = r"Value of the field as raw bits"]
56 #[inline(always)]
57 pub fn bit(&self) -> bool {
58 self.bits
59 }
60 #[doc = r"Returns `true` if the bit is clear (0)"]
61 #[inline(always)]
62 pub fn bit_is_clear(&self) -> bool {
63 !self.bit()
64 }
65 #[doc = r"Returns `true` if the bit is set (1)"]
66 #[inline(always)]
67 pub fn bit_is_set(&self) -> bool {
68 self.bit()
69 }
70}
71#[doc = r"Proxy"]
72pub struct _SYSCTL_RCGCUART_R0W<'a> {
73 w: &'a mut W,
74}
75impl<'a> _SYSCTL_RCGCUART_R0W<'a> {
76 #[doc = r"Sets the field bit"]
77 #[inline(always)]
78 pub fn set_bit(self) -> &'a mut W {
79 self.bit(true)
80 }
81 #[doc = r"Clears the field bit"]
82 #[inline(always)]
83 pub fn clear_bit(self) -> &'a mut W {
84 self.bit(false)
85 }
86 #[doc = r"Writes raw bits to the field"]
87 #[inline(always)]
88 pub fn bit(self, value: bool) -> &'a mut W {
89 self.w.bits &= !(1 << 0);
90 self.w.bits |= ((value as u32) & 1) << 0;
91 self.w
92 }
93}
94#[doc = r"Value of the field"]
95pub struct SYSCTL_RCGCUART_R1R {
96 bits: bool,
97}
98impl SYSCTL_RCGCUART_R1R {
99 #[doc = r"Value of the field as raw bits"]
100 #[inline(always)]
101 pub fn bit(&self) -> bool {
102 self.bits
103 }
104 #[doc = r"Returns `true` if the bit is clear (0)"]
105 #[inline(always)]
106 pub fn bit_is_clear(&self) -> bool {
107 !self.bit()
108 }
109 #[doc = r"Returns `true` if the bit is set (1)"]
110 #[inline(always)]
111 pub fn bit_is_set(&self) -> bool {
112 self.bit()
113 }
114}
115#[doc = r"Proxy"]
116pub struct _SYSCTL_RCGCUART_R1W<'a> {
117 w: &'a mut W,
118}
119impl<'a> _SYSCTL_RCGCUART_R1W<'a> {
120 #[doc = r"Sets the field bit"]
121 #[inline(always)]
122 pub fn set_bit(self) -> &'a mut W {
123 self.bit(true)
124 }
125 #[doc = r"Clears the field bit"]
126 #[inline(always)]
127 pub fn clear_bit(self) -> &'a mut W {
128 self.bit(false)
129 }
130 #[doc = r"Writes raw bits to the field"]
131 #[inline(always)]
132 pub fn bit(self, value: bool) -> &'a mut W {
133 self.w.bits &= !(1 << 1);
134 self.w.bits |= ((value as u32) & 1) << 1;
135 self.w
136 }
137}
138#[doc = r"Value of the field"]
139pub struct SYSCTL_RCGCUART_R2R {
140 bits: bool,
141}
142impl SYSCTL_RCGCUART_R2R {
143 #[doc = r"Value of the field as raw bits"]
144 #[inline(always)]
145 pub fn bit(&self) -> bool {
146 self.bits
147 }
148 #[doc = r"Returns `true` if the bit is clear (0)"]
149 #[inline(always)]
150 pub fn bit_is_clear(&self) -> bool {
151 !self.bit()
152 }
153 #[doc = r"Returns `true` if the bit is set (1)"]
154 #[inline(always)]
155 pub fn bit_is_set(&self) -> bool {
156 self.bit()
157 }
158}
159#[doc = r"Proxy"]
160pub struct _SYSCTL_RCGCUART_R2W<'a> {
161 w: &'a mut W,
162}
163impl<'a> _SYSCTL_RCGCUART_R2W<'a> {
164 #[doc = r"Sets the field bit"]
165 #[inline(always)]
166 pub fn set_bit(self) -> &'a mut W {
167 self.bit(true)
168 }
169 #[doc = r"Clears the field bit"]
170 #[inline(always)]
171 pub fn clear_bit(self) -> &'a mut W {
172 self.bit(false)
173 }
174 #[doc = r"Writes raw bits to the field"]
175 #[inline(always)]
176 pub fn bit(self, value: bool) -> &'a mut W {
177 self.w.bits &= !(1 << 2);
178 self.w.bits |= ((value as u32) & 1) << 2;
179 self.w
180 }
181}
182#[doc = r"Value of the field"]
183pub struct SYSCTL_RCGCUART_R3R {
184 bits: bool,
185}
186impl SYSCTL_RCGCUART_R3R {
187 #[doc = r"Value of the field as raw bits"]
188 #[inline(always)]
189 pub fn bit(&self) -> bool {
190 self.bits
191 }
192 #[doc = r"Returns `true` if the bit is clear (0)"]
193 #[inline(always)]
194 pub fn bit_is_clear(&self) -> bool {
195 !self.bit()
196 }
197 #[doc = r"Returns `true` if the bit is set (1)"]
198 #[inline(always)]
199 pub fn bit_is_set(&self) -> bool {
200 self.bit()
201 }
202}
203#[doc = r"Proxy"]
204pub struct _SYSCTL_RCGCUART_R3W<'a> {
205 w: &'a mut W,
206}
207impl<'a> _SYSCTL_RCGCUART_R3W<'a> {
208 #[doc = r"Sets the field bit"]
209 #[inline(always)]
210 pub fn set_bit(self) -> &'a mut W {
211 self.bit(true)
212 }
213 #[doc = r"Clears the field bit"]
214 #[inline(always)]
215 pub fn clear_bit(self) -> &'a mut W {
216 self.bit(false)
217 }
218 #[doc = r"Writes raw bits to the field"]
219 #[inline(always)]
220 pub fn bit(self, value: bool) -> &'a mut W {
221 self.w.bits &= !(1 << 3);
222 self.w.bits |= ((value as u32) & 1) << 3;
223 self.w
224 }
225}
226#[doc = r"Value of the field"]
227pub struct SYSCTL_RCGCUART_R4R {
228 bits: bool,
229}
230impl SYSCTL_RCGCUART_R4R {
231 #[doc = r"Value of the field as raw bits"]
232 #[inline(always)]
233 pub fn bit(&self) -> bool {
234 self.bits
235 }
236 #[doc = r"Returns `true` if the bit is clear (0)"]
237 #[inline(always)]
238 pub fn bit_is_clear(&self) -> bool {
239 !self.bit()
240 }
241 #[doc = r"Returns `true` if the bit is set (1)"]
242 #[inline(always)]
243 pub fn bit_is_set(&self) -> bool {
244 self.bit()
245 }
246}
247#[doc = r"Proxy"]
248pub struct _SYSCTL_RCGCUART_R4W<'a> {
249 w: &'a mut W,
250}
251impl<'a> _SYSCTL_RCGCUART_R4W<'a> {
252 #[doc = r"Sets the field bit"]
253 #[inline(always)]
254 pub fn set_bit(self) -> &'a mut W {
255 self.bit(true)
256 }
257 #[doc = r"Clears the field bit"]
258 #[inline(always)]
259 pub fn clear_bit(self) -> &'a mut W {
260 self.bit(false)
261 }
262 #[doc = r"Writes raw bits to the field"]
263 #[inline(always)]
264 pub fn bit(self, value: bool) -> &'a mut W {
265 self.w.bits &= !(1 << 4);
266 self.w.bits |= ((value as u32) & 1) << 4;
267 self.w
268 }
269}
270#[doc = r"Value of the field"]
271pub struct SYSCTL_RCGCUART_R5R {
272 bits: bool,
273}
274impl SYSCTL_RCGCUART_R5R {
275 #[doc = r"Value of the field as raw bits"]
276 #[inline(always)]
277 pub fn bit(&self) -> bool {
278 self.bits
279 }
280 #[doc = r"Returns `true` if the bit is clear (0)"]
281 #[inline(always)]
282 pub fn bit_is_clear(&self) -> bool {
283 !self.bit()
284 }
285 #[doc = r"Returns `true` if the bit is set (1)"]
286 #[inline(always)]
287 pub fn bit_is_set(&self) -> bool {
288 self.bit()
289 }
290}
291#[doc = r"Proxy"]
292pub struct _SYSCTL_RCGCUART_R5W<'a> {
293 w: &'a mut W,
294}
295impl<'a> _SYSCTL_RCGCUART_R5W<'a> {
296 #[doc = r"Sets the field bit"]
297 #[inline(always)]
298 pub fn set_bit(self) -> &'a mut W {
299 self.bit(true)
300 }
301 #[doc = r"Clears the field bit"]
302 #[inline(always)]
303 pub fn clear_bit(self) -> &'a mut W {
304 self.bit(false)
305 }
306 #[doc = r"Writes raw bits to the field"]
307 #[inline(always)]
308 pub fn bit(self, value: bool) -> &'a mut W {
309 self.w.bits &= !(1 << 5);
310 self.w.bits |= ((value as u32) & 1) << 5;
311 self.w
312 }
313}
314#[doc = r"Value of the field"]
315pub struct SYSCTL_RCGCUART_R6R {
316 bits: bool,
317}
318impl SYSCTL_RCGCUART_R6R {
319 #[doc = r"Value of the field as raw bits"]
320 #[inline(always)]
321 pub fn bit(&self) -> bool {
322 self.bits
323 }
324 #[doc = r"Returns `true` if the bit is clear (0)"]
325 #[inline(always)]
326 pub fn bit_is_clear(&self) -> bool {
327 !self.bit()
328 }
329 #[doc = r"Returns `true` if the bit is set (1)"]
330 #[inline(always)]
331 pub fn bit_is_set(&self) -> bool {
332 self.bit()
333 }
334}
335#[doc = r"Proxy"]
336pub struct _SYSCTL_RCGCUART_R6W<'a> {
337 w: &'a mut W,
338}
339impl<'a> _SYSCTL_RCGCUART_R6W<'a> {
340 #[doc = r"Sets the field bit"]
341 #[inline(always)]
342 pub fn set_bit(self) -> &'a mut W {
343 self.bit(true)
344 }
345 #[doc = r"Clears the field bit"]
346 #[inline(always)]
347 pub fn clear_bit(self) -> &'a mut W {
348 self.bit(false)
349 }
350 #[doc = r"Writes raw bits to the field"]
351 #[inline(always)]
352 pub fn bit(self, value: bool) -> &'a mut W {
353 self.w.bits &= !(1 << 6);
354 self.w.bits |= ((value as u32) & 1) << 6;
355 self.w
356 }
357}
358#[doc = r"Value of the field"]
359pub struct SYSCTL_RCGCUART_R7R {
360 bits: bool,
361}
362impl SYSCTL_RCGCUART_R7R {
363 #[doc = r"Value of the field as raw bits"]
364 #[inline(always)]
365 pub fn bit(&self) -> bool {
366 self.bits
367 }
368 #[doc = r"Returns `true` if the bit is clear (0)"]
369 #[inline(always)]
370 pub fn bit_is_clear(&self) -> bool {
371 !self.bit()
372 }
373 #[doc = r"Returns `true` if the bit is set (1)"]
374 #[inline(always)]
375 pub fn bit_is_set(&self) -> bool {
376 self.bit()
377 }
378}
379#[doc = r"Proxy"]
380pub struct _SYSCTL_RCGCUART_R7W<'a> {
381 w: &'a mut W,
382}
383impl<'a> _SYSCTL_RCGCUART_R7W<'a> {
384 #[doc = r"Sets the field bit"]
385 #[inline(always)]
386 pub fn set_bit(self) -> &'a mut W {
387 self.bit(true)
388 }
389 #[doc = r"Clears the field bit"]
390 #[inline(always)]
391 pub fn clear_bit(self) -> &'a mut W {
392 self.bit(false)
393 }
394 #[doc = r"Writes raw bits to the field"]
395 #[inline(always)]
396 pub fn bit(self, value: bool) -> &'a mut W {
397 self.w.bits &= !(1 << 7);
398 self.w.bits |= ((value as u32) & 1) << 7;
399 self.w
400 }
401}
402impl R {
403 #[doc = r"Value of the register as raw bits"]
404 #[inline(always)]
405 pub fn bits(&self) -> u32 {
406 self.bits
407 }
408 #[doc = "Bit 0 - UART Module 0 Run Mode Clock Gating Control"]
409 #[inline(always)]
410 pub fn sysctl_rcgcuart_r0(&self) -> SYSCTL_RCGCUART_R0R {
411 let bits = ((self.bits >> 0) & 1) != 0;
412 SYSCTL_RCGCUART_R0R { bits }
413 }
414 #[doc = "Bit 1 - UART Module 1 Run Mode Clock Gating Control"]
415 #[inline(always)]
416 pub fn sysctl_rcgcuart_r1(&self) -> SYSCTL_RCGCUART_R1R {
417 let bits = ((self.bits >> 1) & 1) != 0;
418 SYSCTL_RCGCUART_R1R { bits }
419 }
420 #[doc = "Bit 2 - UART Module 2 Run Mode Clock Gating Control"]
421 #[inline(always)]
422 pub fn sysctl_rcgcuart_r2(&self) -> SYSCTL_RCGCUART_R2R {
423 let bits = ((self.bits >> 2) & 1) != 0;
424 SYSCTL_RCGCUART_R2R { bits }
425 }
426 #[doc = "Bit 3 - UART Module 3 Run Mode Clock Gating Control"]
427 #[inline(always)]
428 pub fn sysctl_rcgcuart_r3(&self) -> SYSCTL_RCGCUART_R3R {
429 let bits = ((self.bits >> 3) & 1) != 0;
430 SYSCTL_RCGCUART_R3R { bits }
431 }
432 #[doc = "Bit 4 - UART Module 4 Run Mode Clock Gating Control"]
433 #[inline(always)]
434 pub fn sysctl_rcgcuart_r4(&self) -> SYSCTL_RCGCUART_R4R {
435 let bits = ((self.bits >> 4) & 1) != 0;
436 SYSCTL_RCGCUART_R4R { bits }
437 }
438 #[doc = "Bit 5 - UART Module 5 Run Mode Clock Gating Control"]
439 #[inline(always)]
440 pub fn sysctl_rcgcuart_r5(&self) -> SYSCTL_RCGCUART_R5R {
441 let bits = ((self.bits >> 5) & 1) != 0;
442 SYSCTL_RCGCUART_R5R { bits }
443 }
444 #[doc = "Bit 6 - UART Module 6 Run Mode Clock Gating Control"]
445 #[inline(always)]
446 pub fn sysctl_rcgcuart_r6(&self) -> SYSCTL_RCGCUART_R6R {
447 let bits = ((self.bits >> 6) & 1) != 0;
448 SYSCTL_RCGCUART_R6R { bits }
449 }
450 #[doc = "Bit 7 - UART Module 7 Run Mode Clock Gating Control"]
451 #[inline(always)]
452 pub fn sysctl_rcgcuart_r7(&self) -> SYSCTL_RCGCUART_R7R {
453 let bits = ((self.bits >> 7) & 1) != 0;
454 SYSCTL_RCGCUART_R7R { bits }
455 }
456}
457impl W {
458 #[doc = r"Writes raw bits to the register"]
459 #[inline(always)]
460 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
461 self.bits = bits;
462 self
463 }
464 #[doc = "Bit 0 - UART Module 0 Run Mode Clock Gating Control"]
465 #[inline(always)]
466 pub fn sysctl_rcgcuart_r0(&mut self) -> _SYSCTL_RCGCUART_R0W {
467 _SYSCTL_RCGCUART_R0W { w: self }
468 }
469 #[doc = "Bit 1 - UART Module 1 Run Mode Clock Gating Control"]
470 #[inline(always)]
471 pub fn sysctl_rcgcuart_r1(&mut self) -> _SYSCTL_RCGCUART_R1W {
472 _SYSCTL_RCGCUART_R1W { w: self }
473 }
474 #[doc = "Bit 2 - UART Module 2 Run Mode Clock Gating Control"]
475 #[inline(always)]
476 pub fn sysctl_rcgcuart_r2(&mut self) -> _SYSCTL_RCGCUART_R2W {
477 _SYSCTL_RCGCUART_R2W { w: self }
478 }
479 #[doc = "Bit 3 - UART Module 3 Run Mode Clock Gating Control"]
480 #[inline(always)]
481 pub fn sysctl_rcgcuart_r3(&mut self) -> _SYSCTL_RCGCUART_R3W {
482 _SYSCTL_RCGCUART_R3W { w: self }
483 }
484 #[doc = "Bit 4 - UART Module 4 Run Mode Clock Gating Control"]
485 #[inline(always)]
486 pub fn sysctl_rcgcuart_r4(&mut self) -> _SYSCTL_RCGCUART_R4W {
487 _SYSCTL_RCGCUART_R4W { w: self }
488 }
489 #[doc = "Bit 5 - UART Module 5 Run Mode Clock Gating Control"]
490 #[inline(always)]
491 pub fn sysctl_rcgcuart_r5(&mut self) -> _SYSCTL_RCGCUART_R5W {
492 _SYSCTL_RCGCUART_R5W { w: self }
493 }
494 #[doc = "Bit 6 - UART Module 6 Run Mode Clock Gating Control"]
495 #[inline(always)]
496 pub fn sysctl_rcgcuart_r6(&mut self) -> _SYSCTL_RCGCUART_R6W {
497 _SYSCTL_RCGCUART_R6W { w: self }
498 }
499 #[doc = "Bit 7 - UART Module 7 Run Mode Clock Gating Control"]
500 #[inline(always)]
501 pub fn sysctl_rcgcuart_r7(&mut self) -> _SYSCTL_RCGCUART_R7W {
502 _SYSCTL_RCGCUART_R7W { w: self }
503 }
504}