1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - UART Data"]
5 pub dr: DR,
6 _reserved_1_ecr: [u8; 4usize],
7 _reserved2: [u8; 16usize],
8 #[doc = "0x18 - UART Flag"]
9 pub fr: FR,
10 _reserved3: [u8; 4usize],
11 #[doc = "0x20 - UART IrDA Low-Power Register"]
12 pub ilpr: ILPR,
13 #[doc = "0x24 - UART Integer Baud-Rate Divisor"]
14 pub ibrd: IBRD,
15 #[doc = "0x28 - UART Fractional Baud-Rate Divisor"]
16 pub fbrd: FBRD,
17 #[doc = "0x2c - UART Line Control"]
18 pub lcrh: LCRH,
19 #[doc = "0x30 - UART Control"]
20 pub ctl: CTL,
21 #[doc = "0x34 - UART Interrupt FIFO Level Select"]
22 pub ifls: IFLS,
23 #[doc = "0x38 - UART Interrupt Mask"]
24 pub im: IM,
25 #[doc = "0x3c - UART Raw Interrupt Status"]
26 pub ris: RIS,
27 #[doc = "0x40 - UART Masked Interrupt Status"]
28 pub mis: MIS,
29 #[doc = "0x44 - UART Interrupt Clear"]
30 pub icr: ICR,
31 #[doc = "0x48 - UART DMA Control"]
32 pub dmactl: DMACTL,
33 _reserved14: [u8; 88usize],
34 #[doc = "0xa4 - UART 9-Bit Self Address"]
35 pub _9bitaddr: _9BITADDR,
36 #[doc = "0xa8 - UART 9-Bit Self Address Mask"]
37 pub _9bitamask: _9BITAMASK,
38 _reserved16: [u8; 3860usize],
39 #[doc = "0xfc0 - UART Peripheral Properties"]
40 pub pp: PP,
41 _reserved17: [u8; 4usize],
42 #[doc = "0xfc8 - UART Clock Configuration"]
43 pub cc: CC,
44}
45impl RegisterBlock {
46 #[doc = "0x04 - UART Receive Status/Error Clear"]
47 #[inline(always)]
48 pub fn ecr(&self) -> &ECR {
49 unsafe { &*(((self as *const Self) as *const u8).add(4usize) as *const ECR) }
50 }
51 #[doc = "0x04 - UART Receive Status/Error Clear"]
52 #[inline(always)]
53 pub fn ecr_mut(&self) -> &mut ECR {
54 unsafe { &mut *(((self as *const Self) as *mut u8).add(4usize) as *mut ECR) }
55 }
56 #[doc = "0x04 - UART Receive Status/Error Clear"]
57 #[inline(always)]
58 pub fn rsr(&self) -> &RSR {
59 unsafe { &*(((self as *const Self) as *const u8).add(4usize) as *const RSR) }
60 }
61 #[doc = "0x04 - UART Receive Status/Error Clear"]
62 #[inline(always)]
63 pub fn rsr_mut(&self) -> &mut RSR {
64 unsafe { &mut *(((self as *const Self) as *mut u8).add(4usize) as *mut RSR) }
65 }
66}
67#[doc = "UART Data"]
68pub struct DR {
69 register: vcell::VolatileCell<u32>,
70}
71#[doc = "UART Data"]
72pub mod dr;
73#[doc = "UART Receive Status/Error Clear"]
74pub struct RSR {
75 register: vcell::VolatileCell<u32>,
76}
77#[doc = "UART Receive Status/Error Clear"]
78pub mod rsr;
79#[doc = "UART Receive Status/Error Clear"]
80pub struct ECR {
81 register: vcell::VolatileCell<u32>,
82}
83#[doc = "UART Receive Status/Error Clear"]
84pub mod ecr;
85#[doc = "UART Flag"]
86pub struct FR {
87 register: vcell::VolatileCell<u32>,
88}
89#[doc = "UART Flag"]
90pub mod fr;
91#[doc = "UART IrDA Low-Power Register"]
92pub struct ILPR {
93 register: vcell::VolatileCell<u32>,
94}
95#[doc = "UART IrDA Low-Power Register"]
96pub mod ilpr;
97#[doc = "UART Integer Baud-Rate Divisor"]
98pub struct IBRD {
99 register: vcell::VolatileCell<u32>,
100}
101#[doc = "UART Integer Baud-Rate Divisor"]
102pub mod ibrd;
103#[doc = "UART Fractional Baud-Rate Divisor"]
104pub struct FBRD {
105 register: vcell::VolatileCell<u32>,
106}
107#[doc = "UART Fractional Baud-Rate Divisor"]
108pub mod fbrd;
109#[doc = "UART Line Control"]
110pub struct LCRH {
111 register: vcell::VolatileCell<u32>,
112}
113#[doc = "UART Line Control"]
114pub mod lcrh;
115#[doc = "UART Control"]
116pub struct CTL {
117 register: vcell::VolatileCell<u32>,
118}
119#[doc = "UART Control"]
120pub mod ctl;
121#[doc = "UART Interrupt FIFO Level Select"]
122pub struct IFLS {
123 register: vcell::VolatileCell<u32>,
124}
125#[doc = "UART Interrupt FIFO Level Select"]
126pub mod ifls;
127#[doc = "UART Interrupt Mask"]
128pub struct IM {
129 register: vcell::VolatileCell<u32>,
130}
131#[doc = "UART Interrupt Mask"]
132pub mod im;
133#[doc = "UART Raw Interrupt Status"]
134pub struct RIS {
135 register: vcell::VolatileCell<u32>,
136}
137#[doc = "UART Raw Interrupt Status"]
138pub mod ris;
139#[doc = "UART Masked Interrupt Status"]
140pub struct MIS {
141 register: vcell::VolatileCell<u32>,
142}
143#[doc = "UART Masked Interrupt Status"]
144pub mod mis;
145#[doc = "UART Interrupt Clear"]
146pub struct ICR {
147 register: vcell::VolatileCell<u32>,
148}
149#[doc = "UART Interrupt Clear"]
150pub mod icr;
151#[doc = "UART DMA Control"]
152pub struct DMACTL {
153 register: vcell::VolatileCell<u32>,
154}
155#[doc = "UART DMA Control"]
156pub mod dmactl;
157#[doc = "UART 9-Bit Self Address"]
158pub struct _9BITADDR {
159 register: vcell::VolatileCell<u32>,
160}
161#[doc = "UART 9-Bit Self Address"]
162pub mod _9bitaddr;
163#[doc = "UART 9-Bit Self Address Mask"]
164pub struct _9BITAMASK {
165 register: vcell::VolatileCell<u32>,
166}
167#[doc = "UART 9-Bit Self Address Mask"]
168pub mod _9bitamask;
169#[doc = "UART Peripheral Properties"]
170pub struct PP {
171 register: vcell::VolatileCell<u32>,
172}
173#[doc = "UART Peripheral Properties"]
174pub mod pp;
175#[doc = "UART Clock Configuration"]
176pub struct CC {
177 register: vcell::VolatileCell<u32>,
178}
179#[doc = "UART Clock Configuration"]
180pub mod cc;