1#[doc = "Register `TACCTL1` reader"]
2pub struct R(crate::R<TACCTL1_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<TACCTL1_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<TACCTL1_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<TACCTL1_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `TACCTL1` writer"]
17pub struct W(crate::W<TACCTL1_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<TACCTL1_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<TACCTL1_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<TACCTL1_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `CCIFG` reader - Capture/compare interrupt flag"]
38pub type CCIFG_R = crate::BitReader<bool>;
39#[doc = "Field `CCIFG` writer - Capture/compare interrupt flag"]
40pub type CCIFG_W<'a, const O: u8> = crate::BitWriter<'a, u16, TACCTL1_SPEC, bool, O>;
41#[doc = "Field `COV` reader - Capture/compare overflow flag"]
42pub type COV_R = crate::BitReader<bool>;
43#[doc = "Field `COV` writer - Capture/compare overflow flag"]
44pub type COV_W<'a, const O: u8> = crate::BitWriter<'a, u16, TACCTL1_SPEC, bool, O>;
45#[doc = "Field `OUT` reader - PWM Output signal if output mode 0"]
46pub type OUT_R = crate::BitReader<bool>;
47#[doc = "Field `OUT` writer - PWM Output signal if output mode 0"]
48pub type OUT_W<'a, const O: u8> = crate::BitWriter<'a, u16, TACCTL1_SPEC, bool, O>;
49#[doc = "Field `CCI` reader - Capture input signal (read)"]
50pub type CCI_R = crate::BitReader<bool>;
51#[doc = "Field `CCI` writer - Capture input signal (read)"]
52pub type CCI_W<'a, const O: u8> = crate::BitWriter<'a, u16, TACCTL1_SPEC, bool, O>;
53#[doc = "Field `CCIE` reader - Capture/compare interrupt enable"]
54pub type CCIE_R = crate::BitReader<bool>;
55#[doc = "Field `CCIE` writer - Capture/compare interrupt enable"]
56pub type CCIE_W<'a, const O: u8> = crate::BitWriter<'a, u16, TACCTL1_SPEC, bool, O>;
57#[doc = "Field `OUTMOD` reader - Output mode 2"]
58pub type OUTMOD_R = crate::FieldReader<u8, OUTMOD_A>;
59#[doc = "Output mode 2\n\nValue on reset: 0"]
60#[derive(Clone, Copy, Debug, PartialEq, Eq)]
61#[repr(u8)]
62pub enum OUTMOD_A {
63 #[doc = "0: PWM output mode: 0 - output only"]
64 OUTMOD_0 = 0,
65 #[doc = "1: PWM output mode: 1 - set"]
66 OUTMOD_1 = 1,
67 #[doc = "2: PWM output mode: 2 - PWM toggle/reset"]
68 OUTMOD_2 = 2,
69 #[doc = "3: PWM output mode: 3 - PWM set/reset"]
70 OUTMOD_3 = 3,
71 #[doc = "4: PWM output mode: 4 - toggle"]
72 OUTMOD_4 = 4,
73 #[doc = "5: PWM output mode: 5 - Reset"]
74 OUTMOD_5 = 5,
75 #[doc = "6: PWM output mode: 6 - PWM toggle/set"]
76 OUTMOD_6 = 6,
77 #[doc = "7: PWM output mode: 7 - PWM reset/set"]
78 OUTMOD_7 = 7,
79}
80impl From<OUTMOD_A> for u8 {
81 #[inline(always)]
82 fn from(variant: OUTMOD_A) -> Self {
83 variant as _
84 }
85}
86impl OUTMOD_R {
87 #[doc = "Get enumerated values variant"]
88 #[inline(always)]
89 pub fn variant(&self) -> OUTMOD_A {
90 match self.bits {
91 0 => OUTMOD_A::OUTMOD_0,
92 1 => OUTMOD_A::OUTMOD_1,
93 2 => OUTMOD_A::OUTMOD_2,
94 3 => OUTMOD_A::OUTMOD_3,
95 4 => OUTMOD_A::OUTMOD_4,
96 5 => OUTMOD_A::OUTMOD_5,
97 6 => OUTMOD_A::OUTMOD_6,
98 7 => OUTMOD_A::OUTMOD_7,
99 _ => unreachable!(),
100 }
101 }
102 #[doc = "Checks if the value of the field is `OUTMOD_0`"]
103 #[inline(always)]
104 pub fn is_outmod_0(&self) -> bool {
105 *self == OUTMOD_A::OUTMOD_0
106 }
107 #[doc = "Checks if the value of the field is `OUTMOD_1`"]
108 #[inline(always)]
109 pub fn is_outmod_1(&self) -> bool {
110 *self == OUTMOD_A::OUTMOD_1
111 }
112 #[doc = "Checks if the value of the field is `OUTMOD_2`"]
113 #[inline(always)]
114 pub fn is_outmod_2(&self) -> bool {
115 *self == OUTMOD_A::OUTMOD_2
116 }
117 #[doc = "Checks if the value of the field is `OUTMOD_3`"]
118 #[inline(always)]
119 pub fn is_outmod_3(&self) -> bool {
120 *self == OUTMOD_A::OUTMOD_3
121 }
122 #[doc = "Checks if the value of the field is `OUTMOD_4`"]
123 #[inline(always)]
124 pub fn is_outmod_4(&self) -> bool {
125 *self == OUTMOD_A::OUTMOD_4
126 }
127 #[doc = "Checks if the value of the field is `OUTMOD_5`"]
128 #[inline(always)]
129 pub fn is_outmod_5(&self) -> bool {
130 *self == OUTMOD_A::OUTMOD_5
131 }
132 #[doc = "Checks if the value of the field is `OUTMOD_6`"]
133 #[inline(always)]
134 pub fn is_outmod_6(&self) -> bool {
135 *self == OUTMOD_A::OUTMOD_6
136 }
137 #[doc = "Checks if the value of the field is `OUTMOD_7`"]
138 #[inline(always)]
139 pub fn is_outmod_7(&self) -> bool {
140 *self == OUTMOD_A::OUTMOD_7
141 }
142}
143#[doc = "Field `OUTMOD` writer - Output mode 2"]
144pub type OUTMOD_W<'a, const O: u8> =
145 crate::FieldWriterSafe<'a, u16, TACCTL1_SPEC, u8, OUTMOD_A, 3, O>;
146impl<'a, const O: u8> OUTMOD_W<'a, O> {
147 #[doc = "PWM output mode: 0 - output only"]
148 #[inline(always)]
149 pub fn outmod_0(self) -> &'a mut W {
150 self.variant(OUTMOD_A::OUTMOD_0)
151 }
152 #[doc = "PWM output mode: 1 - set"]
153 #[inline(always)]
154 pub fn outmod_1(self) -> &'a mut W {
155 self.variant(OUTMOD_A::OUTMOD_1)
156 }
157 #[doc = "PWM output mode: 2 - PWM toggle/reset"]
158 #[inline(always)]
159 pub fn outmod_2(self) -> &'a mut W {
160 self.variant(OUTMOD_A::OUTMOD_2)
161 }
162 #[doc = "PWM output mode: 3 - PWM set/reset"]
163 #[inline(always)]
164 pub fn outmod_3(self) -> &'a mut W {
165 self.variant(OUTMOD_A::OUTMOD_3)
166 }
167 #[doc = "PWM output mode: 4 - toggle"]
168 #[inline(always)]
169 pub fn outmod_4(self) -> &'a mut W {
170 self.variant(OUTMOD_A::OUTMOD_4)
171 }
172 #[doc = "PWM output mode: 5 - Reset"]
173 #[inline(always)]
174 pub fn outmod_5(self) -> &'a mut W {
175 self.variant(OUTMOD_A::OUTMOD_5)
176 }
177 #[doc = "PWM output mode: 6 - PWM toggle/set"]
178 #[inline(always)]
179 pub fn outmod_6(self) -> &'a mut W {
180 self.variant(OUTMOD_A::OUTMOD_6)
181 }
182 #[doc = "PWM output mode: 7 - PWM reset/set"]
183 #[inline(always)]
184 pub fn outmod_7(self) -> &'a mut W {
185 self.variant(OUTMOD_A::OUTMOD_7)
186 }
187}
188#[doc = "Field `CAP` reader - Capture mode: 1 /Compare mode : 0"]
189pub type CAP_R = crate::BitReader<bool>;
190#[doc = "Field `CAP` writer - Capture mode: 1 /Compare mode : 0"]
191pub type CAP_W<'a, const O: u8> = crate::BitWriter<'a, u16, TACCTL1_SPEC, bool, O>;
192#[doc = "Field `SCCI` reader - Latched capture signal (read)"]
193pub type SCCI_R = crate::BitReader<bool>;
194#[doc = "Field `SCCI` writer - Latched capture signal (read)"]
195pub type SCCI_W<'a, const O: u8> = crate::BitWriter<'a, u16, TACCTL1_SPEC, bool, O>;
196#[doc = "Field `SCS` reader - Capture sychronize"]
197pub type SCS_R = crate::BitReader<bool>;
198#[doc = "Field `SCS` writer - Capture sychronize"]
199pub type SCS_W<'a, const O: u8> = crate::BitWriter<'a, u16, TACCTL1_SPEC, bool, O>;
200#[doc = "Field `CCIS` reader - Capture input select 1"]
201pub type CCIS_R = crate::FieldReader<u8, CCIS_A>;
202#[doc = "Capture input select 1\n\nValue on reset: 0"]
203#[derive(Clone, Copy, Debug, PartialEq, Eq)]
204#[repr(u8)]
205pub enum CCIS_A {
206 #[doc = "0: Capture input select: 0 - CCIxA"]
207 CCIS_0 = 0,
208 #[doc = "1: Capture input select: 1 - CCIxB"]
209 CCIS_1 = 1,
210 #[doc = "2: Capture input select: 2 - GND"]
211 CCIS_2 = 2,
212 #[doc = "3: Capture input select: 3 - Vcc"]
213 CCIS_3 = 3,
214}
215impl From<CCIS_A> for u8 {
216 #[inline(always)]
217 fn from(variant: CCIS_A) -> Self {
218 variant as _
219 }
220}
221impl CCIS_R {
222 #[doc = "Get enumerated values variant"]
223 #[inline(always)]
224 pub fn variant(&self) -> CCIS_A {
225 match self.bits {
226 0 => CCIS_A::CCIS_0,
227 1 => CCIS_A::CCIS_1,
228 2 => CCIS_A::CCIS_2,
229 3 => CCIS_A::CCIS_3,
230 _ => unreachable!(),
231 }
232 }
233 #[doc = "Checks if the value of the field is `CCIS_0`"]
234 #[inline(always)]
235 pub fn is_ccis_0(&self) -> bool {
236 *self == CCIS_A::CCIS_0
237 }
238 #[doc = "Checks if the value of the field is `CCIS_1`"]
239 #[inline(always)]
240 pub fn is_ccis_1(&self) -> bool {
241 *self == CCIS_A::CCIS_1
242 }
243 #[doc = "Checks if the value of the field is `CCIS_2`"]
244 #[inline(always)]
245 pub fn is_ccis_2(&self) -> bool {
246 *self == CCIS_A::CCIS_2
247 }
248 #[doc = "Checks if the value of the field is `CCIS_3`"]
249 #[inline(always)]
250 pub fn is_ccis_3(&self) -> bool {
251 *self == CCIS_A::CCIS_3
252 }
253}
254#[doc = "Field `CCIS` writer - Capture input select 1"]
255pub type CCIS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u16, TACCTL1_SPEC, u8, CCIS_A, 2, O>;
256impl<'a, const O: u8> CCIS_W<'a, O> {
257 #[doc = "Capture input select: 0 - CCIxA"]
258 #[inline(always)]
259 pub fn ccis_0(self) -> &'a mut W {
260 self.variant(CCIS_A::CCIS_0)
261 }
262 #[doc = "Capture input select: 1 - CCIxB"]
263 #[inline(always)]
264 pub fn ccis_1(self) -> &'a mut W {
265 self.variant(CCIS_A::CCIS_1)
266 }
267 #[doc = "Capture input select: 2 - GND"]
268 #[inline(always)]
269 pub fn ccis_2(self) -> &'a mut W {
270 self.variant(CCIS_A::CCIS_2)
271 }
272 #[doc = "Capture input select: 3 - Vcc"]
273 #[inline(always)]
274 pub fn ccis_3(self) -> &'a mut W {
275 self.variant(CCIS_A::CCIS_3)
276 }
277}
278#[doc = "Field `CM` reader - Capture mode 1"]
279pub type CM_R = crate::FieldReader<u8, CM_A>;
280#[doc = "Capture mode 1\n\nValue on reset: 0"]
281#[derive(Clone, Copy, Debug, PartialEq, Eq)]
282#[repr(u8)]
283pub enum CM_A {
284 #[doc = "0: Capture mode: 0 - disabled"]
285 CM_0 = 0,
286 #[doc = "1: Capture mode: 1 - pos. edge"]
287 CM_1 = 1,
288 #[doc = "2: Capture mode: 1 - neg. edge"]
289 CM_2 = 2,
290 #[doc = "3: Capture mode: 1 - both edges"]
291 CM_3 = 3,
292}
293impl From<CM_A> for u8 {
294 #[inline(always)]
295 fn from(variant: CM_A) -> Self {
296 variant as _
297 }
298}
299impl CM_R {
300 #[doc = "Get enumerated values variant"]
301 #[inline(always)]
302 pub fn variant(&self) -> CM_A {
303 match self.bits {
304 0 => CM_A::CM_0,
305 1 => CM_A::CM_1,
306 2 => CM_A::CM_2,
307 3 => CM_A::CM_3,
308 _ => unreachable!(),
309 }
310 }
311 #[doc = "Checks if the value of the field is `CM_0`"]
312 #[inline(always)]
313 pub fn is_cm_0(&self) -> bool {
314 *self == CM_A::CM_0
315 }
316 #[doc = "Checks if the value of the field is `CM_1`"]
317 #[inline(always)]
318 pub fn is_cm_1(&self) -> bool {
319 *self == CM_A::CM_1
320 }
321 #[doc = "Checks if the value of the field is `CM_2`"]
322 #[inline(always)]
323 pub fn is_cm_2(&self) -> bool {
324 *self == CM_A::CM_2
325 }
326 #[doc = "Checks if the value of the field is `CM_3`"]
327 #[inline(always)]
328 pub fn is_cm_3(&self) -> bool {
329 *self == CM_A::CM_3
330 }
331}
332#[doc = "Field `CM` writer - Capture mode 1"]
333pub type CM_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u16, TACCTL1_SPEC, u8, CM_A, 2, O>;
334impl<'a, const O: u8> CM_W<'a, O> {
335 #[doc = "Capture mode: 0 - disabled"]
336 #[inline(always)]
337 pub fn cm_0(self) -> &'a mut W {
338 self.variant(CM_A::CM_0)
339 }
340 #[doc = "Capture mode: 1 - pos. edge"]
341 #[inline(always)]
342 pub fn cm_1(self) -> &'a mut W {
343 self.variant(CM_A::CM_1)
344 }
345 #[doc = "Capture mode: 1 - neg. edge"]
346 #[inline(always)]
347 pub fn cm_2(self) -> &'a mut W {
348 self.variant(CM_A::CM_2)
349 }
350 #[doc = "Capture mode: 1 - both edges"]
351 #[inline(always)]
352 pub fn cm_3(self) -> &'a mut W {
353 self.variant(CM_A::CM_3)
354 }
355}
356impl R {
357 #[doc = "Bit 0 - Capture/compare interrupt flag"]
358 #[inline(always)]
359 pub fn ccifg(&self) -> CCIFG_R {
360 CCIFG_R::new((self.bits & 1) != 0)
361 }
362 #[doc = "Bit 1 - Capture/compare overflow flag"]
363 #[inline(always)]
364 pub fn cov(&self) -> COV_R {
365 COV_R::new(((self.bits >> 1) & 1) != 0)
366 }
367 #[doc = "Bit 2 - PWM Output signal if output mode 0"]
368 #[inline(always)]
369 pub fn out(&self) -> OUT_R {
370 OUT_R::new(((self.bits >> 2) & 1) != 0)
371 }
372 #[doc = "Bit 3 - Capture input signal (read)"]
373 #[inline(always)]
374 pub fn cci(&self) -> CCI_R {
375 CCI_R::new(((self.bits >> 3) & 1) != 0)
376 }
377 #[doc = "Bit 4 - Capture/compare interrupt enable"]
378 #[inline(always)]
379 pub fn ccie(&self) -> CCIE_R {
380 CCIE_R::new(((self.bits >> 4) & 1) != 0)
381 }
382 #[doc = "Bits 5:7 - Output mode 2"]
383 #[inline(always)]
384 pub fn outmod(&self) -> OUTMOD_R {
385 OUTMOD_R::new(((self.bits >> 5) & 7) as u8)
386 }
387 #[doc = "Bit 8 - Capture mode: 1 /Compare mode : 0"]
388 #[inline(always)]
389 pub fn cap(&self) -> CAP_R {
390 CAP_R::new(((self.bits >> 8) & 1) != 0)
391 }
392 #[doc = "Bit 10 - Latched capture signal (read)"]
393 #[inline(always)]
394 pub fn scci(&self) -> SCCI_R {
395 SCCI_R::new(((self.bits >> 10) & 1) != 0)
396 }
397 #[doc = "Bit 11 - Capture sychronize"]
398 #[inline(always)]
399 pub fn scs(&self) -> SCS_R {
400 SCS_R::new(((self.bits >> 11) & 1) != 0)
401 }
402 #[doc = "Bits 12:13 - Capture input select 1"]
403 #[inline(always)]
404 pub fn ccis(&self) -> CCIS_R {
405 CCIS_R::new(((self.bits >> 12) & 3) as u8)
406 }
407 #[doc = "Bits 14:15 - Capture mode 1"]
408 #[inline(always)]
409 pub fn cm(&self) -> CM_R {
410 CM_R::new(((self.bits >> 14) & 3) as u8)
411 }
412}
413impl W {
414 #[doc = "Bit 0 - Capture/compare interrupt flag"]
415 #[inline(always)]
416 pub fn ccifg(&mut self) -> CCIFG_W<0> {
417 CCIFG_W::new(self)
418 }
419 #[doc = "Bit 1 - Capture/compare overflow flag"]
420 #[inline(always)]
421 pub fn cov(&mut self) -> COV_W<1> {
422 COV_W::new(self)
423 }
424 #[doc = "Bit 2 - PWM Output signal if output mode 0"]
425 #[inline(always)]
426 pub fn out(&mut self) -> OUT_W<2> {
427 OUT_W::new(self)
428 }
429 #[doc = "Bit 3 - Capture input signal (read)"]
430 #[inline(always)]
431 pub fn cci(&mut self) -> CCI_W<3> {
432 CCI_W::new(self)
433 }
434 #[doc = "Bit 4 - Capture/compare interrupt enable"]
435 #[inline(always)]
436 pub fn ccie(&mut self) -> CCIE_W<4> {
437 CCIE_W::new(self)
438 }
439 #[doc = "Bits 5:7 - Output mode 2"]
440 #[inline(always)]
441 pub fn outmod(&mut self) -> OUTMOD_W<5> {
442 OUTMOD_W::new(self)
443 }
444 #[doc = "Bit 8 - Capture mode: 1 /Compare mode : 0"]
445 #[inline(always)]
446 pub fn cap(&mut self) -> CAP_W<8> {
447 CAP_W::new(self)
448 }
449 #[doc = "Bit 10 - Latched capture signal (read)"]
450 #[inline(always)]
451 pub fn scci(&mut self) -> SCCI_W<10> {
452 SCCI_W::new(self)
453 }
454 #[doc = "Bit 11 - Capture sychronize"]
455 #[inline(always)]
456 pub fn scs(&mut self) -> SCS_W<11> {
457 SCS_W::new(self)
458 }
459 #[doc = "Bits 12:13 - Capture input select 1"]
460 #[inline(always)]
461 pub fn ccis(&mut self) -> CCIS_W<12> {
462 CCIS_W::new(self)
463 }
464 #[doc = "Bits 14:15 - Capture mode 1"]
465 #[inline(always)]
466 pub fn cm(&mut self) -> CM_W<14> {
467 CM_W::new(self)
468 }
469 #[doc = "Writes raw bits to the register."]
470 #[inline(always)]
471 pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
472 self.0.bits(bits);
473 self
474 }
475}
476#[doc = "Timer A Capture/Compare Control 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tacctl1](index.html) module"]
477pub struct TACCTL1_SPEC;
478impl crate::RegisterSpec for TACCTL1_SPEC {
479 type Ux = u16;
480}
481#[doc = "`read()` method returns [tacctl1::R](R) reader structure"]
482impl crate::Readable for TACCTL1_SPEC {
483 type Reader = R;
484}
485#[doc = "`write(|w| ..)` method takes [tacctl1::W](W) writer structure"]
486impl crate::Writable for TACCTL1_SPEC {
487 type Writer = W;
488}
489#[doc = "`reset()` method sets TACCTL1 to value 0"]
490impl crate::Resettable for TACCTL1_SPEC {
491 #[inline(always)]
492 fn reset_value() -> Self::Ux {
493 0
494 }
495}