msp430f6736/
usci_a1_uart_mode.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    #[doc = "0x00 - USCI A1 Control Register 1"]
5    pub uca1ctl1: crate::Reg<uca1ctl1::UCA1CTL1_SPEC>,
6    #[doc = "0x01 - USCI A1 Control Register 0"]
7    pub uca1ctl0: crate::Reg<uca1ctl0::UCA1CTL0_SPEC>,
8    #[doc = "0x02 - USCI A1 Control Word Register 1"]
9    pub uca1ctlw1: crate::Reg<uca1ctlw1::UCA1CTLW1_SPEC>,
10    _reserved3: [u8; 0x02],
11    #[doc = "0x06 - USCI A1 Baud Rate 0"]
12    pub uca1br0: crate::Reg<uca1br0::UCA1BR0_SPEC>,
13    #[doc = "0x07 - USCI A1 Baud Rate 1"]
14    pub uca1br1: crate::Reg<uca1br1::UCA1BR1_SPEC>,
15    #[doc = "0x08 - USCI A1 Modulation Control"]
16    pub uca1mctlw: crate::Reg<uca1mctlw::UCA1MCTLW_SPEC>,
17    #[doc = "0x0a - USCI A1 Status Register"]
18    pub uca1statw: crate::Reg<uca1statw::UCA1STATW_SPEC>,
19    _reserved7: [u8; 0x01],
20    #[doc = "0x0c - USCI A1 Receive Buffer"]
21    pub uca1rxbuf: crate::Reg<uca1rxbuf::UCA1RXBUF_SPEC>,
22    #[doc = "0x0e - USCI A1 Transmit Buffer"]
23    pub uca1txbuf: crate::Reg<uca1txbuf::UCA1TXBUF_SPEC>,
24    #[doc = "0x10 - USCI A1 LIN Control"]
25    pub uca1abctl: crate::Reg<uca1abctl::UCA1ABCTL_SPEC>,
26    _reserved10: [u8; 0x01],
27    #[doc = "0x12 - USCI A1 IrDA Transmit Control"]
28    pub uca1irtctl: crate::Reg<uca1irtctl::UCA1IRTCTL_SPEC>,
29    #[doc = "0x13 - USCI A1 IrDA Receive Control"]
30    pub uca1irrctl: crate::Reg<uca1irrctl::UCA1IRRCTL_SPEC>,
31    _reserved12: [u8; 0x0a],
32    #[doc = "0x1e - USCI A1 Interrupt Vector Register"]
33    pub uca1iv: crate::Reg<uca1iv::UCA1IV_SPEC>,
34}
35#[doc = "UCA1CTL1 register accessor: an alias for `Reg<UCA1CTL1_SPEC>`"]
36pub type UCA1CTL1 = crate::Reg<uca1ctl1::UCA1CTL1_SPEC>;
37#[doc = "USCI A1 Control Register 1"]
38pub mod uca1ctl1;
39#[doc = "UCA1CTL0 register accessor: an alias for `Reg<UCA1CTL0_SPEC>`"]
40pub type UCA1CTL0 = crate::Reg<uca1ctl0::UCA1CTL0_SPEC>;
41#[doc = "USCI A1 Control Register 0"]
42pub mod uca1ctl0;
43#[doc = "UCA1BR0 register accessor: an alias for `Reg<UCA1BR0_SPEC>`"]
44pub type UCA1BR0 = crate::Reg<uca1br0::UCA1BR0_SPEC>;
45#[doc = "USCI A1 Baud Rate 0"]
46pub mod uca1br0;
47#[doc = "UCA1BR1 register accessor: an alias for `Reg<UCA1BR1_SPEC>`"]
48pub type UCA1BR1 = crate::Reg<uca1br1::UCA1BR1_SPEC>;
49#[doc = "USCI A1 Baud Rate 1"]
50pub mod uca1br1;
51#[doc = "UCA1STATW register accessor: an alias for `Reg<UCA1STATW_SPEC>`"]
52pub type UCA1STATW = crate::Reg<uca1statw::UCA1STATW_SPEC>;
53#[doc = "USCI A1 Status Register"]
54pub mod uca1statw;
55#[doc = "UCA1ABCTL register accessor: an alias for `Reg<UCA1ABCTL_SPEC>`"]
56pub type UCA1ABCTL = crate::Reg<uca1abctl::UCA1ABCTL_SPEC>;
57#[doc = "USCI A1 LIN Control"]
58pub mod uca1abctl;
59#[doc = "UCA1IRTCTL register accessor: an alias for `Reg<UCA1IRTCTL_SPEC>`"]
60pub type UCA1IRTCTL = crate::Reg<uca1irtctl::UCA1IRTCTL_SPEC>;
61#[doc = "USCI A1 IrDA Transmit Control"]
62pub mod uca1irtctl;
63#[doc = "UCA1IRRCTL register accessor: an alias for `Reg<UCA1IRRCTL_SPEC>`"]
64pub type UCA1IRRCTL = crate::Reg<uca1irrctl::UCA1IRRCTL_SPEC>;
65#[doc = "USCI A1 IrDA Receive Control"]
66pub mod uca1irrctl;
67#[doc = "UCA1CTLW1 register accessor: an alias for `Reg<UCA1CTLW1_SPEC>`"]
68pub type UCA1CTLW1 = crate::Reg<uca1ctlw1::UCA1CTLW1_SPEC>;
69#[doc = "USCI A1 Control Word Register 1"]
70pub mod uca1ctlw1;
71#[doc = "UCA1MCTLW register accessor: an alias for `Reg<UCA1MCTLW_SPEC>`"]
72pub type UCA1MCTLW = crate::Reg<uca1mctlw::UCA1MCTLW_SPEC>;
73#[doc = "USCI A1 Modulation Control"]
74pub mod uca1mctlw;
75#[doc = "UCA1RXBUF register accessor: an alias for `Reg<UCA1RXBUF_SPEC>`"]
76pub type UCA1RXBUF = crate::Reg<uca1rxbuf::UCA1RXBUF_SPEC>;
77#[doc = "USCI A1 Receive Buffer"]
78pub mod uca1rxbuf;
79#[doc = "UCA1TXBUF register accessor: an alias for `Reg<UCA1TXBUF_SPEC>`"]
80pub type UCA1TXBUF = crate::Reg<uca1txbuf::UCA1TXBUF_SPEC>;
81#[doc = "USCI A1 Transmit Buffer"]
82pub mod uca1txbuf;
83#[doc = "UCA1IV register accessor: an alias for `Reg<UCA1IV_SPEC>`"]
84pub type UCA1IV = crate::Reg<uca1iv::UCA1IV_SPEC>;
85#[doc = "USCI A1 Interrupt Vector Register"]
86pub mod uca1iv;
msp430f6736/usci_a1_uart_mode.rs

msp430f6736/
usci_a1_uart_mode.rs
