msp430f6736/rtc_c_real_time_clock/
rtcctl0.rs

1#[doc = "Register `RTCCTL0` reader"]
2pub struct R(crate::R<RTCCTL0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<RTCCTL0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<RTCCTL0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<RTCCTL0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `RTCCTL0` writer"]
17pub struct W(crate::W<RTCCTL0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<RTCCTL0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<RTCCTL0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<RTCCTL0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `RTCRDYIFG` reader - RTC Ready Interrupt Flag"]
38pub type RTCRDYIFG_R = crate::BitReader<bool>;
39#[doc = "Field `RTCRDYIFG` writer - RTC Ready Interrupt Flag"]
40pub type RTCRDYIFG_W<'a> = crate::BitWriter<'a, u16, RTCCTL0_SPEC, bool, 0>;
41#[doc = "Field `RTCAIFG` reader - RTC Alarm Interrupt Flag"]
42pub type RTCAIFG_R = crate::BitReader<bool>;
43#[doc = "Field `RTCAIFG` writer - RTC Alarm Interrupt Flag"]
44pub type RTCAIFG_W<'a> = crate::BitWriter<'a, u16, RTCCTL0_SPEC, bool, 1>;
45#[doc = "Field `RTCTEVIFG` reader - RTC Time Event Interrupt Flag"]
46pub type RTCTEVIFG_R = crate::BitReader<bool>;
47#[doc = "Field `RTCTEVIFG` writer - RTC Time Event Interrupt Flag"]
48pub type RTCTEVIFG_W<'a> = crate::BitWriter<'a, u16, RTCCTL0_SPEC, bool, 2>;
49#[doc = "Field `RTCOFIFG` reader - RTC 32kHz cyrstal oscillator fault interrupt flag"]
50pub type RTCOFIFG_R = crate::BitReader<bool>;
51#[doc = "Field `RTCOFIFG` writer - RTC 32kHz cyrstal oscillator fault interrupt flag"]
52pub type RTCOFIFG_W<'a> = crate::BitWriter<'a, u16, RTCCTL0_SPEC, bool, 3>;
53#[doc = "Field `RTCRDYIE` reader - RTC Ready Interrupt Enable Flag"]
54pub type RTCRDYIE_R = crate::BitReader<bool>;
55#[doc = "Field `RTCRDYIE` writer - RTC Ready Interrupt Enable Flag"]
56pub type RTCRDYIE_W<'a> = crate::BitWriter<'a, u16, RTCCTL0_SPEC, bool, 4>;
57#[doc = "Field `RTCAIE` reader - RTC Alarm Interrupt Enable Flag"]
58pub type RTCAIE_R = crate::BitReader<bool>;
59#[doc = "Field `RTCAIE` writer - RTC Alarm Interrupt Enable Flag"]
60pub type RTCAIE_W<'a> = crate::BitWriter<'a, u16, RTCCTL0_SPEC, bool, 5>;
61#[doc = "Field `RTCTEVIE` reader - RTC Time Event Interrupt Enable Flag"]
62pub type RTCTEVIE_R = crate::BitReader<bool>;
63#[doc = "Field `RTCTEVIE` writer - RTC Time Event Interrupt Enable Flag"]
64pub type RTCTEVIE_W<'a> = crate::BitWriter<'a, u16, RTCCTL0_SPEC, bool, 6>;
65#[doc = "Field `RTCOFIE` reader - RTC 32kHz cyrstal oscillator fault interrupt enable"]
66pub type RTCOFIE_R = crate::BitReader<bool>;
67#[doc = "Field `RTCOFIE` writer - RTC 32kHz cyrstal oscillator fault interrupt enable"]
68pub type RTCOFIE_W<'a> = crate::BitWriter<'a, u16, RTCCTL0_SPEC, bool, 7>;
69impl R {
70    #[doc = "Bit 0 - RTC Ready Interrupt Flag"]
71    #[inline(always)]
72    pub fn rtcrdyifg(&self) -> RTCRDYIFG_R {
73        RTCRDYIFG_R::new((self.bits & 1) != 0)
74    }
75    #[doc = "Bit 1 - RTC Alarm Interrupt Flag"]
76    #[inline(always)]
77    pub fn rtcaifg(&self) -> RTCAIFG_R {
78        RTCAIFG_R::new(((self.bits >> 1) & 1) != 0)
79    }
80    #[doc = "Bit 2 - RTC Time Event Interrupt Flag"]
81    #[inline(always)]
82    pub fn rtctevifg(&self) -> RTCTEVIFG_R {
83        RTCTEVIFG_R::new(((self.bits >> 2) & 1) != 0)
84    }
85    #[doc = "Bit 3 - RTC 32kHz cyrstal oscillator fault interrupt flag"]
86    #[inline(always)]
87    pub fn rtcofifg(&self) -> RTCOFIFG_R {
88        RTCOFIFG_R::new(((self.bits >> 3) & 1) != 0)
89    }
90    #[doc = "Bit 4 - RTC Ready Interrupt Enable Flag"]
91    #[inline(always)]
92    pub fn rtcrdyie(&self) -> RTCRDYIE_R {
93        RTCRDYIE_R::new(((self.bits >> 4) & 1) != 0)
94    }
95    #[doc = "Bit 5 - RTC Alarm Interrupt Enable Flag"]
96    #[inline(always)]
97    pub fn rtcaie(&self) -> RTCAIE_R {
98        RTCAIE_R::new(((self.bits >> 5) & 1) != 0)
99    }
100    #[doc = "Bit 6 - RTC Time Event Interrupt Enable Flag"]
101    #[inline(always)]
102    pub fn rtctevie(&self) -> RTCTEVIE_R {
103        RTCTEVIE_R::new(((self.bits >> 6) & 1) != 0)
104    }
105    #[doc = "Bit 7 - RTC 32kHz cyrstal oscillator fault interrupt enable"]
106    #[inline(always)]
107    pub fn rtcofie(&self) -> RTCOFIE_R {
108        RTCOFIE_R::new(((self.bits >> 7) & 1) != 0)
109    }
110}
111impl W {
112    #[doc = "Bit 0 - RTC Ready Interrupt Flag"]
113    #[inline(always)]
114    pub fn rtcrdyifg(&mut self) -> RTCRDYIFG_W {
115        RTCRDYIFG_W::new(self)
116    }
117    #[doc = "Bit 1 - RTC Alarm Interrupt Flag"]
118    #[inline(always)]
119    pub fn rtcaifg(&mut self) -> RTCAIFG_W {
120        RTCAIFG_W::new(self)
121    }
122    #[doc = "Bit 2 - RTC Time Event Interrupt Flag"]
123    #[inline(always)]
124    pub fn rtctevifg(&mut self) -> RTCTEVIFG_W {
125        RTCTEVIFG_W::new(self)
126    }
127    #[doc = "Bit 3 - RTC 32kHz cyrstal oscillator fault interrupt flag"]
128    #[inline(always)]
129    pub fn rtcofifg(&mut self) -> RTCOFIFG_W {
130        RTCOFIFG_W::new(self)
131    }
132    #[doc = "Bit 4 - RTC Ready Interrupt Enable Flag"]
133    #[inline(always)]
134    pub fn rtcrdyie(&mut self) -> RTCRDYIE_W {
135        RTCRDYIE_W::new(self)
136    }
137    #[doc = "Bit 5 - RTC Alarm Interrupt Enable Flag"]
138    #[inline(always)]
139    pub fn rtcaie(&mut self) -> RTCAIE_W {
140        RTCAIE_W::new(self)
141    }
142    #[doc = "Bit 6 - RTC Time Event Interrupt Enable Flag"]
143    #[inline(always)]
144    pub fn rtctevie(&mut self) -> RTCTEVIE_W {
145        RTCTEVIE_W::new(self)
146    }
147    #[doc = "Bit 7 - RTC 32kHz cyrstal oscillator fault interrupt enable"]
148    #[inline(always)]
149    pub fn rtcofie(&mut self) -> RTCOFIE_W {
150        RTCOFIE_W::new(self)
151    }
152    #[doc = "Writes raw bits to the register."]
153    #[inline(always)]
154    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
155        self.0.bits(bits);
156        self
157    }
158}
159#[doc = "Real Timer Clock Control 0/Key\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rtcctl0](index.html) module"]
160pub struct RTCCTL0_SPEC;
161impl crate::RegisterSpec for RTCCTL0_SPEC {
162    type Ux = u16;
163}
164#[doc = "`read()` method returns [rtcctl0::R](R) reader structure"]
165impl crate::Readable for RTCCTL0_SPEC {
166    type Reader = R;
167}
168#[doc = "`write(|w| ..)` method takes [rtcctl0::W](W) writer structure"]
169impl crate::Writable for RTCCTL0_SPEC {
170    type Writer = W;
171}
172#[doc = "`reset()` method sets RTCCTL0 to value 0"]
173impl crate::Resettable for RTCCTL0_SPEC {
174    #[inline(always)]
175    fn reset_value() -> Self::Ux {
176        0
177    }
178}
msp430f6736/rtc_c_real_time_clock/rtcctl0.rs

msp430f6736/rtc_c_real_time_clock/
rtcctl0.rs
