msp430f5529/timer_0_b7/
tb0ctl.rs

1#[doc = "Register `TB0CTL` reader"]
2pub struct R(crate::R<TB0CTL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<TB0CTL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<TB0CTL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<TB0CTL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `TB0CTL` writer"]
17pub struct W(crate::W<TB0CTL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<TB0CTL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<TB0CTL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<TB0CTL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TBIFG` reader - Timer0_B7 interrupt flag"]
38pub struct TBIFG_R(crate::FieldReader<bool, bool>);
39impl TBIFG_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        TBIFG_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for TBIFG_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `TBIFG` writer - Timer0_B7 interrupt flag"]
53pub struct TBIFG_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> TBIFG_W<'a> {
57    #[doc = r"Sets the field bit"]
58    #[inline(always)]
59    pub fn set_bit(self) -> &'a mut W {
60        self.bit(true)
61    }
62    #[doc = r"Clears the field bit"]
63    #[inline(always)]
64    pub fn clear_bit(self) -> &'a mut W {
65        self.bit(false)
66    }
67    #[doc = r"Writes raw bits to the field"]
68    #[inline(always)]
69    pub fn bit(self, value: bool) -> &'a mut W {
70        self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01);
71        self.w
72    }
73}
74#[doc = "Field `TBIE` reader - Timer0_B7 interrupt enable"]
75pub struct TBIE_R(crate::FieldReader<bool, bool>);
76impl TBIE_R {
77    #[inline(always)]
78    pub(crate) fn new(bits: bool) -> Self {
79        TBIE_R(crate::FieldReader::new(bits))
80    }
81}
82impl core::ops::Deref for TBIE_R {
83    type Target = crate::FieldReader<bool, bool>;
84    #[inline(always)]
85    fn deref(&self) -> &Self::Target {
86        &self.0
87    }
88}
89#[doc = "Field `TBIE` writer - Timer0_B7 interrupt enable"]
90pub struct TBIE_W<'a> {
91    w: &'a mut W,
92}
93impl<'a> TBIE_W<'a> {
94    #[doc = r"Sets the field bit"]
95    #[inline(always)]
96    pub fn set_bit(self) -> &'a mut W {
97        self.bit(true)
98    }
99    #[doc = r"Clears the field bit"]
100    #[inline(always)]
101    pub fn clear_bit(self) -> &'a mut W {
102        self.bit(false)
103    }
104    #[doc = r"Writes raw bits to the field"]
105    #[inline(always)]
106    pub fn bit(self, value: bool) -> &'a mut W {
107        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1);
108        self.w
109    }
110}
111#[doc = "Field `TBCLR` reader - Timer0_B7 counter clear"]
112pub struct TBCLR_R(crate::FieldReader<bool, bool>);
113impl TBCLR_R {
114    #[inline(always)]
115    pub(crate) fn new(bits: bool) -> Self {
116        TBCLR_R(crate::FieldReader::new(bits))
117    }
118}
119impl core::ops::Deref for TBCLR_R {
120    type Target = crate::FieldReader<bool, bool>;
121    #[inline(always)]
122    fn deref(&self) -> &Self::Target {
123        &self.0
124    }
125}
126#[doc = "Field `TBCLR` writer - Timer0_B7 counter clear"]
127pub struct TBCLR_W<'a> {
128    w: &'a mut W,
129}
130impl<'a> TBCLR_W<'a> {
131    #[doc = r"Sets the field bit"]
132    #[inline(always)]
133    pub fn set_bit(self) -> &'a mut W {
134        self.bit(true)
135    }
136    #[doc = r"Clears the field bit"]
137    #[inline(always)]
138    pub fn clear_bit(self) -> &'a mut W {
139        self.bit(false)
140    }
141    #[doc = r"Writes raw bits to the field"]
142    #[inline(always)]
143    pub fn bit(self, value: bool) -> &'a mut W {
144        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2);
145        self.w
146    }
147}
148#[doc = "Timer0_B7 mode control 1\n\nValue on reset: 0"]
149#[derive(Clone, Copy, Debug, PartialEq)]
150#[repr(u8)]
151pub enum MC_A {
152    #[doc = "0: Timer A mode control: 0 - Stop"]
153    MC_0 = 0,
154    #[doc = "1: Timer A mode control: 1 - Up to CCR0"]
155    MC_1 = 1,
156    #[doc = "2: Timer A mode control: 2 - Continuous up"]
157    MC_2 = 2,
158    #[doc = "3: Timer A mode control: 3 - Up/Down"]
159    MC_3 = 3,
160}
161impl From<MC_A> for u8 {
162    #[inline(always)]
163    fn from(variant: MC_A) -> Self {
164        variant as _
165    }
166}
167#[doc = "Field `MC` reader - Timer0_B7 mode control 1"]
168pub struct MC_R(crate::FieldReader<u8, MC_A>);
169impl MC_R {
170    #[inline(always)]
171    pub(crate) fn new(bits: u8) -> Self {
172        MC_R(crate::FieldReader::new(bits))
173    }
174    #[doc = r"Get enumerated values variant"]
175    #[inline(always)]
176    pub fn variant(&self) -> MC_A {
177        match self.bits {
178            0 => MC_A::MC_0,
179            1 => MC_A::MC_1,
180            2 => MC_A::MC_2,
181            3 => MC_A::MC_3,
182            _ => unreachable!(),
183        }
184    }
185    #[doc = "Checks if the value of the field is `MC_0`"]
186    #[inline(always)]
187    pub fn is_mc_0(&self) -> bool {
188        **self == MC_A::MC_0
189    }
190    #[doc = "Checks if the value of the field is `MC_1`"]
191    #[inline(always)]
192    pub fn is_mc_1(&self) -> bool {
193        **self == MC_A::MC_1
194    }
195    #[doc = "Checks if the value of the field is `MC_2`"]
196    #[inline(always)]
197    pub fn is_mc_2(&self) -> bool {
198        **self == MC_A::MC_2
199    }
200    #[doc = "Checks if the value of the field is `MC_3`"]
201    #[inline(always)]
202    pub fn is_mc_3(&self) -> bool {
203        **self == MC_A::MC_3
204    }
205}
206impl core::ops::Deref for MC_R {
207    type Target = crate::FieldReader<u8, MC_A>;
208    #[inline(always)]
209    fn deref(&self) -> &Self::Target {
210        &self.0
211    }
212}
213#[doc = "Field `MC` writer - Timer0_B7 mode control 1"]
214pub struct MC_W<'a> {
215    w: &'a mut W,
216}
217impl<'a> MC_W<'a> {
218    #[doc = r"Writes `variant` to the field"]
219    #[inline(always)]
220    pub fn variant(self, variant: MC_A) -> &'a mut W {
221        self.bits(variant.into())
222    }
223    #[doc = "Timer A mode control: 0 - Stop"]
224    #[inline(always)]
225    pub fn mc_0(self) -> &'a mut W {
226        self.variant(MC_A::MC_0)
227    }
228    #[doc = "Timer A mode control: 1 - Up to CCR0"]
229    #[inline(always)]
230    pub fn mc_1(self) -> &'a mut W {
231        self.variant(MC_A::MC_1)
232    }
233    #[doc = "Timer A mode control: 2 - Continuous up"]
234    #[inline(always)]
235    pub fn mc_2(self) -> &'a mut W {
236        self.variant(MC_A::MC_2)
237    }
238    #[doc = "Timer A mode control: 3 - Up/Down"]
239    #[inline(always)]
240    pub fn mc_3(self) -> &'a mut W {
241        self.variant(MC_A::MC_3)
242    }
243    #[doc = r"Writes raw bits to the field"]
244    #[inline(always)]
245    pub fn bits(self, value: u8) -> &'a mut W {
246        self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u16 & 0x03) << 4);
247        self.w
248    }
249}
250#[doc = "Timer0_B7 clock input divider 1\n\nValue on reset: 0"]
251#[derive(Clone, Copy, Debug, PartialEq)]
252#[repr(u8)]
253pub enum ID_A {
254    #[doc = "0: Timer A input divider: 0 - /1"]
255    ID_0 = 0,
256    #[doc = "1: Timer A input divider: 1 - /2"]
257    ID_1 = 1,
258    #[doc = "2: Timer A input divider: 2 - /4"]
259    ID_2 = 2,
260    #[doc = "3: Timer A input divider: 3 - /8"]
261    ID_3 = 3,
262}
263impl From<ID_A> for u8 {
264    #[inline(always)]
265    fn from(variant: ID_A) -> Self {
266        variant as _
267    }
268}
269#[doc = "Field `ID` reader - Timer0_B7 clock input divider 1"]
270pub struct ID_R(crate::FieldReader<u8, ID_A>);
271impl ID_R {
272    #[inline(always)]
273    pub(crate) fn new(bits: u8) -> Self {
274        ID_R(crate::FieldReader::new(bits))
275    }
276    #[doc = r"Get enumerated values variant"]
277    #[inline(always)]
278    pub fn variant(&self) -> ID_A {
279        match self.bits {
280            0 => ID_A::ID_0,
281            1 => ID_A::ID_1,
282            2 => ID_A::ID_2,
283            3 => ID_A::ID_3,
284            _ => unreachable!(),
285        }
286    }
287    #[doc = "Checks if the value of the field is `ID_0`"]
288    #[inline(always)]
289    pub fn is_id_0(&self) -> bool {
290        **self == ID_A::ID_0
291    }
292    #[doc = "Checks if the value of the field is `ID_1`"]
293    #[inline(always)]
294    pub fn is_id_1(&self) -> bool {
295        **self == ID_A::ID_1
296    }
297    #[doc = "Checks if the value of the field is `ID_2`"]
298    #[inline(always)]
299    pub fn is_id_2(&self) -> bool {
300        **self == ID_A::ID_2
301    }
302    #[doc = "Checks if the value of the field is `ID_3`"]
303    #[inline(always)]
304    pub fn is_id_3(&self) -> bool {
305        **self == ID_A::ID_3
306    }
307}
308impl core::ops::Deref for ID_R {
309    type Target = crate::FieldReader<u8, ID_A>;
310    #[inline(always)]
311    fn deref(&self) -> &Self::Target {
312        &self.0
313    }
314}
315#[doc = "Field `ID` writer - Timer0_B7 clock input divider 1"]
316pub struct ID_W<'a> {
317    w: &'a mut W,
318}
319impl<'a> ID_W<'a> {
320    #[doc = r"Writes `variant` to the field"]
321    #[inline(always)]
322    pub fn variant(self, variant: ID_A) -> &'a mut W {
323        self.bits(variant.into())
324    }
325    #[doc = "Timer A input divider: 0 - /1"]
326    #[inline(always)]
327    pub fn id_0(self) -> &'a mut W {
328        self.variant(ID_A::ID_0)
329    }
330    #[doc = "Timer A input divider: 1 - /2"]
331    #[inline(always)]
332    pub fn id_1(self) -> &'a mut W {
333        self.variant(ID_A::ID_1)
334    }
335    #[doc = "Timer A input divider: 2 - /4"]
336    #[inline(always)]
337    pub fn id_2(self) -> &'a mut W {
338        self.variant(ID_A::ID_2)
339    }
340    #[doc = "Timer A input divider: 3 - /8"]
341    #[inline(always)]
342    pub fn id_3(self) -> &'a mut W {
343        self.variant(ID_A::ID_3)
344    }
345    #[doc = r"Writes raw bits to the field"]
346    #[inline(always)]
347    pub fn bits(self, value: u8) -> &'a mut W {
348        self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u16 & 0x03) << 6);
349        self.w
350    }
351}
352#[doc = "Clock source 1\n\nValue on reset: 0"]
353#[derive(Clone, Copy, Debug, PartialEq)]
354#[repr(u8)]
355pub enum TBSSEL_A {
356    #[doc = "0: Clock Source: TBCLK"]
357    TBSSEL_0 = 0,
358    #[doc = "1: Clock Source: ACLK"]
359    TBSSEL_1 = 1,
360    #[doc = "2: Clock Source: SMCLK"]
361    TBSSEL_2 = 2,
362    #[doc = "3: Clock Source: INCLK"]
363    TBSSEL_3 = 3,
364}
365impl From<TBSSEL_A> for u8 {
366    #[inline(always)]
367    fn from(variant: TBSSEL_A) -> Self {
368        variant as _
369    }
370}
371#[doc = "Field `TBSSEL` reader - Clock source 1"]
372pub struct TBSSEL_R(crate::FieldReader<u8, TBSSEL_A>);
373impl TBSSEL_R {
374    #[inline(always)]
375    pub(crate) fn new(bits: u8) -> Self {
376        TBSSEL_R(crate::FieldReader::new(bits))
377    }
378    #[doc = r"Get enumerated values variant"]
379    #[inline(always)]
380    pub fn variant(&self) -> TBSSEL_A {
381        match self.bits {
382            0 => TBSSEL_A::TBSSEL_0,
383            1 => TBSSEL_A::TBSSEL_1,
384            2 => TBSSEL_A::TBSSEL_2,
385            3 => TBSSEL_A::TBSSEL_3,
386            _ => unreachable!(),
387        }
388    }
389    #[doc = "Checks if the value of the field is `TBSSEL_0`"]
390    #[inline(always)]
391    pub fn is_tbssel_0(&self) -> bool {
392        **self == TBSSEL_A::TBSSEL_0
393    }
394    #[doc = "Checks if the value of the field is `TBSSEL_1`"]
395    #[inline(always)]
396    pub fn is_tbssel_1(&self) -> bool {
397        **self == TBSSEL_A::TBSSEL_1
398    }
399    #[doc = "Checks if the value of the field is `TBSSEL_2`"]
400    #[inline(always)]
401    pub fn is_tbssel_2(&self) -> bool {
402        **self == TBSSEL_A::TBSSEL_2
403    }
404    #[doc = "Checks if the value of the field is `TBSSEL_3`"]
405    #[inline(always)]
406    pub fn is_tbssel_3(&self) -> bool {
407        **self == TBSSEL_A::TBSSEL_3
408    }
409}
410impl core::ops::Deref for TBSSEL_R {
411    type Target = crate::FieldReader<u8, TBSSEL_A>;
412    #[inline(always)]
413    fn deref(&self) -> &Self::Target {
414        &self.0
415    }
416}
417#[doc = "Field `TBSSEL` writer - Clock source 1"]
418pub struct TBSSEL_W<'a> {
419    w: &'a mut W,
420}
421impl<'a> TBSSEL_W<'a> {
422    #[doc = r"Writes `variant` to the field"]
423    #[inline(always)]
424    pub fn variant(self, variant: TBSSEL_A) -> &'a mut W {
425        self.bits(variant.into())
426    }
427    #[doc = "Clock Source: TBCLK"]
428    #[inline(always)]
429    pub fn tbssel_0(self) -> &'a mut W {
430        self.variant(TBSSEL_A::TBSSEL_0)
431    }
432    #[doc = "Clock Source: ACLK"]
433    #[inline(always)]
434    pub fn tbssel_1(self) -> &'a mut W {
435        self.variant(TBSSEL_A::TBSSEL_1)
436    }
437    #[doc = "Clock Source: SMCLK"]
438    #[inline(always)]
439    pub fn tbssel_2(self) -> &'a mut W {
440        self.variant(TBSSEL_A::TBSSEL_2)
441    }
442    #[doc = "Clock Source: INCLK"]
443    #[inline(always)]
444    pub fn tbssel_3(self) -> &'a mut W {
445        self.variant(TBSSEL_A::TBSSEL_3)
446    }
447    #[doc = r"Writes raw bits to the field"]
448    #[inline(always)]
449    pub fn bits(self, value: u8) -> &'a mut W {
450        self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u16 & 0x03) << 8);
451        self.w
452    }
453}
454#[doc = "Counter lenght 1\n\nValue on reset: 0"]
455#[derive(Clone, Copy, Debug, PartialEq)]
456#[repr(u8)]
457pub enum CNTL_A {
458    #[doc = "0: Counter lenght: 16 bit"]
459    CNTL_0 = 0,
460    #[doc = "1: Counter lenght: 12 bit"]
461    CNTL_1 = 1,
462    #[doc = "2: Counter lenght: 10 bit"]
463    CNTL_2 = 2,
464    #[doc = "3: Counter lenght: 8 bit"]
465    CNTL_3 = 3,
466}
467impl From<CNTL_A> for u8 {
468    #[inline(always)]
469    fn from(variant: CNTL_A) -> Self {
470        variant as _
471    }
472}
473#[doc = "Field `CNTL` reader - Counter lenght 1"]
474pub struct CNTL_R(crate::FieldReader<u8, CNTL_A>);
475impl CNTL_R {
476    #[inline(always)]
477    pub(crate) fn new(bits: u8) -> Self {
478        CNTL_R(crate::FieldReader::new(bits))
479    }
480    #[doc = r"Get enumerated values variant"]
481    #[inline(always)]
482    pub fn variant(&self) -> CNTL_A {
483        match self.bits {
484            0 => CNTL_A::CNTL_0,
485            1 => CNTL_A::CNTL_1,
486            2 => CNTL_A::CNTL_2,
487            3 => CNTL_A::CNTL_3,
488            _ => unreachable!(),
489        }
490    }
491    #[doc = "Checks if the value of the field is `CNTL_0`"]
492    #[inline(always)]
493    pub fn is_cntl_0(&self) -> bool {
494        **self == CNTL_A::CNTL_0
495    }
496    #[doc = "Checks if the value of the field is `CNTL_1`"]
497    #[inline(always)]
498    pub fn is_cntl_1(&self) -> bool {
499        **self == CNTL_A::CNTL_1
500    }
501    #[doc = "Checks if the value of the field is `CNTL_2`"]
502    #[inline(always)]
503    pub fn is_cntl_2(&self) -> bool {
504        **self == CNTL_A::CNTL_2
505    }
506    #[doc = "Checks if the value of the field is `CNTL_3`"]
507    #[inline(always)]
508    pub fn is_cntl_3(&self) -> bool {
509        **self == CNTL_A::CNTL_3
510    }
511}
512impl core::ops::Deref for CNTL_R {
513    type Target = crate::FieldReader<u8, CNTL_A>;
514    #[inline(always)]
515    fn deref(&self) -> &Self::Target {
516        &self.0
517    }
518}
519#[doc = "Field `CNTL` writer - Counter lenght 1"]
520pub struct CNTL_W<'a> {
521    w: &'a mut W,
522}
523impl<'a> CNTL_W<'a> {
524    #[doc = r"Writes `variant` to the field"]
525    #[inline(always)]
526    pub fn variant(self, variant: CNTL_A) -> &'a mut W {
527        self.bits(variant.into())
528    }
529    #[doc = "Counter lenght: 16 bit"]
530    #[inline(always)]
531    pub fn cntl_0(self) -> &'a mut W {
532        self.variant(CNTL_A::CNTL_0)
533    }
534    #[doc = "Counter lenght: 12 bit"]
535    #[inline(always)]
536    pub fn cntl_1(self) -> &'a mut W {
537        self.variant(CNTL_A::CNTL_1)
538    }
539    #[doc = "Counter lenght: 10 bit"]
540    #[inline(always)]
541    pub fn cntl_2(self) -> &'a mut W {
542        self.variant(CNTL_A::CNTL_2)
543    }
544    #[doc = "Counter lenght: 8 bit"]
545    #[inline(always)]
546    pub fn cntl_3(self) -> &'a mut W {
547        self.variant(CNTL_A::CNTL_3)
548    }
549    #[doc = r"Writes raw bits to the field"]
550    #[inline(always)]
551    pub fn bits(self, value: u8) -> &'a mut W {
552        self.w.bits = (self.w.bits & !(0x03 << 11)) | ((value as u16 & 0x03) << 11);
553        self.w
554    }
555}
556#[doc = "Timer0_B7 Compare latch load group 1\n\nValue on reset: 0"]
557#[derive(Clone, Copy, Debug, PartialEq)]
558#[repr(u8)]
559pub enum TBCLGRP_A {
560    #[doc = "0: Timer0_B7 Group: 0 - individually"]
561    TBCLGRP_0 = 0,
562    #[doc = "1: Timer0_B7 Group: 1 - 3 groups (1-2"]
563    TBCLGRP_1 = 1,
564    #[doc = "2: Timer0_B7 Group: 2 - 2 groups (1-3"]
565    TBCLGRP_2 = 2,
566    #[doc = "3: Timer0_B7 Group: 3 - 1 group (all)"]
567    TBCLGRP_3 = 3,
568}
569impl From<TBCLGRP_A> for u8 {
570    #[inline(always)]
571    fn from(variant: TBCLGRP_A) -> Self {
572        variant as _
573    }
574}
575#[doc = "Field `TBCLGRP` reader - Timer0_B7 Compare latch load group 1"]
576pub struct TBCLGRP_R(crate::FieldReader<u8, TBCLGRP_A>);
577impl TBCLGRP_R {
578    #[inline(always)]
579    pub(crate) fn new(bits: u8) -> Self {
580        TBCLGRP_R(crate::FieldReader::new(bits))
581    }
582    #[doc = r"Get enumerated values variant"]
583    #[inline(always)]
584    pub fn variant(&self) -> TBCLGRP_A {
585        match self.bits {
586            0 => TBCLGRP_A::TBCLGRP_0,
587            1 => TBCLGRP_A::TBCLGRP_1,
588            2 => TBCLGRP_A::TBCLGRP_2,
589            3 => TBCLGRP_A::TBCLGRP_3,
590            _ => unreachable!(),
591        }
592    }
593    #[doc = "Checks if the value of the field is `TBCLGRP_0`"]
594    #[inline(always)]
595    pub fn is_tbclgrp_0(&self) -> bool {
596        **self == TBCLGRP_A::TBCLGRP_0
597    }
598    #[doc = "Checks if the value of the field is `TBCLGRP_1`"]
599    #[inline(always)]
600    pub fn is_tbclgrp_1(&self) -> bool {
601        **self == TBCLGRP_A::TBCLGRP_1
602    }
603    #[doc = "Checks if the value of the field is `TBCLGRP_2`"]
604    #[inline(always)]
605    pub fn is_tbclgrp_2(&self) -> bool {
606        **self == TBCLGRP_A::TBCLGRP_2
607    }
608    #[doc = "Checks if the value of the field is `TBCLGRP_3`"]
609    #[inline(always)]
610    pub fn is_tbclgrp_3(&self) -> bool {
611        **self == TBCLGRP_A::TBCLGRP_3
612    }
613}
614impl core::ops::Deref for TBCLGRP_R {
615    type Target = crate::FieldReader<u8, TBCLGRP_A>;
616    #[inline(always)]
617    fn deref(&self) -> &Self::Target {
618        &self.0
619    }
620}
621#[doc = "Field `TBCLGRP` writer - Timer0_B7 Compare latch load group 1"]
622pub struct TBCLGRP_W<'a> {
623    w: &'a mut W,
624}
625impl<'a> TBCLGRP_W<'a> {
626    #[doc = r"Writes `variant` to the field"]
627    #[inline(always)]
628    pub fn variant(self, variant: TBCLGRP_A) -> &'a mut W {
629        self.bits(variant.into())
630    }
631    #[doc = "Timer0_B7 Group: 0 - individually"]
632    #[inline(always)]
633    pub fn tbclgrp_0(self) -> &'a mut W {
634        self.variant(TBCLGRP_A::TBCLGRP_0)
635    }
636    #[doc = "Timer0_B7 Group: 1 - 3 groups (1-2"]
637    #[inline(always)]
638    pub fn tbclgrp_1(self) -> &'a mut W {
639        self.variant(TBCLGRP_A::TBCLGRP_1)
640    }
641    #[doc = "Timer0_B7 Group: 2 - 2 groups (1-3"]
642    #[inline(always)]
643    pub fn tbclgrp_2(self) -> &'a mut W {
644        self.variant(TBCLGRP_A::TBCLGRP_2)
645    }
646    #[doc = "Timer0_B7 Group: 3 - 1 group (all)"]
647    #[inline(always)]
648    pub fn tbclgrp_3(self) -> &'a mut W {
649        self.variant(TBCLGRP_A::TBCLGRP_3)
650    }
651    #[doc = r"Writes raw bits to the field"]
652    #[inline(always)]
653    pub fn bits(self, value: u8) -> &'a mut W {
654        self.w.bits = (self.w.bits & !(0x03 << 13)) | ((value as u16 & 0x03) << 13);
655        self.w
656    }
657}
658impl R {
659    #[doc = "Bit 0 - Timer0_B7 interrupt flag"]
660    #[inline(always)]
661    pub fn tbifg(&self) -> TBIFG_R {
662        TBIFG_R::new((self.bits & 0x01) != 0)
663    }
664    #[doc = "Bit 1 - Timer0_B7 interrupt enable"]
665    #[inline(always)]
666    pub fn tbie(&self) -> TBIE_R {
667        TBIE_R::new(((self.bits >> 1) & 0x01) != 0)
668    }
669    #[doc = "Bit 2 - Timer0_B7 counter clear"]
670    #[inline(always)]
671    pub fn tbclr(&self) -> TBCLR_R {
672        TBCLR_R::new(((self.bits >> 2) & 0x01) != 0)
673    }
674    #[doc = "Bits 4:5 - Timer0_B7 mode control 1"]
675    #[inline(always)]
676    pub fn mc(&self) -> MC_R {
677        MC_R::new(((self.bits >> 4) & 0x03) as u8)
678    }
679    #[doc = "Bits 6:7 - Timer0_B7 clock input divider 1"]
680    #[inline(always)]
681    pub fn id(&self) -> ID_R {
682        ID_R::new(((self.bits >> 6) & 0x03) as u8)
683    }
684    #[doc = "Bits 8:9 - Clock source 1"]
685    #[inline(always)]
686    pub fn tbssel(&self) -> TBSSEL_R {
687        TBSSEL_R::new(((self.bits >> 8) & 0x03) as u8)
688    }
689    #[doc = "Bits 11:12 - Counter lenght 1"]
690    #[inline(always)]
691    pub fn cntl(&self) -> CNTL_R {
692        CNTL_R::new(((self.bits >> 11) & 0x03) as u8)
693    }
694    #[doc = "Bits 13:14 - Timer0_B7 Compare latch load group 1"]
695    #[inline(always)]
696    pub fn tbclgrp(&self) -> TBCLGRP_R {
697        TBCLGRP_R::new(((self.bits >> 13) & 0x03) as u8)
698    }
699}
700impl W {
701    #[doc = "Bit 0 - Timer0_B7 interrupt flag"]
702    #[inline(always)]
703    pub fn tbifg(&mut self) -> TBIFG_W {
704        TBIFG_W { w: self }
705    }
706    #[doc = "Bit 1 - Timer0_B7 interrupt enable"]
707    #[inline(always)]
708    pub fn tbie(&mut self) -> TBIE_W {
709        TBIE_W { w: self }
710    }
711    #[doc = "Bit 2 - Timer0_B7 counter clear"]
712    #[inline(always)]
713    pub fn tbclr(&mut self) -> TBCLR_W {
714        TBCLR_W { w: self }
715    }
716    #[doc = "Bits 4:5 - Timer0_B7 mode control 1"]
717    #[inline(always)]
718    pub fn mc(&mut self) -> MC_W {
719        MC_W { w: self }
720    }
721    #[doc = "Bits 6:7 - Timer0_B7 clock input divider 1"]
722    #[inline(always)]
723    pub fn id(&mut self) -> ID_W {
724        ID_W { w: self }
725    }
726    #[doc = "Bits 8:9 - Clock source 1"]
727    #[inline(always)]
728    pub fn tbssel(&mut self) -> TBSSEL_W {
729        TBSSEL_W { w: self }
730    }
731    #[doc = "Bits 11:12 - Counter lenght 1"]
732    #[inline(always)]
733    pub fn cntl(&mut self) -> CNTL_W {
734        CNTL_W { w: self }
735    }
736    #[doc = "Bits 13:14 - Timer0_B7 Compare latch load group 1"]
737    #[inline(always)]
738    pub fn tbclgrp(&mut self) -> TBCLGRP_W {
739        TBCLGRP_W { w: self }
740    }
741    #[doc = "Writes raw bits to the register."]
742    #[inline(always)]
743    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
744        self.0.bits(bits);
745        self
746    }
747}
748#[doc = "Timer0_B7 Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tb0ctl](index.html) module"]
749pub struct TB0CTL_SPEC;
750impl crate::RegisterSpec for TB0CTL_SPEC {
751    type Ux = u16;
752}
753#[doc = "`read()` method returns [tb0ctl::R](R) reader structure"]
754impl crate::Readable for TB0CTL_SPEC {
755    type Reader = R;
756}
757#[doc = "`write(|w| ..)` method takes [tb0ctl::W](W) writer structure"]
758impl crate::Writable for TB0CTL_SPEC {
759    type Writer = W;
760}
761#[doc = "`reset()` method sets TB0CTL to value 0"]
762impl crate::Resettable for TB0CTL_SPEC {
763    #[inline(always)]
764    fn reset_value() -> Self::Ux {
765        0
766    }
767}
msp430f5529/timer_0_b7/tb0ctl.rs

msp430f5529/timer_0_b7/
tb0ctl.rs
