msp430f5529/usci_b0_i2c_mode/
ucb0ctl1.rs

1#[doc = "Register `UCB0CTL1` reader"]
2pub struct R(crate::R<UCB0CTL1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<UCB0CTL1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<UCB0CTL1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<UCB0CTL1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `UCB0CTL1` writer"]
17pub struct W(crate::W<UCB0CTL1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<UCB0CTL1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<UCB0CTL1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<UCB0CTL1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `UCSWRST` reader - USCI Software Reset"]
38pub struct UCSWRST_R(crate::FieldReader<bool, bool>);
39impl UCSWRST_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        UCSWRST_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for UCSWRST_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `UCSWRST` writer - USCI Software Reset"]
53pub struct UCSWRST_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> UCSWRST_W<'a> {
57    #[doc = r"Sets the field bit"]
58    #[inline(always)]
59    pub fn set_bit(self) -> &'a mut W {
60        self.bit(true)
61    }
62    #[doc = r"Clears the field bit"]
63    #[inline(always)]
64    pub fn clear_bit(self) -> &'a mut W {
65        self.bit(false)
66    }
67    #[doc = r"Writes raw bits to the field"]
68    #[inline(always)]
69    pub fn bit(self, value: bool) -> &'a mut W {
70        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
71        self.w
72    }
73}
74#[doc = "Field `UCTXSTT` reader - Transmit START"]
75pub struct UCTXSTT_R(crate::FieldReader<bool, bool>);
76impl UCTXSTT_R {
77    #[inline(always)]
78    pub(crate) fn new(bits: bool) -> Self {
79        UCTXSTT_R(crate::FieldReader::new(bits))
80    }
81}
82impl core::ops::Deref for UCTXSTT_R {
83    type Target = crate::FieldReader<bool, bool>;
84    #[inline(always)]
85    fn deref(&self) -> &Self::Target {
86        &self.0
87    }
88}
89#[doc = "Field `UCTXSTT` writer - Transmit START"]
90pub struct UCTXSTT_W<'a> {
91    w: &'a mut W,
92}
93impl<'a> UCTXSTT_W<'a> {
94    #[doc = r"Sets the field bit"]
95    #[inline(always)]
96    pub fn set_bit(self) -> &'a mut W {
97        self.bit(true)
98    }
99    #[doc = r"Clears the field bit"]
100    #[inline(always)]
101    pub fn clear_bit(self) -> &'a mut W {
102        self.bit(false)
103    }
104    #[doc = r"Writes raw bits to the field"]
105    #[inline(always)]
106    pub fn bit(self, value: bool) -> &'a mut W {
107        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
108        self.w
109    }
110}
111#[doc = "Field `UCTXSTP` reader - Transmit STOP"]
112pub struct UCTXSTP_R(crate::FieldReader<bool, bool>);
113impl UCTXSTP_R {
114    #[inline(always)]
115    pub(crate) fn new(bits: bool) -> Self {
116        UCTXSTP_R(crate::FieldReader::new(bits))
117    }
118}
119impl core::ops::Deref for UCTXSTP_R {
120    type Target = crate::FieldReader<bool, bool>;
121    #[inline(always)]
122    fn deref(&self) -> &Self::Target {
123        &self.0
124    }
125}
126#[doc = "Field `UCTXSTP` writer - Transmit STOP"]
127pub struct UCTXSTP_W<'a> {
128    w: &'a mut W,
129}
130impl<'a> UCTXSTP_W<'a> {
131    #[doc = r"Sets the field bit"]
132    #[inline(always)]
133    pub fn set_bit(self) -> &'a mut W {
134        self.bit(true)
135    }
136    #[doc = r"Clears the field bit"]
137    #[inline(always)]
138    pub fn clear_bit(self) -> &'a mut W {
139        self.bit(false)
140    }
141    #[doc = r"Writes raw bits to the field"]
142    #[inline(always)]
143    pub fn bit(self, value: bool) -> &'a mut W {
144        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
145        self.w
146    }
147}
148#[doc = "Field `UCTXNACK` reader - Transmit NACK"]
149pub struct UCTXNACK_R(crate::FieldReader<bool, bool>);
150impl UCTXNACK_R {
151    #[inline(always)]
152    pub(crate) fn new(bits: bool) -> Self {
153        UCTXNACK_R(crate::FieldReader::new(bits))
154    }
155}
156impl core::ops::Deref for UCTXNACK_R {
157    type Target = crate::FieldReader<bool, bool>;
158    #[inline(always)]
159    fn deref(&self) -> &Self::Target {
160        &self.0
161    }
162}
163#[doc = "Field `UCTXNACK` writer - Transmit NACK"]
164pub struct UCTXNACK_W<'a> {
165    w: &'a mut W,
166}
167impl<'a> UCTXNACK_W<'a> {
168    #[doc = r"Sets the field bit"]
169    #[inline(always)]
170    pub fn set_bit(self) -> &'a mut W {
171        self.bit(true)
172    }
173    #[doc = r"Clears the field bit"]
174    #[inline(always)]
175    pub fn clear_bit(self) -> &'a mut W {
176        self.bit(false)
177    }
178    #[doc = r"Writes raw bits to the field"]
179    #[inline(always)]
180    pub fn bit(self, value: bool) -> &'a mut W {
181        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
182        self.w
183    }
184}
185#[doc = "Field `UCTR` reader - Transmit/Receive Select/Flag"]
186pub struct UCTR_R(crate::FieldReader<bool, bool>);
187impl UCTR_R {
188    #[inline(always)]
189    pub(crate) fn new(bits: bool) -> Self {
190        UCTR_R(crate::FieldReader::new(bits))
191    }
192}
193impl core::ops::Deref for UCTR_R {
194    type Target = crate::FieldReader<bool, bool>;
195    #[inline(always)]
196    fn deref(&self) -> &Self::Target {
197        &self.0
198    }
199}
200#[doc = "Field `UCTR` writer - Transmit/Receive Select/Flag"]
201pub struct UCTR_W<'a> {
202    w: &'a mut W,
203}
204impl<'a> UCTR_W<'a> {
205    #[doc = r"Sets the field bit"]
206    #[inline(always)]
207    pub fn set_bit(self) -> &'a mut W {
208        self.bit(true)
209    }
210    #[doc = r"Clears the field bit"]
211    #[inline(always)]
212    pub fn clear_bit(self) -> &'a mut W {
213        self.bit(false)
214    }
215    #[doc = r"Writes raw bits to the field"]
216    #[inline(always)]
217    pub fn bit(self, value: bool) -> &'a mut W {
218        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4);
219        self.w
220    }
221}
222#[doc = "USCI 1 Clock Source Select 1\n\nValue on reset: 0"]
223#[derive(Clone, Copy, Debug, PartialEq)]
224#[repr(u8)]
225pub enum UCSSEL_A {
226    #[doc = "0: USCI 0 Clock Source: 0"]
227    UCSSEL_0 = 0,
228    #[doc = "1: USCI 0 Clock Source: 1"]
229    UCSSEL_1 = 1,
230    #[doc = "2: USCI 0 Clock Source: 2"]
231    UCSSEL_2 = 2,
232    #[doc = "3: USCI 0 Clock Source: 3"]
233    UCSSEL_3 = 3,
234}
235impl From<UCSSEL_A> for u8 {
236    #[inline(always)]
237    fn from(variant: UCSSEL_A) -> Self {
238        variant as _
239    }
240}
241#[doc = "Field `UCSSEL` reader - USCI 1 Clock Source Select 1"]
242pub struct UCSSEL_R(crate::FieldReader<u8, UCSSEL_A>);
243impl UCSSEL_R {
244    #[inline(always)]
245    pub(crate) fn new(bits: u8) -> Self {
246        UCSSEL_R(crate::FieldReader::new(bits))
247    }
248    #[doc = r"Get enumerated values variant"]
249    #[inline(always)]
250    pub fn variant(&self) -> UCSSEL_A {
251        match self.bits {
252            0 => UCSSEL_A::UCSSEL_0,
253            1 => UCSSEL_A::UCSSEL_1,
254            2 => UCSSEL_A::UCSSEL_2,
255            3 => UCSSEL_A::UCSSEL_3,
256            _ => unreachable!(),
257        }
258    }
259    #[doc = "Checks if the value of the field is `UCSSEL_0`"]
260    #[inline(always)]
261    pub fn is_ucssel_0(&self) -> bool {
262        **self == UCSSEL_A::UCSSEL_0
263    }
264    #[doc = "Checks if the value of the field is `UCSSEL_1`"]
265    #[inline(always)]
266    pub fn is_ucssel_1(&self) -> bool {
267        **self == UCSSEL_A::UCSSEL_1
268    }
269    #[doc = "Checks if the value of the field is `UCSSEL_2`"]
270    #[inline(always)]
271    pub fn is_ucssel_2(&self) -> bool {
272        **self == UCSSEL_A::UCSSEL_2
273    }
274    #[doc = "Checks if the value of the field is `UCSSEL_3`"]
275    #[inline(always)]
276    pub fn is_ucssel_3(&self) -> bool {
277        **self == UCSSEL_A::UCSSEL_3
278    }
279}
280impl core::ops::Deref for UCSSEL_R {
281    type Target = crate::FieldReader<u8, UCSSEL_A>;
282    #[inline(always)]
283    fn deref(&self) -> &Self::Target {
284        &self.0
285    }
286}
287#[doc = "Field `UCSSEL` writer - USCI 1 Clock Source Select 1"]
288pub struct UCSSEL_W<'a> {
289    w: &'a mut W,
290}
291impl<'a> UCSSEL_W<'a> {
292    #[doc = r"Writes `variant` to the field"]
293    #[inline(always)]
294    pub fn variant(self, variant: UCSSEL_A) -> &'a mut W {
295        self.bits(variant.into())
296    }
297    #[doc = "USCI 0 Clock Source: 0"]
298    #[inline(always)]
299    pub fn ucssel_0(self) -> &'a mut W {
300        self.variant(UCSSEL_A::UCSSEL_0)
301    }
302    #[doc = "USCI 0 Clock Source: 1"]
303    #[inline(always)]
304    pub fn ucssel_1(self) -> &'a mut W {
305        self.variant(UCSSEL_A::UCSSEL_1)
306    }
307    #[doc = "USCI 0 Clock Source: 2"]
308    #[inline(always)]
309    pub fn ucssel_2(self) -> &'a mut W {
310        self.variant(UCSSEL_A::UCSSEL_2)
311    }
312    #[doc = "USCI 0 Clock Source: 3"]
313    #[inline(always)]
314    pub fn ucssel_3(self) -> &'a mut W {
315        self.variant(UCSSEL_A::UCSSEL_3)
316    }
317    #[doc = r"Writes raw bits to the field"]
318    #[inline(always)]
319    pub fn bits(self, value: u8) -> &'a mut W {
320        self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u8 & 0x03) << 6);
321        self.w
322    }
323}
324impl R {
325    #[doc = "Bit 0 - USCI Software Reset"]
326    #[inline(always)]
327    pub fn ucswrst(&self) -> UCSWRST_R {
328        UCSWRST_R::new((self.bits & 0x01) != 0)
329    }
330    #[doc = "Bit 1 - Transmit START"]
331    #[inline(always)]
332    pub fn uctxstt(&self) -> UCTXSTT_R {
333        UCTXSTT_R::new(((self.bits >> 1) & 0x01) != 0)
334    }
335    #[doc = "Bit 2 - Transmit STOP"]
336    #[inline(always)]
337    pub fn uctxstp(&self) -> UCTXSTP_R {
338        UCTXSTP_R::new(((self.bits >> 2) & 0x01) != 0)
339    }
340    #[doc = "Bit 3 - Transmit NACK"]
341    #[inline(always)]
342    pub fn uctxnack(&self) -> UCTXNACK_R {
343        UCTXNACK_R::new(((self.bits >> 3) & 0x01) != 0)
344    }
345    #[doc = "Bit 4 - Transmit/Receive Select/Flag"]
346    #[inline(always)]
347    pub fn uctr(&self) -> UCTR_R {
348        UCTR_R::new(((self.bits >> 4) & 0x01) != 0)
349    }
350    #[doc = "Bits 6:7 - USCI 1 Clock Source Select 1"]
351    #[inline(always)]
352    pub fn ucssel(&self) -> UCSSEL_R {
353        UCSSEL_R::new(((self.bits >> 6) & 0x03) as u8)
354    }
355}
356impl W {
357    #[doc = "Bit 0 - USCI Software Reset"]
358    #[inline(always)]
359    pub fn ucswrst(&mut self) -> UCSWRST_W {
360        UCSWRST_W { w: self }
361    }
362    #[doc = "Bit 1 - Transmit START"]
363    #[inline(always)]
364    pub fn uctxstt(&mut self) -> UCTXSTT_W {
365        UCTXSTT_W { w: self }
366    }
367    #[doc = "Bit 2 - Transmit STOP"]
368    #[inline(always)]
369    pub fn uctxstp(&mut self) -> UCTXSTP_W {
370        UCTXSTP_W { w: self }
371    }
372    #[doc = "Bit 3 - Transmit NACK"]
373    #[inline(always)]
374    pub fn uctxnack(&mut self) -> UCTXNACK_W {
375        UCTXNACK_W { w: self }
376    }
377    #[doc = "Bit 4 - Transmit/Receive Select/Flag"]
378    #[inline(always)]
379    pub fn uctr(&mut self) -> UCTR_W {
380        UCTR_W { w: self }
381    }
382    #[doc = "Bits 6:7 - USCI 1 Clock Source Select 1"]
383    #[inline(always)]
384    pub fn ucssel(&mut self) -> UCSSEL_W {
385        UCSSEL_W { w: self }
386    }
387    #[doc = "Writes raw bits to the register."]
388    #[inline(always)]
389    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
390        self.0.bits(bits);
391        self
392    }
393}
394#[doc = "USCI B0 Control Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ucb0ctl1](index.html) module"]
395pub struct UCB0CTL1_SPEC;
396impl crate::RegisterSpec for UCB0CTL1_SPEC {
397    type Ux = u8;
398}
399#[doc = "`read()` method returns [ucb0ctl1::R](R) reader structure"]
400impl crate::Readable for UCB0CTL1_SPEC {
401    type Reader = R;
402}
403#[doc = "`write(|w| ..)` method takes [ucb0ctl1::W](W) writer structure"]
404impl crate::Writable for UCB0CTL1_SPEC {
405    type Writer = W;
406}
407#[doc = "`reset()` method sets UCB0CTL1 to value 0"]
408impl crate::Resettable for UCB0CTL1_SPEC {
409    #[inline(always)]
410    fn reset_value() -> Self::Ux {
411        0
412    }
413}
msp430f5529/usci_b0_i2c_mode/ucb0ctl1.rs

msp430f5529/usci_b0_i2c_mode/
ucb0ctl1.rs
