ms-codeview 0.1.7

Definitions for use with CodeView debugging symbols
Documentation 
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register_set! {
    pub enum Arm64Reg;
    // General purpose 32-bit integer registers

    W0     =  10,
    W1     =  11,
    W2     =  12,
    W3     =  13,
    W4     =  14,
    W5     =  15,
    W6     =  16,
    W7     =  17,
    W8     =  18,
    W9     =  19,
    W10    =  20,
    W11    =  21,
    W12    =  22,
    W13    =  23,
    W14    =  24,
    W15    =  25,
    W16    =  26,
    W17    =  27,
    W18    =  28,
    W19    =  29,
    W20    =  30,
    W21    =  31,
    W22    =  32,
    W23    =  33,
    W24    =  34,
    W25    =  35,
    W26    =  36,
    W27    =  37,
    W28    =  38,
    W29    =  39,
    W30    =  40,
    WZR    =  41,

    // General purpose 64-bit integer registers

    X0     =  50,
    X1     =  51,
    X2     =  52,
    X3     =  53,
    X4     =  54,
    X5     =  55,
    X6     =  56,
    X7     =  57,
    X8     =  58,
    X9     =  59,
    X10    =  60,
    X11    =  61,
    X12    =  62,
    X13    =  63,
    X14    =  64,
    X15    =  65,
    IP0    =  66,
    IP1    =  67,
    X18    =  68,
    X19    =  69,
    X20    =  70,
    X21    =  71,
    X22    =  72,
    X23    =  73,
    X24    =  74,
    X25    =  75,
    X26    =  76,
    X27    =  77,
    X28    =  78,
    FP     =  79,
    LR     =  80,
    SP     =  81,
    ZR     =  82,

    // statue register

    NZCV   =  90,

    // 32-bit floating point registers

    S0     =  100,
    S1     =  101,
    S2     =  102,
    S3     =  103,
    S4     =  104,
    S5     =  105,
    S6     =  106,
    S7     =  107,
    S8     =  108,
    S9     =  109,
    S10    =  110,
    S11    =  111,
    S12    =  112,
    S13    =  113,
    S14    =  114,
    S15    =  115,
    S16    =  116,
    S17    =  117,
    S18    =  118,
    S19    =  119,
    S20    =  120,
    S21    =  121,
    S22    =  122,
    S23    =  123,
    S24    =  124,
    S25    =  125,
    S26    =  126,
    S27    =  127,
    S28    =  128,
    S29    =  129,
    S30    =  130,
    S31    =  131,

    // 64-bit floating point registers

    D0     =  140,
    D1     =  141,
    D2     =  142,
    D3     =  143,
    D4     =  144,
    D5     =  145,
    D6     =  146,
    D7     =  147,
    D8     =  148,
    D9     =  149,
    D10    =  150,
    D11    =  151,
    D12    =  152,
    D13    =  153,
    D14    =  154,
    D15    =  155,
    D16    =  156,
    D17    =  157,
    D18    =  158,
    D19    =  159,
    D20    =  160,
    D21    =  161,
    D22    =  162,
    D23    =  163,
    D24    =  164,
    D25    =  165,
    D26    =  166,
    D27    =  167,
    D28    =  168,
    D29    =  169,
    D30    =  170,
    D31    =  171,

    // 128-bit SIMD registers

    Q0     =  180,
    Q1     =  181,
    Q2     =  182,
    Q3     =  183,
    Q4     =  184,
    Q5     =  185,
    Q6     =  186,
    Q7     =  187,
    Q8     =  188,
    Q9     =  189,
    Q10    =  190,
    Q11    =  191,
    Q12    =  192,
    Q13    =  193,
    Q14    =  194,
    Q15    =  195,
    Q16    =  196,
    Q17    =  197,
    Q18    =  198,
    Q19    =  199,
    Q20    =  200,
    Q21    =  201,
    Q22    =  202,
    Q23    =  203,
    Q24    =  204,
    Q25    =  205,
    Q26    =  206,
    Q27    =  207,
    Q28    =  208,
    Q29    =  209,
    Q30    =  210,
    Q31    =  211,

    // Floating point status register

    FPSR   =  220,
}