monistode-emulator 0.1.0

An emulator for the monistode set of ISA's
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114

use super::flag_register::{FlagRegister, ProcessorFlags};
use super::num_type_conversions::ToSigned;
use num_traits::{
    ops::overflowing::{OverflowingAdd, OverflowingMul, OverflowingSub},
    Zero,
};

pub trait ArithmeticOperand:
    OverflowingAdd + OverflowingSub + OverflowingMul + Zero + PartialEq + ToSigned
{
}
impl<T: OverflowingAdd + OverflowingSub + OverflowingMul + Zero + PartialEq + ToSigned>
    ArithmeticOperand for T
{
}

trait FlagRegisterExt: FlagRegister {
    fn set_zf_if_zero<T: Zero>(&mut self, value: &T)
    where
        Self: Sized;

    fn set_sf_if_negative<T: ArithmeticOperand>(&mut self, value: &T)
    where
        Self: Sized;
}

impl<T: FlagRegister> FlagRegisterExt for T {
    #[inline]
    fn set_zf_if_zero<U: Zero>(&mut self, value: &U) {
        self.set_if(value.is_zero(), ProcessorFlags::ZF);
    }

    #[inline]
    fn set_sf_if_negative<U: ArithmeticOperand>(&mut self, value: &U) {
        self.set_if(
            value.as_signed() < U::SignedVariant::zero(),
            ProcessorFlags::SF,
        );
    }
}

#[inline]
pub fn add<T, U>(flags: &mut U, a: T, b: T) -> T
where
    T: ArithmeticOperand,
    U: FlagRegister,
{
    let result = a.overflowing_add(&b);
    flags.reset();
    flags.set_if(result.1, ProcessorFlags::CF);
    flags.set_if(
        a.as_signed().overflowing_add(&b.as_signed()).1,
        ProcessorFlags::OF,
    );
    flags.set_zf_if_zero(&result.0);
    flags.set_sf_if_negative(&result.0);

    result.0
}

#[inline]
pub fn sub<T, U>(flags: &mut U, a: T, b: T) -> T
where
    T: ArithmeticOperand,
    U: FlagRegister,
{
    let result = a.overflowing_sub(&b);
    flags.reset();
    flags.set_if(!result.1, ProcessorFlags::CF);
    flags.set_if(
        a.as_signed().overflowing_sub(&b.as_signed()).1,
        ProcessorFlags::OF,
    );
    flags.set_zf_if_zero(&result.0);
    flags.set_sf_if_negative(&result.0);

    result.0
}

#[inline]
pub fn mul<T, U>(flags: &mut U, a: T, b: T) -> T
where
    T: ArithmeticOperand,
    U: FlagRegister,
{
    let result = a.overflowing_mul(&b);
    flags.reset();
    flags.set_if(result.1, ProcessorFlags::CF);
    flags.set_if(
        a.as_signed().overflowing_mul(&b.as_signed()).1,
        ProcessorFlags::OF,
    );
    flags.set_zf_if_zero(&result.0);
    flags.set_sf_if_negative(&result.0);

    result.0
}

#[inline]
pub fn div<T, U>(flags: &mut U, a: T, b: T) -> T
where
    T: ArithmeticOperand,
    U: FlagRegister,
{
    flags.reset();
    if b.is_zero() {
        flags.set(ProcessorFlags::CF);
        flags.set(ProcessorFlags::OF);
        return T::zero();
    }
    flags.set_zf_if_zero(&a);

    a / b
}