mmio_rs/
lib.rs

1#![no_std]
2#![deny(unsafe_op_in_unsafe_fn)]
3#![warn(missing_docs)]
4//! Zero-overhead, `no_std` memory-mapped I/O register abstraction.
5//!
6//! # Quick start
7//!
8//! ```ignore
9//! use mmio_rs::prelude::*;
10//!
11//! // Implement a critical section for your target once per binary.
12//! mmio_rs::impl_critical_section!(
13//!     acquire: { /* disable interrupts, return previous state */ 0 },
14//!     release: |_state| { /* restore interrupt state */ }
15//! );
16//!
17//! // Define a peripheral's register layout.
18//! mmio_rs::register_block! {
19//!     pub struct Uart @ 0x4000_1000 {
20//!         dr:  u32 => ReadWrite @ 0x00,
21//!         sr:  u32 => ReadOnly  @ 0x04,
22//!         brr: u32 => ReadWrite @ 0x08,
23//!     }
24//! }
25//!
26//! // Use it.
27//! Uart::dr().write(b'A' as u32);
28//! let status = Uart::sr().read();
29//! Uart::brr().write_field(0xFFFF, 0, 0x0683); // set baud divisor
30//! ```
31
32mod register;
33mod access;
34mod block;
35mod atomic;
36mod irq_guard;
37
38pub use access::{ReadOnly, ReadWrite, WriteOnly};
39pub use atomic::AtomicRegister;
40pub use block::{DynamicRegisterBlock, RegisterBlock};
41pub use irq_guard::{critical_section, IrqGuard};
42pub use register::Register;
43
44/// Convenience re-export of the most commonly used types.
45///
46/// Add `use mmio_rs::prelude::*;` to bring the whole public API into scope.
47pub mod prelude {
48    pub use crate::access::{ReadOnly, ReadWrite, WriteOnly};
49    pub use crate::atomic::AtomicRegister;
50    pub use crate::block::{DynamicRegisterBlock, RegisterBlock};
51    pub use crate::irq_guard::IrqGuard;
52    pub use crate::register::Register;
53}
mmio_rs/lib.rs

mmio_rs/
lib.rs
