1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - control register 1"]
5 pub cr1: CR1,
6 #[doc = "0x04 - control register 2"]
7 pub cr2: CR2,
8 #[doc = "0x08 - slave mode control register 1"]
9 pub smcr: SMCR,
10 #[doc = "0x0c - DMA/Interrupt enable register"]
11 pub dier: DIER,
12 #[doc = "0x10 - status register"]
13 pub sr: SR,
14 #[doc = "0x14 - event generation register"]
15 pub egr: EGR,
16 _reserved_6_ccmr1: [u8; 0x04],
17 _reserved_7_ccmr2: [u8; 0x04],
18 #[doc = "0x20 - capture/compare enable register"]
19 pub ccer: CCER,
20 #[doc = "0x24 - counter"]
21 pub cnt: CNT,
22 #[doc = "0x28 - prescaler"]
23 pub psc: PSC,
24 #[doc = "0x2c - auto-reload register"]
25 pub arr: ARR,
26 _reserved12: [u8; 0x04],
27 #[doc = "0x34 - capture/compare register 1"]
28 pub ccr1: CCR1,
29 #[doc = "0x38 - capture/compare register 2"]
30 pub ccr2: CCR2,
31 #[doc = "0x3c - capture/compare register 3"]
32 pub ccr3: CCR3,
33 #[doc = "0x40 - capture/compare register 4"]
34 pub ccr4: CCR4,
35 _reserved16: [u8; 0x04],
36 #[doc = "0x48 - DMA control register"]
37 pub dcr: DCR,
38 #[doc = "0x4c - DMA address for full transfer"]
39 pub dmar: DMAR,
40}
41impl RegisterBlock {
42 #[doc = "0x18 - capture/compare mode register 1 (input mode)"]
43 #[inline(always)]
44 pub const fn ccmr1_input(&self) -> &CCMR1_INPUT {
45 unsafe { &*(self as *const Self).cast::<u8>().add(24usize).cast() }
46 }
47 #[doc = "0x18 - capture/compare mode register 1 (output mode)"]
48 #[inline(always)]
49 pub const fn ccmr1_output(&self) -> &CCMR1_OUTPUT {
50 unsafe { &*(self as *const Self).cast::<u8>().add(24usize).cast() }
51 }
52 #[doc = "0x1c - capture/compare mode register 2 (input mode)"]
53 #[inline(always)]
54 pub const fn ccmr2_input(&self) -> &CCMR2_INPUT {
55 unsafe { &*(self as *const Self).cast::<u8>().add(28usize).cast() }
56 }
57 #[doc = "0x1c - capture/compare mode register 2(output mode)"]
58 #[inline(always)]
59 pub const fn ccmr2_output(&self) -> &CCMR2_OUTPUT {
60 unsafe { &*(self as *const Self).cast::<u8>().add(28usize).cast() }
61 }
62}
63#[doc = "CR1 (rw) register accessor: an alias for `Reg<CR1_SPEC>`"]
64pub type CR1 = crate::Reg<cr1::CR1_SPEC>;
65#[doc = "control register 1"]
66pub mod cr1;
67#[doc = "CR2 (rw) register accessor: an alias for `Reg<CR2_SPEC>`"]
68pub type CR2 = crate::Reg<cr2::CR2_SPEC>;
69#[doc = "control register 2"]
70pub mod cr2;
71#[doc = "SMCR (rw) register accessor: an alias for `Reg<SMCR_SPEC>`"]
72pub type SMCR = crate::Reg<smcr::SMCR_SPEC>;
73#[doc = "slave mode control register 1"]
74pub mod smcr;
75#[doc = "DIER (rw) register accessor: an alias for `Reg<DIER_SPEC>`"]
76pub type DIER = crate::Reg<dier::DIER_SPEC>;
77#[doc = "DMA/Interrupt enable register"]
78pub mod dier;
79#[doc = "SR (rw) register accessor: an alias for `Reg<SR_SPEC>`"]
80pub type SR = crate::Reg<sr::SR_SPEC>;
81#[doc = "status register"]
82pub mod sr;
83#[doc = "EGR (w) register accessor: an alias for `Reg<EGR_SPEC>`"]
84pub type EGR = crate::Reg<egr::EGR_SPEC>;
85#[doc = "event generation register"]
86pub mod egr;
87#[doc = "CCMR1_Output (rw) register accessor: an alias for `Reg<CCMR1_OUTPUT_SPEC>`"]
88pub type CCMR1_OUTPUT = crate::Reg<ccmr1_output::CCMR1_OUTPUT_SPEC>;
89#[doc = "capture/compare mode register 1 (output mode)"]
90pub mod ccmr1_output;
91#[doc = "CCMR1_Input (rw) register accessor: an alias for `Reg<CCMR1_INPUT_SPEC>`"]
92pub type CCMR1_INPUT = crate::Reg<ccmr1_input::CCMR1_INPUT_SPEC>;
93#[doc = "capture/compare mode register 1 (input mode)"]
94pub mod ccmr1_input;
95#[doc = "CCMR2_Output (rw) register accessor: an alias for `Reg<CCMR2_OUTPUT_SPEC>`"]
96pub type CCMR2_OUTPUT = crate::Reg<ccmr2_output::CCMR2_OUTPUT_SPEC>;
97#[doc = "capture/compare mode register 2(output mode)"]
98pub mod ccmr2_output;
99#[doc = "CCMR2_Input (rw) register accessor: an alias for `Reg<CCMR2_INPUT_SPEC>`"]
100pub type CCMR2_INPUT = crate::Reg<ccmr2_input::CCMR2_INPUT_SPEC>;
101#[doc = "capture/compare mode register 2 (input mode)"]
102pub mod ccmr2_input;
103#[doc = "CCER (rw) register accessor: an alias for `Reg<CCER_SPEC>`"]
104pub type CCER = crate::Reg<ccer::CCER_SPEC>;
105#[doc = "capture/compare enable register"]
106pub mod ccer;
107#[doc = "CNT (rw) register accessor: an alias for `Reg<CNT_SPEC>`"]
108pub type CNT = crate::Reg<cnt::CNT_SPEC>;
109#[doc = "counter"]
110pub mod cnt;
111#[doc = "PSC (rw) register accessor: an alias for `Reg<PSC_SPEC>`"]
112pub type PSC = crate::Reg<psc::PSC_SPEC>;
113#[doc = "prescaler"]
114pub mod psc;
115#[doc = "ARR (rw) register accessor: an alias for `Reg<ARR_SPEC>`"]
116pub type ARR = crate::Reg<arr::ARR_SPEC>;
117#[doc = "auto-reload register"]
118pub mod arr;
119#[doc = "CCR1 (rw) register accessor: an alias for `Reg<CCR1_SPEC>`"]
120pub type CCR1 = crate::Reg<ccr1::CCR1_SPEC>;
121#[doc = "capture/compare register 1"]
122pub mod ccr1;
123#[doc = "CCR2 (rw) register accessor: an alias for `Reg<CCR2_SPEC>`"]
124pub type CCR2 = crate::Reg<ccr2::CCR2_SPEC>;
125#[doc = "capture/compare register 2"]
126pub mod ccr2;
127#[doc = "CCR3 (rw) register accessor: an alias for `Reg<CCR3_SPEC>`"]
128pub type CCR3 = crate::Reg<ccr3::CCR3_SPEC>;
129#[doc = "capture/compare register 3"]
130pub mod ccr3;
131#[doc = "CCR4 (rw) register accessor: an alias for `Reg<CCR4_SPEC>`"]
132pub type CCR4 = crate::Reg<ccr4::CCR4_SPEC>;
133#[doc = "capture/compare register 4"]
134pub mod ccr4;
135#[doc = "DCR (w) register accessor: an alias for `Reg<DCR_SPEC>`"]
136pub type DCR = crate::Reg<dcr::DCR_SPEC>;
137#[doc = "DMA control register"]
138pub mod dcr;
139#[doc = "DMAR (w) register accessor: an alias for `Reg<DMAR_SPEC>`"]
140pub type DMAR = crate::Reg<dmar::DMAR_SPEC>;
141#[doc = "DMA address for full transfer"]
142pub mod dmar;