mm32f3270_pac/ethernet_mac/
maca19hr.rs

1#[doc = "Register `MACA19HR` reader"]
2pub struct R(crate::R<MACA19HR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<MACA19HR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<MACA19HR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<MACA19HR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `MACA19HR` writer"]
17pub struct W(crate::W<MACA19HR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<MACA19HR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<MACA19HR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<MACA19HR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ADDH` reader - MAC address15 high \\[47:32\\]"]
38pub type ADDH_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `ADDH` writer - MAC address15 high \\[47:32\\]"]
40pub type ADDH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MACA19HR_SPEC, u16, u16, 16, O>;
41#[doc = "Field `MBYTEC` reader - Mask Byte Control"]
42pub type MBYTEC_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `MBYTEC` writer - Mask Byte Control"]
44pub type MBYTEC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MACA19HR_SPEC, u8, u8, 6, O>;
45#[doc = "Field `SELE` reader - Source address"]
46pub type SELE_R = crate::BitReader<bool>;
47#[doc = "Field `SELE` writer - Source address"]
48pub type SELE_W<'a, const O: u8> = crate::BitWriter<'a, u32, MACA19HR_SPEC, bool, O>;
49#[doc = "Field `ADDE` reader - Address enable"]
50pub type ADDE_R = crate::BitReader<bool>;
51#[doc = "Field `ADDE` writer - Address enable"]
52pub type ADDE_W<'a, const O: u8> = crate::BitWriter<'a, u32, MACA19HR_SPEC, bool, O>;
53impl R {
54    #[doc = "Bits 0:15 - MAC address15 high \\[47:32\\]"]
55    #[inline(always)]
56    pub fn addh(&self) -> ADDH_R {
57        ADDH_R::new((self.bits & 0xffff) as u16)
58    }
59    #[doc = "Bits 24:29 - Mask Byte Control"]
60    #[inline(always)]
61    pub fn mbytec(&self) -> MBYTEC_R {
62        MBYTEC_R::new(((self.bits >> 24) & 0x3f) as u8)
63    }
64    #[doc = "Bit 30 - Source address"]
65    #[inline(always)]
66    pub fn sele(&self) -> SELE_R {
67        SELE_R::new(((self.bits >> 30) & 1) != 0)
68    }
69    #[doc = "Bit 31 - Address enable"]
70    #[inline(always)]
71    pub fn adde(&self) -> ADDE_R {
72        ADDE_R::new(((self.bits >> 31) & 1) != 0)
73    }
74}
75impl W {
76    #[doc = "Bits 0:15 - MAC address15 high \\[47:32\\]"]
77    #[inline(always)]
78    #[must_use]
79    pub fn addh(&mut self) -> ADDH_W<0> {
80        ADDH_W::new(self)
81    }
82    #[doc = "Bits 24:29 - Mask Byte Control"]
83    #[inline(always)]
84    #[must_use]
85    pub fn mbytec(&mut self) -> MBYTEC_W<24> {
86        MBYTEC_W::new(self)
87    }
88    #[doc = "Bit 30 - Source address"]
89    #[inline(always)]
90    #[must_use]
91    pub fn sele(&mut self) -> SELE_W<30> {
92        SELE_W::new(self)
93    }
94    #[doc = "Bit 31 - Address enable"]
95    #[inline(always)]
96    #[must_use]
97    pub fn adde(&mut self) -> ADDE_W<31> {
98        ADDE_W::new(self)
99    }
100    #[doc = "Writes raw bits to the register."]
101    #[inline(always)]
102    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
103        self.0.bits(bits);
104        self
105    }
106}
107#[doc = "Ethernet MAC address 15 high register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [maca19hr](index.html) module"]
108pub struct MACA19HR_SPEC;
109impl crate::RegisterSpec for MACA19HR_SPEC {
110    type Ux = u32;
111}
112#[doc = "`read()` method returns [maca19hr::R](R) reader structure"]
113impl crate::Readable for MACA19HR_SPEC {
114    type Reader = R;
115}
116#[doc = "`write(|w| ..)` method takes [maca19hr::W](W) writer structure"]
117impl crate::Writable for MACA19HR_SPEC {
118    type Writer = W;
119    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
120    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
121}
122#[doc = "`reset()` method sets MACA19HR to value 0"]
123impl crate::Resettable for MACA19HR_SPEC {
124    const RESET_VALUE: Self::Ux = 0;
125}
mm32f3270_pac/ethernet_mac/maca19hr.rs

mm32f3270_pac/ethernet_mac/
maca19hr.rs
