mkl25z4/dma/
dcr0.rs

1#[doc = "Reader of register DCR0"]
2pub type R = crate::R<u32, super::DCR0>;
3#[doc = "Writer for register DCR0"]
4pub type W = crate::W<u32, super::DCR0>;
5#[doc = "Register DCR0 `reset()`'s with value 0"]
6impl crate::ResetValue for super::DCR0 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Link channel 2\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum LCH2_A {
17    #[doc = "0: DMA Channel 0"]
18    _00 = 0,
19    #[doc = "1: DMA Channel 1"]
20    _01 = 1,
21    #[doc = "2: DMA Channel 2"]
22    _10 = 2,
23    #[doc = "3: DMA Channel 3"]
24    _11 = 3,
25}
26impl From<LCH2_A> for u8 {
27    #[inline(always)]
28    fn from(variant: LCH2_A) -> Self {
29        variant as _
30    }
31}
32#[doc = "Reader of field `LCH2`"]
33pub type LCH2_R = crate::R<u8, LCH2_A>;
34impl LCH2_R {
35    #[doc = r"Get enumerated values variant"]
36    #[inline(always)]
37    pub fn variant(&self) -> LCH2_A {
38        match self.bits {
39            0 => LCH2_A::_00,
40            1 => LCH2_A::_01,
41            2 => LCH2_A::_10,
42            3 => LCH2_A::_11,
43            _ => unreachable!(),
44        }
45    }
46    #[doc = "Checks if the value of the field is `_00`"]
47    #[inline(always)]
48    pub fn is_00(&self) -> bool {
49        *self == LCH2_A::_00
50    }
51    #[doc = "Checks if the value of the field is `_01`"]
52    #[inline(always)]
53    pub fn is_01(&self) -> bool {
54        *self == LCH2_A::_01
55    }
56    #[doc = "Checks if the value of the field is `_10`"]
57    #[inline(always)]
58    pub fn is_10(&self) -> bool {
59        *self == LCH2_A::_10
60    }
61    #[doc = "Checks if the value of the field is `_11`"]
62    #[inline(always)]
63    pub fn is_11(&self) -> bool {
64        *self == LCH2_A::_11
65    }
66}
67#[doc = "Write proxy for field `LCH2`"]
68pub struct LCH2_W<'a> {
69    w: &'a mut W,
70}
71impl<'a> LCH2_W<'a> {
72    #[doc = r"Writes `variant` to the field"]
73    #[inline(always)]
74    pub fn variant(self, variant: LCH2_A) -> &'a mut W {
75        {
76            self.bits(variant.into())
77        }
78    }
79    #[doc = "DMA Channel 0"]
80    #[inline(always)]
81    pub fn _00(self) -> &'a mut W {
82        self.variant(LCH2_A::_00)
83    }
84    #[doc = "DMA Channel 1"]
85    #[inline(always)]
86    pub fn _01(self) -> &'a mut W {
87        self.variant(LCH2_A::_01)
88    }
89    #[doc = "DMA Channel 2"]
90    #[inline(always)]
91    pub fn _10(self) -> &'a mut W {
92        self.variant(LCH2_A::_10)
93    }
94    #[doc = "DMA Channel 3"]
95    #[inline(always)]
96    pub fn _11(self) -> &'a mut W {
97        self.variant(LCH2_A::_11)
98    }
99    #[doc = r"Writes raw bits to the field"]
100    #[inline(always)]
101    pub fn bits(self, value: u8) -> &'a mut W {
102        self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
103        self.w
104    }
105}
106#[doc = "Link channel 1\n\nValue on reset: 0"]
107#[derive(Clone, Copy, Debug, PartialEq)]
108#[repr(u8)]
109pub enum LCH1_A {
110    #[doc = "0: DMA Channel 0"]
111    _00 = 0,
112    #[doc = "1: DMA Channel 1"]
113    _01 = 1,
114    #[doc = "2: DMA Channel 2"]
115    _10 = 2,
116    #[doc = "3: DMA Channel 3"]
117    _11 = 3,
118}
119impl From<LCH1_A> for u8 {
120    #[inline(always)]
121    fn from(variant: LCH1_A) -> Self {
122        variant as _
123    }
124}
125#[doc = "Reader of field `LCH1`"]
126pub type LCH1_R = crate::R<u8, LCH1_A>;
127impl LCH1_R {
128    #[doc = r"Get enumerated values variant"]
129    #[inline(always)]
130    pub fn variant(&self) -> LCH1_A {
131        match self.bits {
132            0 => LCH1_A::_00,
133            1 => LCH1_A::_01,
134            2 => LCH1_A::_10,
135            3 => LCH1_A::_11,
136            _ => unreachable!(),
137        }
138    }
139    #[doc = "Checks if the value of the field is `_00`"]
140    #[inline(always)]
141    pub fn is_00(&self) -> bool {
142        *self == LCH1_A::_00
143    }
144    #[doc = "Checks if the value of the field is `_01`"]
145    #[inline(always)]
146    pub fn is_01(&self) -> bool {
147        *self == LCH1_A::_01
148    }
149    #[doc = "Checks if the value of the field is `_10`"]
150    #[inline(always)]
151    pub fn is_10(&self) -> bool {
152        *self == LCH1_A::_10
153    }
154    #[doc = "Checks if the value of the field is `_11`"]
155    #[inline(always)]
156    pub fn is_11(&self) -> bool {
157        *self == LCH1_A::_11
158    }
159}
160#[doc = "Write proxy for field `LCH1`"]
161pub struct LCH1_W<'a> {
162    w: &'a mut W,
163}
164impl<'a> LCH1_W<'a> {
165    #[doc = r"Writes `variant` to the field"]
166    #[inline(always)]
167    pub fn variant(self, variant: LCH1_A) -> &'a mut W {
168        {
169            self.bits(variant.into())
170        }
171    }
172    #[doc = "DMA Channel 0"]
173    #[inline(always)]
174    pub fn _00(self) -> &'a mut W {
175        self.variant(LCH1_A::_00)
176    }
177    #[doc = "DMA Channel 1"]
178    #[inline(always)]
179    pub fn _01(self) -> &'a mut W {
180        self.variant(LCH1_A::_01)
181    }
182    #[doc = "DMA Channel 2"]
183    #[inline(always)]
184    pub fn _10(self) -> &'a mut W {
185        self.variant(LCH1_A::_10)
186    }
187    #[doc = "DMA Channel 3"]
188    #[inline(always)]
189    pub fn _11(self) -> &'a mut W {
190        self.variant(LCH1_A::_11)
191    }
192    #[doc = r"Writes raw bits to the field"]
193    #[inline(always)]
194    pub fn bits(self, value: u8) -> &'a mut W {
195        self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u32) & 0x03) << 2);
196        self.w
197    }
198}
199#[doc = "Link channel control\n\nValue on reset: 0"]
200#[derive(Clone, Copy, Debug, PartialEq)]
201#[repr(u8)]
202pub enum LINKCC_A {
203    #[doc = "0: No channel-to-channel linking"]
204    _00 = 0,
205    #[doc = "1: Perform a link to channel LCH1 after each cycle-steal transfer followed by a link to LCH2 after the BCR decrements to zero"]
206    _01 = 1,
207    #[doc = "2: Perform a link to channel LCH1 after each cycle-steal transfer"]
208    _10 = 2,
209    #[doc = "3: Perform a link to channel LCH1 after the BCR decrements to zero"]
210    _11 = 3,
211}
212impl From<LINKCC_A> for u8 {
213    #[inline(always)]
214    fn from(variant: LINKCC_A) -> Self {
215        variant as _
216    }
217}
218#[doc = "Reader of field `LINKCC`"]
219pub type LINKCC_R = crate::R<u8, LINKCC_A>;
220impl LINKCC_R {
221    #[doc = r"Get enumerated values variant"]
222    #[inline(always)]
223    pub fn variant(&self) -> LINKCC_A {
224        match self.bits {
225            0 => LINKCC_A::_00,
226            1 => LINKCC_A::_01,
227            2 => LINKCC_A::_10,
228            3 => LINKCC_A::_11,
229            _ => unreachable!(),
230        }
231    }
232    #[doc = "Checks if the value of the field is `_00`"]
233    #[inline(always)]
234    pub fn is_00(&self) -> bool {
235        *self == LINKCC_A::_00
236    }
237    #[doc = "Checks if the value of the field is `_01`"]
238    #[inline(always)]
239    pub fn is_01(&self) -> bool {
240        *self == LINKCC_A::_01
241    }
242    #[doc = "Checks if the value of the field is `_10`"]
243    #[inline(always)]
244    pub fn is_10(&self) -> bool {
245        *self == LINKCC_A::_10
246    }
247    #[doc = "Checks if the value of the field is `_11`"]
248    #[inline(always)]
249    pub fn is_11(&self) -> bool {
250        *self == LINKCC_A::_11
251    }
252}
253#[doc = "Write proxy for field `LINKCC`"]
254pub struct LINKCC_W<'a> {
255    w: &'a mut W,
256}
257impl<'a> LINKCC_W<'a> {
258    #[doc = r"Writes `variant` to the field"]
259    #[inline(always)]
260    pub fn variant(self, variant: LINKCC_A) -> &'a mut W {
261        {
262            self.bits(variant.into())
263        }
264    }
265    #[doc = "No channel-to-channel linking"]
266    #[inline(always)]
267    pub fn _00(self) -> &'a mut W {
268        self.variant(LINKCC_A::_00)
269    }
270    #[doc = "Perform a link to channel LCH1 after each cycle-steal transfer followed by a link to LCH2 after the BCR decrements to zero"]
271    #[inline(always)]
272    pub fn _01(self) -> &'a mut W {
273        self.variant(LINKCC_A::_01)
274    }
275    #[doc = "Perform a link to channel LCH1 after each cycle-steal transfer"]
276    #[inline(always)]
277    pub fn _10(self) -> &'a mut W {
278        self.variant(LINKCC_A::_10)
279    }
280    #[doc = "Perform a link to channel LCH1 after the BCR decrements to zero"]
281    #[inline(always)]
282    pub fn _11(self) -> &'a mut W {
283        self.variant(LINKCC_A::_11)
284    }
285    #[doc = r"Writes raw bits to the field"]
286    #[inline(always)]
287    pub fn bits(self, value: u8) -> &'a mut W {
288        self.w.bits = (self.w.bits & !(0x03 << 4)) | (((value as u32) & 0x03) << 4);
289        self.w
290    }
291}
292#[doc = "Disable request\n\nValue on reset: 0"]
293#[derive(Clone, Copy, Debug, PartialEq)]
294pub enum D_REQ_A {
295    #[doc = "0: ERQ bit is not affected."]
296    _0 = 0,
297    #[doc = "1: ERQ bit is cleared when the BCR is exhausted."]
298    _1 = 1,
299}
300impl From<D_REQ_A> for bool {
301    #[inline(always)]
302    fn from(variant: D_REQ_A) -> Self {
303        variant as u8 != 0
304    }
305}
306#[doc = "Reader of field `D_REQ`"]
307pub type D_REQ_R = crate::R<bool, D_REQ_A>;
308impl D_REQ_R {
309    #[doc = r"Get enumerated values variant"]
310    #[inline(always)]
311    pub fn variant(&self) -> D_REQ_A {
312        match self.bits {
313            false => D_REQ_A::_0,
314            true => D_REQ_A::_1,
315        }
316    }
317    #[doc = "Checks if the value of the field is `_0`"]
318    #[inline(always)]
319    pub fn is_0(&self) -> bool {
320        *self == D_REQ_A::_0
321    }
322    #[doc = "Checks if the value of the field is `_1`"]
323    #[inline(always)]
324    pub fn is_1(&self) -> bool {
325        *self == D_REQ_A::_1
326    }
327}
328#[doc = "Write proxy for field `D_REQ`"]
329pub struct D_REQ_W<'a> {
330    w: &'a mut W,
331}
332impl<'a> D_REQ_W<'a> {
333    #[doc = r"Writes `variant` to the field"]
334    #[inline(always)]
335    pub fn variant(self, variant: D_REQ_A) -> &'a mut W {
336        {
337            self.bit(variant.into())
338        }
339    }
340    #[doc = "ERQ bit is not affected."]
341    #[inline(always)]
342    pub fn _0(self) -> &'a mut W {
343        self.variant(D_REQ_A::_0)
344    }
345    #[doc = "ERQ bit is cleared when the BCR is exhausted."]
346    #[inline(always)]
347    pub fn _1(self) -> &'a mut W {
348        self.variant(D_REQ_A::_1)
349    }
350    #[doc = r"Sets the field bit"]
351    #[inline(always)]
352    pub fn set_bit(self) -> &'a mut W {
353        self.bit(true)
354    }
355    #[doc = r"Clears the field bit"]
356    #[inline(always)]
357    pub fn clear_bit(self) -> &'a mut W {
358        self.bit(false)
359    }
360    #[doc = r"Writes raw bits to the field"]
361    #[inline(always)]
362    pub fn bit(self, value: bool) -> &'a mut W {
363        self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
364        self.w
365    }
366}
367#[doc = "Destination address modulo\n\nValue on reset: 0"]
368#[derive(Clone, Copy, Debug, PartialEq)]
369#[repr(u8)]
370pub enum DMOD_A {
371    #[doc = "0: Buffer disabled"]
372    _0000 = 0,
373    #[doc = "1: Circular buffer size is 16 bytes"]
374    _0001 = 1,
375    #[doc = "2: Circular buffer size is 32 bytes"]
376    _0010 = 2,
377    #[doc = "3: Circular buffer size is 64 bytes"]
378    _0011 = 3,
379    #[doc = "4: Circular buffer size is 128 bytes"]
380    _0100 = 4,
381    #[doc = "5: Circular buffer size is 256 bytes"]
382    _0101 = 5,
383    #[doc = "6: Circular buffer size is 512 bytes"]
384    _0110 = 6,
385    #[doc = "7: Circular buffer size is 1 KB"]
386    _0111 = 7,
387    #[doc = "8: Circular buffer size is 2 KB"]
388    _1000 = 8,
389    #[doc = "9: Circular buffer size is 4 KB"]
390    _1001 = 9,
391    #[doc = "10: Circular buffer size is 8 KB"]
392    _1010 = 10,
393    #[doc = "11: Circular buffer size is 16 KB"]
394    _1011 = 11,
395    #[doc = "12: Circular buffer size is 32 KB"]
396    _1100 = 12,
397    #[doc = "13: Circular buffer size is 64 KB"]
398    _1101 = 13,
399    #[doc = "14: Circular buffer size is 128 KB"]
400    _1110 = 14,
401    #[doc = "15: Circular buffer size is 256 KB"]
402    _1111 = 15,
403}
404impl From<DMOD_A> for u8 {
405    #[inline(always)]
406    fn from(variant: DMOD_A) -> Self {
407        variant as _
408    }
409}
410#[doc = "Reader of field `DMOD`"]
411pub type DMOD_R = crate::R<u8, DMOD_A>;
412impl DMOD_R {
413    #[doc = r"Get enumerated values variant"]
414    #[inline(always)]
415    pub fn variant(&self) -> DMOD_A {
416        match self.bits {
417            0 => DMOD_A::_0000,
418            1 => DMOD_A::_0001,
419            2 => DMOD_A::_0010,
420            3 => DMOD_A::_0011,
421            4 => DMOD_A::_0100,
422            5 => DMOD_A::_0101,
423            6 => DMOD_A::_0110,
424            7 => DMOD_A::_0111,
425            8 => DMOD_A::_1000,
426            9 => DMOD_A::_1001,
427            10 => DMOD_A::_1010,
428            11 => DMOD_A::_1011,
429            12 => DMOD_A::_1100,
430            13 => DMOD_A::_1101,
431            14 => DMOD_A::_1110,
432            15 => DMOD_A::_1111,
433            _ => unreachable!(),
434        }
435    }
436    #[doc = "Checks if the value of the field is `_0000`"]
437    #[inline(always)]
438    pub fn is_0000(&self) -> bool {
439        *self == DMOD_A::_0000
440    }
441    #[doc = "Checks if the value of the field is `_0001`"]
442    #[inline(always)]
443    pub fn is_0001(&self) -> bool {
444        *self == DMOD_A::_0001
445    }
446    #[doc = "Checks if the value of the field is `_0010`"]
447    #[inline(always)]
448    pub fn is_0010(&self) -> bool {
449        *self == DMOD_A::_0010
450    }
451    #[doc = "Checks if the value of the field is `_0011`"]
452    #[inline(always)]
453    pub fn is_0011(&self) -> bool {
454        *self == DMOD_A::_0011
455    }
456    #[doc = "Checks if the value of the field is `_0100`"]
457    #[inline(always)]
458    pub fn is_0100(&self) -> bool {
459        *self == DMOD_A::_0100
460    }
461    #[doc = "Checks if the value of the field is `_0101`"]
462    #[inline(always)]
463    pub fn is_0101(&self) -> bool {
464        *self == DMOD_A::_0101
465    }
466    #[doc = "Checks if the value of the field is `_0110`"]
467    #[inline(always)]
468    pub fn is_0110(&self) -> bool {
469        *self == DMOD_A::_0110
470    }
471    #[doc = "Checks if the value of the field is `_0111`"]
472    #[inline(always)]
473    pub fn is_0111(&self) -> bool {
474        *self == DMOD_A::_0111
475    }
476    #[doc = "Checks if the value of the field is `_1000`"]
477    #[inline(always)]
478    pub fn is_1000(&self) -> bool {
479        *self == DMOD_A::_1000
480    }
481    #[doc = "Checks if the value of the field is `_1001`"]
482    #[inline(always)]
483    pub fn is_1001(&self) -> bool {
484        *self == DMOD_A::_1001
485    }
486    #[doc = "Checks if the value of the field is `_1010`"]
487    #[inline(always)]
488    pub fn is_1010(&self) -> bool {
489        *self == DMOD_A::_1010
490    }
491    #[doc = "Checks if the value of the field is `_1011`"]
492    #[inline(always)]
493    pub fn is_1011(&self) -> bool {
494        *self == DMOD_A::_1011
495    }
496    #[doc = "Checks if the value of the field is `_1100`"]
497    #[inline(always)]
498    pub fn is_1100(&self) -> bool {
499        *self == DMOD_A::_1100
500    }
501    #[doc = "Checks if the value of the field is `_1101`"]
502    #[inline(always)]
503    pub fn is_1101(&self) -> bool {
504        *self == DMOD_A::_1101
505    }
506    #[doc = "Checks if the value of the field is `_1110`"]
507    #[inline(always)]
508    pub fn is_1110(&self) -> bool {
509        *self == DMOD_A::_1110
510    }
511    #[doc = "Checks if the value of the field is `_1111`"]
512    #[inline(always)]
513    pub fn is_1111(&self) -> bool {
514        *self == DMOD_A::_1111
515    }
516}
517#[doc = "Write proxy for field `DMOD`"]
518pub struct DMOD_W<'a> {
519    w: &'a mut W,
520}
521impl<'a> DMOD_W<'a> {
522    #[doc = r"Writes `variant` to the field"]
523    #[inline(always)]
524    pub fn variant(self, variant: DMOD_A) -> &'a mut W {
525        {
526            self.bits(variant.into())
527        }
528    }
529    #[doc = "Buffer disabled"]
530    #[inline(always)]
531    pub fn _0000(self) -> &'a mut W {
532        self.variant(DMOD_A::_0000)
533    }
534    #[doc = "Circular buffer size is 16 bytes"]
535    #[inline(always)]
536    pub fn _0001(self) -> &'a mut W {
537        self.variant(DMOD_A::_0001)
538    }
539    #[doc = "Circular buffer size is 32 bytes"]
540    #[inline(always)]
541    pub fn _0010(self) -> &'a mut W {
542        self.variant(DMOD_A::_0010)
543    }
544    #[doc = "Circular buffer size is 64 bytes"]
545    #[inline(always)]
546    pub fn _0011(self) -> &'a mut W {
547        self.variant(DMOD_A::_0011)
548    }
549    #[doc = "Circular buffer size is 128 bytes"]
550    #[inline(always)]
551    pub fn _0100(self) -> &'a mut W {
552        self.variant(DMOD_A::_0100)
553    }
554    #[doc = "Circular buffer size is 256 bytes"]
555    #[inline(always)]
556    pub fn _0101(self) -> &'a mut W {
557        self.variant(DMOD_A::_0101)
558    }
559    #[doc = "Circular buffer size is 512 bytes"]
560    #[inline(always)]
561    pub fn _0110(self) -> &'a mut W {
562        self.variant(DMOD_A::_0110)
563    }
564    #[doc = "Circular buffer size is 1 KB"]
565    #[inline(always)]
566    pub fn _0111(self) -> &'a mut W {
567        self.variant(DMOD_A::_0111)
568    }
569    #[doc = "Circular buffer size is 2 KB"]
570    #[inline(always)]
571    pub fn _1000(self) -> &'a mut W {
572        self.variant(DMOD_A::_1000)
573    }
574    #[doc = "Circular buffer size is 4 KB"]
575    #[inline(always)]
576    pub fn _1001(self) -> &'a mut W {
577        self.variant(DMOD_A::_1001)
578    }
579    #[doc = "Circular buffer size is 8 KB"]
580    #[inline(always)]
581    pub fn _1010(self) -> &'a mut W {
582        self.variant(DMOD_A::_1010)
583    }
584    #[doc = "Circular buffer size is 16 KB"]
585    #[inline(always)]
586    pub fn _1011(self) -> &'a mut W {
587        self.variant(DMOD_A::_1011)
588    }
589    #[doc = "Circular buffer size is 32 KB"]
590    #[inline(always)]
591    pub fn _1100(self) -> &'a mut W {
592        self.variant(DMOD_A::_1100)
593    }
594    #[doc = "Circular buffer size is 64 KB"]
595    #[inline(always)]
596    pub fn _1101(self) -> &'a mut W {
597        self.variant(DMOD_A::_1101)
598    }
599    #[doc = "Circular buffer size is 128 KB"]
600    #[inline(always)]
601    pub fn _1110(self) -> &'a mut W {
602        self.variant(DMOD_A::_1110)
603    }
604    #[doc = "Circular buffer size is 256 KB"]
605    #[inline(always)]
606    pub fn _1111(self) -> &'a mut W {
607        self.variant(DMOD_A::_1111)
608    }
609    #[doc = r"Writes raw bits to the field"]
610    #[inline(always)]
611    pub fn bits(self, value: u8) -> &'a mut W {
612        self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8);
613        self.w
614    }
615}
616#[doc = "Source address modulo\n\nValue on reset: 0"]
617#[derive(Clone, Copy, Debug, PartialEq)]
618#[repr(u8)]
619pub enum SMOD_A {
620    #[doc = "0: Buffer disabled"]
621    _0000 = 0,
622    #[doc = "1: Circular buffer size is 16 bytes"]
623    _0001 = 1,
624    #[doc = "2: Circular buffer size is 32 bytes"]
625    _0010 = 2,
626    #[doc = "3: Circular buffer size is 64 bytes"]
627    _0011 = 3,
628    #[doc = "4: Circular buffer size is 128 bytes"]
629    _0100 = 4,
630    #[doc = "5: Circular buffer size is 256 bytes"]
631    _0101 = 5,
632    #[doc = "6: Circular buffer size is 512 bytes"]
633    _0110 = 6,
634    #[doc = "7: Circular buffer size is 1 KB"]
635    _0111 = 7,
636    #[doc = "8: Circular buffer size is 2 KB"]
637    _1000 = 8,
638    #[doc = "9: Circular buffer size is 4 KB"]
639    _1001 = 9,
640    #[doc = "10: Circular buffer size is 8 KB"]
641    _1010 = 10,
642    #[doc = "11: Circular buffer size is 16 KB"]
643    _1011 = 11,
644    #[doc = "12: Circular buffer size is 32 KB"]
645    _1100 = 12,
646    #[doc = "13: Circular buffer size is 64 KB"]
647    _1101 = 13,
648    #[doc = "14: Circular buffer size is 128 KB"]
649    _1110 = 14,
650    #[doc = "15: Circular buffer size is 256 KB"]
651    _1111 = 15,
652}
653impl From<SMOD_A> for u8 {
654    #[inline(always)]
655    fn from(variant: SMOD_A) -> Self {
656        variant as _
657    }
658}
659#[doc = "Reader of field `SMOD`"]
660pub type SMOD_R = crate::R<u8, SMOD_A>;
661impl SMOD_R {
662    #[doc = r"Get enumerated values variant"]
663    #[inline(always)]
664    pub fn variant(&self) -> SMOD_A {
665        match self.bits {
666            0 => SMOD_A::_0000,
667            1 => SMOD_A::_0001,
668            2 => SMOD_A::_0010,
669            3 => SMOD_A::_0011,
670            4 => SMOD_A::_0100,
671            5 => SMOD_A::_0101,
672            6 => SMOD_A::_0110,
673            7 => SMOD_A::_0111,
674            8 => SMOD_A::_1000,
675            9 => SMOD_A::_1001,
676            10 => SMOD_A::_1010,
677            11 => SMOD_A::_1011,
678            12 => SMOD_A::_1100,
679            13 => SMOD_A::_1101,
680            14 => SMOD_A::_1110,
681            15 => SMOD_A::_1111,
682            _ => unreachable!(),
683        }
684    }
685    #[doc = "Checks if the value of the field is `_0000`"]
686    #[inline(always)]
687    pub fn is_0000(&self) -> bool {
688        *self == SMOD_A::_0000
689    }
690    #[doc = "Checks if the value of the field is `_0001`"]
691    #[inline(always)]
692    pub fn is_0001(&self) -> bool {
693        *self == SMOD_A::_0001
694    }
695    #[doc = "Checks if the value of the field is `_0010`"]
696    #[inline(always)]
697    pub fn is_0010(&self) -> bool {
698        *self == SMOD_A::_0010
699    }
700    #[doc = "Checks if the value of the field is `_0011`"]
701    #[inline(always)]
702    pub fn is_0011(&self) -> bool {
703        *self == SMOD_A::_0011
704    }
705    #[doc = "Checks if the value of the field is `_0100`"]
706    #[inline(always)]
707    pub fn is_0100(&self) -> bool {
708        *self == SMOD_A::_0100
709    }
710    #[doc = "Checks if the value of the field is `_0101`"]
711    #[inline(always)]
712    pub fn is_0101(&self) -> bool {
713        *self == SMOD_A::_0101
714    }
715    #[doc = "Checks if the value of the field is `_0110`"]
716    #[inline(always)]
717    pub fn is_0110(&self) -> bool {
718        *self == SMOD_A::_0110
719    }
720    #[doc = "Checks if the value of the field is `_0111`"]
721    #[inline(always)]
722    pub fn is_0111(&self) -> bool {
723        *self == SMOD_A::_0111
724    }
725    #[doc = "Checks if the value of the field is `_1000`"]
726    #[inline(always)]
727    pub fn is_1000(&self) -> bool {
728        *self == SMOD_A::_1000
729    }
730    #[doc = "Checks if the value of the field is `_1001`"]
731    #[inline(always)]
732    pub fn is_1001(&self) -> bool {
733        *self == SMOD_A::_1001
734    }
735    #[doc = "Checks if the value of the field is `_1010`"]
736    #[inline(always)]
737    pub fn is_1010(&self) -> bool {
738        *self == SMOD_A::_1010
739    }
740    #[doc = "Checks if the value of the field is `_1011`"]
741    #[inline(always)]
742    pub fn is_1011(&self) -> bool {
743        *self == SMOD_A::_1011
744    }
745    #[doc = "Checks if the value of the field is `_1100`"]
746    #[inline(always)]
747    pub fn is_1100(&self) -> bool {
748        *self == SMOD_A::_1100
749    }
750    #[doc = "Checks if the value of the field is `_1101`"]
751    #[inline(always)]
752    pub fn is_1101(&self) -> bool {
753        *self == SMOD_A::_1101
754    }
755    #[doc = "Checks if the value of the field is `_1110`"]
756    #[inline(always)]
757    pub fn is_1110(&self) -> bool {
758        *self == SMOD_A::_1110
759    }
760    #[doc = "Checks if the value of the field is `_1111`"]
761    #[inline(always)]
762    pub fn is_1111(&self) -> bool {
763        *self == SMOD_A::_1111
764    }
765}
766#[doc = "Write proxy for field `SMOD`"]
767pub struct SMOD_W<'a> {
768    w: &'a mut W,
769}
770impl<'a> SMOD_W<'a> {
771    #[doc = r"Writes `variant` to the field"]
772    #[inline(always)]
773    pub fn variant(self, variant: SMOD_A) -> &'a mut W {
774        {
775            self.bits(variant.into())
776        }
777    }
778    #[doc = "Buffer disabled"]
779    #[inline(always)]
780    pub fn _0000(self) -> &'a mut W {
781        self.variant(SMOD_A::_0000)
782    }
783    #[doc = "Circular buffer size is 16 bytes"]
784    #[inline(always)]
785    pub fn _0001(self) -> &'a mut W {
786        self.variant(SMOD_A::_0001)
787    }
788    #[doc = "Circular buffer size is 32 bytes"]
789    #[inline(always)]
790    pub fn _0010(self) -> &'a mut W {
791        self.variant(SMOD_A::_0010)
792    }
793    #[doc = "Circular buffer size is 64 bytes"]
794    #[inline(always)]
795    pub fn _0011(self) -> &'a mut W {
796        self.variant(SMOD_A::_0011)
797    }
798    #[doc = "Circular buffer size is 128 bytes"]
799    #[inline(always)]
800    pub fn _0100(self) -> &'a mut W {
801        self.variant(SMOD_A::_0100)
802    }
803    #[doc = "Circular buffer size is 256 bytes"]
804    #[inline(always)]
805    pub fn _0101(self) -> &'a mut W {
806        self.variant(SMOD_A::_0101)
807    }
808    #[doc = "Circular buffer size is 512 bytes"]
809    #[inline(always)]
810    pub fn _0110(self) -> &'a mut W {
811        self.variant(SMOD_A::_0110)
812    }
813    #[doc = "Circular buffer size is 1 KB"]
814    #[inline(always)]
815    pub fn _0111(self) -> &'a mut W {
816        self.variant(SMOD_A::_0111)
817    }
818    #[doc = "Circular buffer size is 2 KB"]
819    #[inline(always)]
820    pub fn _1000(self) -> &'a mut W {
821        self.variant(SMOD_A::_1000)
822    }
823    #[doc = "Circular buffer size is 4 KB"]
824    #[inline(always)]
825    pub fn _1001(self) -> &'a mut W {
826        self.variant(SMOD_A::_1001)
827    }
828    #[doc = "Circular buffer size is 8 KB"]
829    #[inline(always)]
830    pub fn _1010(self) -> &'a mut W {
831        self.variant(SMOD_A::_1010)
832    }
833    #[doc = "Circular buffer size is 16 KB"]
834    #[inline(always)]
835    pub fn _1011(self) -> &'a mut W {
836        self.variant(SMOD_A::_1011)
837    }
838    #[doc = "Circular buffer size is 32 KB"]
839    #[inline(always)]
840    pub fn _1100(self) -> &'a mut W {
841        self.variant(SMOD_A::_1100)
842    }
843    #[doc = "Circular buffer size is 64 KB"]
844    #[inline(always)]
845    pub fn _1101(self) -> &'a mut W {
846        self.variant(SMOD_A::_1101)
847    }
848    #[doc = "Circular buffer size is 128 KB"]
849    #[inline(always)]
850    pub fn _1110(self) -> &'a mut W {
851        self.variant(SMOD_A::_1110)
852    }
853    #[doc = "Circular buffer size is 256 KB"]
854    #[inline(always)]
855    pub fn _1111(self) -> &'a mut W {
856        self.variant(SMOD_A::_1111)
857    }
858    #[doc = r"Writes raw bits to the field"]
859    #[inline(always)]
860    pub fn bits(self, value: u8) -> &'a mut W {
861        self.w.bits = (self.w.bits & !(0x0f << 12)) | (((value as u32) & 0x0f) << 12);
862        self.w
863    }
864}
865#[doc = "Start transfer\n\nValue on reset: 0"]
866#[derive(Clone, Copy, Debug, PartialEq)]
867pub enum START_AW {
868    #[doc = "0: DMA inactive"]
869    _0 = 0,
870    #[doc = "1: The DMA begins the transfer in accordance to the values in the TCDn. START is cleared automatically after one module clock and always reads as logic 0."]
871    _1 = 1,
872}
873impl From<START_AW> for bool {
874    #[inline(always)]
875    fn from(variant: START_AW) -> Self {
876        variant as u8 != 0
877    }
878}
879#[doc = "Write proxy for field `START`"]
880pub struct START_W<'a> {
881    w: &'a mut W,
882}
883impl<'a> START_W<'a> {
884    #[doc = r"Writes `variant` to the field"]
885    #[inline(always)]
886    pub fn variant(self, variant: START_AW) -> &'a mut W {
887        {
888            self.bit(variant.into())
889        }
890    }
891    #[doc = "DMA inactive"]
892    #[inline(always)]
893    pub fn _0(self) -> &'a mut W {
894        self.variant(START_AW::_0)
895    }
896    #[doc = "The DMA begins the transfer in accordance to the values in the TCDn. START is cleared automatically after one module clock and always reads as logic 0."]
897    #[inline(always)]
898    pub fn _1(self) -> &'a mut W {
899        self.variant(START_AW::_1)
900    }
901    #[doc = r"Sets the field bit"]
902    #[inline(always)]
903    pub fn set_bit(self) -> &'a mut W {
904        self.bit(true)
905    }
906    #[doc = r"Clears the field bit"]
907    #[inline(always)]
908    pub fn clear_bit(self) -> &'a mut W {
909        self.bit(false)
910    }
911    #[doc = r"Writes raw bits to the field"]
912    #[inline(always)]
913    pub fn bit(self, value: bool) -> &'a mut W {
914        self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
915        self.w
916    }
917}
918#[doc = "Destination size\n\nValue on reset: 0"]
919#[derive(Clone, Copy, Debug, PartialEq)]
920#[repr(u8)]
921pub enum DSIZE_A {
922    #[doc = "0: 32-bit"]
923    _00 = 0,
924    #[doc = "1: 8-bit"]
925    _01 = 1,
926    #[doc = "2: 16-bit"]
927    _10 = 2,
928    #[doc = "3: Reserved (generates a configuration error (DSRn\\[CE\\]) if incorrectly specified at time of channel activation)"]
929    _11 = 3,
930}
931impl From<DSIZE_A> for u8 {
932    #[inline(always)]
933    fn from(variant: DSIZE_A) -> Self {
934        variant as _
935    }
936}
937#[doc = "Reader of field `DSIZE`"]
938pub type DSIZE_R = crate::R<u8, DSIZE_A>;
939impl DSIZE_R {
940    #[doc = r"Get enumerated values variant"]
941    #[inline(always)]
942    pub fn variant(&self) -> DSIZE_A {
943        match self.bits {
944            0 => DSIZE_A::_00,
945            1 => DSIZE_A::_01,
946            2 => DSIZE_A::_10,
947            3 => DSIZE_A::_11,
948            _ => unreachable!(),
949        }
950    }
951    #[doc = "Checks if the value of the field is `_00`"]
952    #[inline(always)]
953    pub fn is_00(&self) -> bool {
954        *self == DSIZE_A::_00
955    }
956    #[doc = "Checks if the value of the field is `_01`"]
957    #[inline(always)]
958    pub fn is_01(&self) -> bool {
959        *self == DSIZE_A::_01
960    }
961    #[doc = "Checks if the value of the field is `_10`"]
962    #[inline(always)]
963    pub fn is_10(&self) -> bool {
964        *self == DSIZE_A::_10
965    }
966    #[doc = "Checks if the value of the field is `_11`"]
967    #[inline(always)]
968    pub fn is_11(&self) -> bool {
969        *self == DSIZE_A::_11
970    }
971}
972#[doc = "Write proxy for field `DSIZE`"]
973pub struct DSIZE_W<'a> {
974    w: &'a mut W,
975}
976impl<'a> DSIZE_W<'a> {
977    #[doc = r"Writes `variant` to the field"]
978    #[inline(always)]
979    pub fn variant(self, variant: DSIZE_A) -> &'a mut W {
980        {
981            self.bits(variant.into())
982        }
983    }
984    #[doc = "32-bit"]
985    #[inline(always)]
986    pub fn _00(self) -> &'a mut W {
987        self.variant(DSIZE_A::_00)
988    }
989    #[doc = "8-bit"]
990    #[inline(always)]
991    pub fn _01(self) -> &'a mut W {
992        self.variant(DSIZE_A::_01)
993    }
994    #[doc = "16-bit"]
995    #[inline(always)]
996    pub fn _10(self) -> &'a mut W {
997        self.variant(DSIZE_A::_10)
998    }
999    #[doc = "Reserved (generates a configuration error (DSRn\\[CE\\]) if incorrectly specified at time of channel activation)"]
1000    #[inline(always)]
1001    pub fn _11(self) -> &'a mut W {
1002        self.variant(DSIZE_A::_11)
1003    }
1004    #[doc = r"Writes raw bits to the field"]
1005    #[inline(always)]
1006    pub fn bits(self, value: u8) -> &'a mut W {
1007        self.w.bits = (self.w.bits & !(0x03 << 17)) | (((value as u32) & 0x03) << 17);
1008        self.w
1009    }
1010}
1011#[doc = "Destination increment\n\nValue on reset: 0"]
1012#[derive(Clone, Copy, Debug, PartialEq)]
1013pub enum DINC_A {
1014    #[doc = "0: No change to the DAR after a successful transfer."]
1015    _0 = 0,
1016    #[doc = "1: The DAR increments by 1, 2, 4 depending upon the size of the transfer."]
1017    _1 = 1,
1018}
1019impl From<DINC_A> for bool {
1020    #[inline(always)]
1021    fn from(variant: DINC_A) -> Self {
1022        variant as u8 != 0
1023    }
1024}
1025#[doc = "Reader of field `DINC`"]
1026pub type DINC_R = crate::R<bool, DINC_A>;
1027impl DINC_R {
1028    #[doc = r"Get enumerated values variant"]
1029    #[inline(always)]
1030    pub fn variant(&self) -> DINC_A {
1031        match self.bits {
1032            false => DINC_A::_0,
1033            true => DINC_A::_1,
1034        }
1035    }
1036    #[doc = "Checks if the value of the field is `_0`"]
1037    #[inline(always)]
1038    pub fn is_0(&self) -> bool {
1039        *self == DINC_A::_0
1040    }
1041    #[doc = "Checks if the value of the field is `_1`"]
1042    #[inline(always)]
1043    pub fn is_1(&self) -> bool {
1044        *self == DINC_A::_1
1045    }
1046}
1047#[doc = "Write proxy for field `DINC`"]
1048pub struct DINC_W<'a> {
1049    w: &'a mut W,
1050}
1051impl<'a> DINC_W<'a> {
1052    #[doc = r"Writes `variant` to the field"]
1053    #[inline(always)]
1054    pub fn variant(self, variant: DINC_A) -> &'a mut W {
1055        {
1056            self.bit(variant.into())
1057        }
1058    }
1059    #[doc = "No change to the DAR after a successful transfer."]
1060    #[inline(always)]
1061    pub fn _0(self) -> &'a mut W {
1062        self.variant(DINC_A::_0)
1063    }
1064    #[doc = "The DAR increments by 1, 2, 4 depending upon the size of the transfer."]
1065    #[inline(always)]
1066    pub fn _1(self) -> &'a mut W {
1067        self.variant(DINC_A::_1)
1068    }
1069    #[doc = r"Sets the field bit"]
1070    #[inline(always)]
1071    pub fn set_bit(self) -> &'a mut W {
1072        self.bit(true)
1073    }
1074    #[doc = r"Clears the field bit"]
1075    #[inline(always)]
1076    pub fn clear_bit(self) -> &'a mut W {
1077        self.bit(false)
1078    }
1079    #[doc = r"Writes raw bits to the field"]
1080    #[inline(always)]
1081    pub fn bit(self, value: bool) -> &'a mut W {
1082        self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
1083        self.w
1084    }
1085}
1086#[doc = "Source size\n\nValue on reset: 0"]
1087#[derive(Clone, Copy, Debug, PartialEq)]
1088#[repr(u8)]
1089pub enum SSIZE_A {
1090    #[doc = "0: 32-bit"]
1091    _00 = 0,
1092    #[doc = "1: 8-bit"]
1093    _01 = 1,
1094    #[doc = "2: 16-bit"]
1095    _10 = 2,
1096    #[doc = "3: Reserved (generates a configuration error (DSRn\\[CE\\]) if incorrectly specified at time of channel activation)"]
1097    _11 = 3,
1098}
1099impl From<SSIZE_A> for u8 {
1100    #[inline(always)]
1101    fn from(variant: SSIZE_A) -> Self {
1102        variant as _
1103    }
1104}
1105#[doc = "Reader of field `SSIZE`"]
1106pub type SSIZE_R = crate::R<u8, SSIZE_A>;
1107impl SSIZE_R {
1108    #[doc = r"Get enumerated values variant"]
1109    #[inline(always)]
1110    pub fn variant(&self) -> SSIZE_A {
1111        match self.bits {
1112            0 => SSIZE_A::_00,
1113            1 => SSIZE_A::_01,
1114            2 => SSIZE_A::_10,
1115            3 => SSIZE_A::_11,
1116            _ => unreachable!(),
1117        }
1118    }
1119    #[doc = "Checks if the value of the field is `_00`"]
1120    #[inline(always)]
1121    pub fn is_00(&self) -> bool {
1122        *self == SSIZE_A::_00
1123    }
1124    #[doc = "Checks if the value of the field is `_01`"]
1125    #[inline(always)]
1126    pub fn is_01(&self) -> bool {
1127        *self == SSIZE_A::_01
1128    }
1129    #[doc = "Checks if the value of the field is `_10`"]
1130    #[inline(always)]
1131    pub fn is_10(&self) -> bool {
1132        *self == SSIZE_A::_10
1133    }
1134    #[doc = "Checks if the value of the field is `_11`"]
1135    #[inline(always)]
1136    pub fn is_11(&self) -> bool {
1137        *self == SSIZE_A::_11
1138    }
1139}
1140#[doc = "Write proxy for field `SSIZE`"]
1141pub struct SSIZE_W<'a> {
1142    w: &'a mut W,
1143}
1144impl<'a> SSIZE_W<'a> {
1145    #[doc = r"Writes `variant` to the field"]
1146    #[inline(always)]
1147    pub fn variant(self, variant: SSIZE_A) -> &'a mut W {
1148        {
1149            self.bits(variant.into())
1150        }
1151    }
1152    #[doc = "32-bit"]
1153    #[inline(always)]
1154    pub fn _00(self) -> &'a mut W {
1155        self.variant(SSIZE_A::_00)
1156    }
1157    #[doc = "8-bit"]
1158    #[inline(always)]
1159    pub fn _01(self) -> &'a mut W {
1160        self.variant(SSIZE_A::_01)
1161    }
1162    #[doc = "16-bit"]
1163    #[inline(always)]
1164    pub fn _10(self) -> &'a mut W {
1165        self.variant(SSIZE_A::_10)
1166    }
1167    #[doc = "Reserved (generates a configuration error (DSRn\\[CE\\]) if incorrectly specified at time of channel activation)"]
1168    #[inline(always)]
1169    pub fn _11(self) -> &'a mut W {
1170        self.variant(SSIZE_A::_11)
1171    }
1172    #[doc = r"Writes raw bits to the field"]
1173    #[inline(always)]
1174    pub fn bits(self, value: u8) -> &'a mut W {
1175        self.w.bits = (self.w.bits & !(0x03 << 20)) | (((value as u32) & 0x03) << 20);
1176        self.w
1177    }
1178}
1179#[doc = "Source increment\n\nValue on reset: 0"]
1180#[derive(Clone, Copy, Debug, PartialEq)]
1181pub enum SINC_A {
1182    #[doc = "0: No change to SAR after a successful transfer."]
1183    _0 = 0,
1184    #[doc = "1: The SAR increments by 1, 2, 4 as determined by the transfer size."]
1185    _1 = 1,
1186}
1187impl From<SINC_A> for bool {
1188    #[inline(always)]
1189    fn from(variant: SINC_A) -> Self {
1190        variant as u8 != 0
1191    }
1192}
1193#[doc = "Reader of field `SINC`"]
1194pub type SINC_R = crate::R<bool, SINC_A>;
1195impl SINC_R {
1196    #[doc = r"Get enumerated values variant"]
1197    #[inline(always)]
1198    pub fn variant(&self) -> SINC_A {
1199        match self.bits {
1200            false => SINC_A::_0,
1201            true => SINC_A::_1,
1202        }
1203    }
1204    #[doc = "Checks if the value of the field is `_0`"]
1205    #[inline(always)]
1206    pub fn is_0(&self) -> bool {
1207        *self == SINC_A::_0
1208    }
1209    #[doc = "Checks if the value of the field is `_1`"]
1210    #[inline(always)]
1211    pub fn is_1(&self) -> bool {
1212        *self == SINC_A::_1
1213    }
1214}
1215#[doc = "Write proxy for field `SINC`"]
1216pub struct SINC_W<'a> {
1217    w: &'a mut W,
1218}
1219impl<'a> SINC_W<'a> {
1220    #[doc = r"Writes `variant` to the field"]
1221    #[inline(always)]
1222    pub fn variant(self, variant: SINC_A) -> &'a mut W {
1223        {
1224            self.bit(variant.into())
1225        }
1226    }
1227    #[doc = "No change to SAR after a successful transfer."]
1228    #[inline(always)]
1229    pub fn _0(self) -> &'a mut W {
1230        self.variant(SINC_A::_0)
1231    }
1232    #[doc = "The SAR increments by 1, 2, 4 as determined by the transfer size."]
1233    #[inline(always)]
1234    pub fn _1(self) -> &'a mut W {
1235        self.variant(SINC_A::_1)
1236    }
1237    #[doc = r"Sets the field bit"]
1238    #[inline(always)]
1239    pub fn set_bit(self) -> &'a mut W {
1240        self.bit(true)
1241    }
1242    #[doc = r"Clears the field bit"]
1243    #[inline(always)]
1244    pub fn clear_bit(self) -> &'a mut W {
1245        self.bit(false)
1246    }
1247    #[doc = r"Writes raw bits to the field"]
1248    #[inline(always)]
1249    pub fn bit(self, value: bool) -> &'a mut W {
1250        self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
1251        self.w
1252    }
1253}
1254#[doc = "Enable asynchronous DMA requests\n\nValue on reset: 0"]
1255#[derive(Clone, Copy, Debug, PartialEq)]
1256pub enum EADREQ_A {
1257    #[doc = "0: Disabled"]
1258    _0 = 0,
1259    #[doc = "1: Enabled"]
1260    _1 = 1,
1261}
1262impl From<EADREQ_A> for bool {
1263    #[inline(always)]
1264    fn from(variant: EADREQ_A) -> Self {
1265        variant as u8 != 0
1266    }
1267}
1268#[doc = "Reader of field `EADREQ`"]
1269pub type EADREQ_R = crate::R<bool, EADREQ_A>;
1270impl EADREQ_R {
1271    #[doc = r"Get enumerated values variant"]
1272    #[inline(always)]
1273    pub fn variant(&self) -> EADREQ_A {
1274        match self.bits {
1275            false => EADREQ_A::_0,
1276            true => EADREQ_A::_1,
1277        }
1278    }
1279    #[doc = "Checks if the value of the field is `_0`"]
1280    #[inline(always)]
1281    pub fn is_0(&self) -> bool {
1282        *self == EADREQ_A::_0
1283    }
1284    #[doc = "Checks if the value of the field is `_1`"]
1285    #[inline(always)]
1286    pub fn is_1(&self) -> bool {
1287        *self == EADREQ_A::_1
1288    }
1289}
1290#[doc = "Write proxy for field `EADREQ`"]
1291pub struct EADREQ_W<'a> {
1292    w: &'a mut W,
1293}
1294impl<'a> EADREQ_W<'a> {
1295    #[doc = r"Writes `variant` to the field"]
1296    #[inline(always)]
1297    pub fn variant(self, variant: EADREQ_A) -> &'a mut W {
1298        {
1299            self.bit(variant.into())
1300        }
1301    }
1302    #[doc = "Disabled"]
1303    #[inline(always)]
1304    pub fn _0(self) -> &'a mut W {
1305        self.variant(EADREQ_A::_0)
1306    }
1307    #[doc = "Enabled"]
1308    #[inline(always)]
1309    pub fn _1(self) -> &'a mut W {
1310        self.variant(EADREQ_A::_1)
1311    }
1312    #[doc = r"Sets the field bit"]
1313    #[inline(always)]
1314    pub fn set_bit(self) -> &'a mut W {
1315        self.bit(true)
1316    }
1317    #[doc = r"Clears the field bit"]
1318    #[inline(always)]
1319    pub fn clear_bit(self) -> &'a mut W {
1320        self.bit(false)
1321    }
1322    #[doc = r"Writes raw bits to the field"]
1323    #[inline(always)]
1324    pub fn bit(self, value: bool) -> &'a mut W {
1325        self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
1326        self.w
1327    }
1328}
1329#[doc = "Auto-align\n\nValue on reset: 0"]
1330#[derive(Clone, Copy, Debug, PartialEq)]
1331pub enum AA_A {
1332    #[doc = "0: Auto-align disabled"]
1333    _0 = 0,
1334    #[doc = "1: If SSIZE indicates a transfer no smaller than DSIZE, source accesses are auto-aligned; otherwise, destination accesses are auto-aligned. Source alignment takes precedence over destination alignment. If auto-alignment is enabled, the appropriate address register increments, regardless of DINC or SINC."]
1335    _1 = 1,
1336}
1337impl From<AA_A> for bool {
1338    #[inline(always)]
1339    fn from(variant: AA_A) -> Self {
1340        variant as u8 != 0
1341    }
1342}
1343#[doc = "Reader of field `AA`"]
1344pub type AA_R = crate::R<bool, AA_A>;
1345impl AA_R {
1346    #[doc = r"Get enumerated values variant"]
1347    #[inline(always)]
1348    pub fn variant(&self) -> AA_A {
1349        match self.bits {
1350            false => AA_A::_0,
1351            true => AA_A::_1,
1352        }
1353    }
1354    #[doc = "Checks if the value of the field is `_0`"]
1355    #[inline(always)]
1356    pub fn is_0(&self) -> bool {
1357        *self == AA_A::_0
1358    }
1359    #[doc = "Checks if the value of the field is `_1`"]
1360    #[inline(always)]
1361    pub fn is_1(&self) -> bool {
1362        *self == AA_A::_1
1363    }
1364}
1365#[doc = "Write proxy for field `AA`"]
1366pub struct AA_W<'a> {
1367    w: &'a mut W,
1368}
1369impl<'a> AA_W<'a> {
1370    #[doc = r"Writes `variant` to the field"]
1371    #[inline(always)]
1372    pub fn variant(self, variant: AA_A) -> &'a mut W {
1373        {
1374            self.bit(variant.into())
1375        }
1376    }
1377    #[doc = "Auto-align disabled"]
1378    #[inline(always)]
1379    pub fn _0(self) -> &'a mut W {
1380        self.variant(AA_A::_0)
1381    }
1382    #[doc = "If SSIZE indicates a transfer no smaller than DSIZE, source accesses are auto-aligned; otherwise, destination accesses are auto-aligned. Source alignment takes precedence over destination alignment. If auto-alignment is enabled, the appropriate address register increments, regardless of DINC or SINC."]
1383    #[inline(always)]
1384    pub fn _1(self) -> &'a mut W {
1385        self.variant(AA_A::_1)
1386    }
1387    #[doc = r"Sets the field bit"]
1388    #[inline(always)]
1389    pub fn set_bit(self) -> &'a mut W {
1390        self.bit(true)
1391    }
1392    #[doc = r"Clears the field bit"]
1393    #[inline(always)]
1394    pub fn clear_bit(self) -> &'a mut W {
1395        self.bit(false)
1396    }
1397    #[doc = r"Writes raw bits to the field"]
1398    #[inline(always)]
1399    pub fn bit(self, value: bool) -> &'a mut W {
1400        self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
1401        self.w
1402    }
1403}
1404#[doc = "Cycle steal\n\nValue on reset: 0"]
1405#[derive(Clone, Copy, Debug, PartialEq)]
1406pub enum CS_A {
1407    #[doc = "0: DMA continuously makes read/write transfers until the BCR decrements to 0."]
1408    _0 = 0,
1409    #[doc = "1: Forces a single read/write transfer per request."]
1410    _1 = 1,
1411}
1412impl From<CS_A> for bool {
1413    #[inline(always)]
1414    fn from(variant: CS_A) -> Self {
1415        variant as u8 != 0
1416    }
1417}
1418#[doc = "Reader of field `CS`"]
1419pub type CS_R = crate::R<bool, CS_A>;
1420impl CS_R {
1421    #[doc = r"Get enumerated values variant"]
1422    #[inline(always)]
1423    pub fn variant(&self) -> CS_A {
1424        match self.bits {
1425            false => CS_A::_0,
1426            true => CS_A::_1,
1427        }
1428    }
1429    #[doc = "Checks if the value of the field is `_0`"]
1430    #[inline(always)]
1431    pub fn is_0(&self) -> bool {
1432        *self == CS_A::_0
1433    }
1434    #[doc = "Checks if the value of the field is `_1`"]
1435    #[inline(always)]
1436    pub fn is_1(&self) -> bool {
1437        *self == CS_A::_1
1438    }
1439}
1440#[doc = "Write proxy for field `CS`"]
1441pub struct CS_W<'a> {
1442    w: &'a mut W,
1443}
1444impl<'a> CS_W<'a> {
1445    #[doc = r"Writes `variant` to the field"]
1446    #[inline(always)]
1447    pub fn variant(self, variant: CS_A) -> &'a mut W {
1448        {
1449            self.bit(variant.into())
1450        }
1451    }
1452    #[doc = "DMA continuously makes read/write transfers until the BCR decrements to 0."]
1453    #[inline(always)]
1454    pub fn _0(self) -> &'a mut W {
1455        self.variant(CS_A::_0)
1456    }
1457    #[doc = "Forces a single read/write transfer per request."]
1458    #[inline(always)]
1459    pub fn _1(self) -> &'a mut W {
1460        self.variant(CS_A::_1)
1461    }
1462    #[doc = r"Sets the field bit"]
1463    #[inline(always)]
1464    pub fn set_bit(self) -> &'a mut W {
1465        self.bit(true)
1466    }
1467    #[doc = r"Clears the field bit"]
1468    #[inline(always)]
1469    pub fn clear_bit(self) -> &'a mut W {
1470        self.bit(false)
1471    }
1472    #[doc = r"Writes raw bits to the field"]
1473    #[inline(always)]
1474    pub fn bit(self, value: bool) -> &'a mut W {
1475        self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29);
1476        self.w
1477    }
1478}
1479#[doc = "Enable peripheral request\n\nValue on reset: 0"]
1480#[derive(Clone, Copy, Debug, PartialEq)]
1481pub enum ERQ_A {
1482    #[doc = "0: Peripheral request is ignored."]
1483    _0 = 0,
1484    #[doc = "1: Enables peripheral request to initiate transfer. A software-initiated request (setting the START bit) is always enabled."]
1485    _1 = 1,
1486}
1487impl From<ERQ_A> for bool {
1488    #[inline(always)]
1489    fn from(variant: ERQ_A) -> Self {
1490        variant as u8 != 0
1491    }
1492}
1493#[doc = "Reader of field `ERQ`"]
1494pub type ERQ_R = crate::R<bool, ERQ_A>;
1495impl ERQ_R {
1496    #[doc = r"Get enumerated values variant"]
1497    #[inline(always)]
1498    pub fn variant(&self) -> ERQ_A {
1499        match self.bits {
1500            false => ERQ_A::_0,
1501            true => ERQ_A::_1,
1502        }
1503    }
1504    #[doc = "Checks if the value of the field is `_0`"]
1505    #[inline(always)]
1506    pub fn is_0(&self) -> bool {
1507        *self == ERQ_A::_0
1508    }
1509    #[doc = "Checks if the value of the field is `_1`"]
1510    #[inline(always)]
1511    pub fn is_1(&self) -> bool {
1512        *self == ERQ_A::_1
1513    }
1514}
1515#[doc = "Write proxy for field `ERQ`"]
1516pub struct ERQ_W<'a> {
1517    w: &'a mut W,
1518}
1519impl<'a> ERQ_W<'a> {
1520    #[doc = r"Writes `variant` to the field"]
1521    #[inline(always)]
1522    pub fn variant(self, variant: ERQ_A) -> &'a mut W {
1523        {
1524            self.bit(variant.into())
1525        }
1526    }
1527    #[doc = "Peripheral request is ignored."]
1528    #[inline(always)]
1529    pub fn _0(self) -> &'a mut W {
1530        self.variant(ERQ_A::_0)
1531    }
1532    #[doc = "Enables peripheral request to initiate transfer. A software-initiated request (setting the START bit) is always enabled."]
1533    #[inline(always)]
1534    pub fn _1(self) -> &'a mut W {
1535        self.variant(ERQ_A::_1)
1536    }
1537    #[doc = r"Sets the field bit"]
1538    #[inline(always)]
1539    pub fn set_bit(self) -> &'a mut W {
1540        self.bit(true)
1541    }
1542    #[doc = r"Clears the field bit"]
1543    #[inline(always)]
1544    pub fn clear_bit(self) -> &'a mut W {
1545        self.bit(false)
1546    }
1547    #[doc = r"Writes raw bits to the field"]
1548    #[inline(always)]
1549    pub fn bit(self, value: bool) -> &'a mut W {
1550        self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
1551        self.w
1552    }
1553}
1554#[doc = "Enable interrupt on completion of transfer\n\nValue on reset: 0"]
1555#[derive(Clone, Copy, Debug, PartialEq)]
1556pub enum EINT_A {
1557    #[doc = "0: No interrupt is generated."]
1558    _0 = 0,
1559    #[doc = "1: Interrupt signal is enabled."]
1560    _1 = 1,
1561}
1562impl From<EINT_A> for bool {
1563    #[inline(always)]
1564    fn from(variant: EINT_A) -> Self {
1565        variant as u8 != 0
1566    }
1567}
1568#[doc = "Reader of field `EINT`"]
1569pub type EINT_R = crate::R<bool, EINT_A>;
1570impl EINT_R {
1571    #[doc = r"Get enumerated values variant"]
1572    #[inline(always)]
1573    pub fn variant(&self) -> EINT_A {
1574        match self.bits {
1575            false => EINT_A::_0,
1576            true => EINT_A::_1,
1577        }
1578    }
1579    #[doc = "Checks if the value of the field is `_0`"]
1580    #[inline(always)]
1581    pub fn is_0(&self) -> bool {
1582        *self == EINT_A::_0
1583    }
1584    #[doc = "Checks if the value of the field is `_1`"]
1585    #[inline(always)]
1586    pub fn is_1(&self) -> bool {
1587        *self == EINT_A::_1
1588    }
1589}
1590#[doc = "Write proxy for field `EINT`"]
1591pub struct EINT_W<'a> {
1592    w: &'a mut W,
1593}
1594impl<'a> EINT_W<'a> {
1595    #[doc = r"Writes `variant` to the field"]
1596    #[inline(always)]
1597    pub fn variant(self, variant: EINT_A) -> &'a mut W {
1598        {
1599            self.bit(variant.into())
1600        }
1601    }
1602    #[doc = "No interrupt is generated."]
1603    #[inline(always)]
1604    pub fn _0(self) -> &'a mut W {
1605        self.variant(EINT_A::_0)
1606    }
1607    #[doc = "Interrupt signal is enabled."]
1608    #[inline(always)]
1609    pub fn _1(self) -> &'a mut W {
1610        self.variant(EINT_A::_1)
1611    }
1612    #[doc = r"Sets the field bit"]
1613    #[inline(always)]
1614    pub fn set_bit(self) -> &'a mut W {
1615        self.bit(true)
1616    }
1617    #[doc = r"Clears the field bit"]
1618    #[inline(always)]
1619    pub fn clear_bit(self) -> &'a mut W {
1620        self.bit(false)
1621    }
1622    #[doc = r"Writes raw bits to the field"]
1623    #[inline(always)]
1624    pub fn bit(self, value: bool) -> &'a mut W {
1625        self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
1626        self.w
1627    }
1628}
1629impl R {
1630    #[doc = "Bits 0:1 - Link channel 2"]
1631    #[inline(always)]
1632    pub fn lch2(&self) -> LCH2_R {
1633        LCH2_R::new((self.bits & 0x03) as u8)
1634    }
1635    #[doc = "Bits 2:3 - Link channel 1"]
1636    #[inline(always)]
1637    pub fn lch1(&self) -> LCH1_R {
1638        LCH1_R::new(((self.bits >> 2) & 0x03) as u8)
1639    }
1640    #[doc = "Bits 4:5 - Link channel control"]
1641    #[inline(always)]
1642    pub fn linkcc(&self) -> LINKCC_R {
1643        LINKCC_R::new(((self.bits >> 4) & 0x03) as u8)
1644    }
1645    #[doc = "Bit 7 - Disable request"]
1646    #[inline(always)]
1647    pub fn d_req(&self) -> D_REQ_R {
1648        D_REQ_R::new(((self.bits >> 7) & 0x01) != 0)
1649    }
1650    #[doc = "Bits 8:11 - Destination address modulo"]
1651    #[inline(always)]
1652    pub fn dmod(&self) -> DMOD_R {
1653        DMOD_R::new(((self.bits >> 8) & 0x0f) as u8)
1654    }
1655    #[doc = "Bits 12:15 - Source address modulo"]
1656    #[inline(always)]
1657    pub fn smod(&self) -> SMOD_R {
1658        SMOD_R::new(((self.bits >> 12) & 0x0f) as u8)
1659    }
1660    #[doc = "Bits 17:18 - Destination size"]
1661    #[inline(always)]
1662    pub fn dsize(&self) -> DSIZE_R {
1663        DSIZE_R::new(((self.bits >> 17) & 0x03) as u8)
1664    }
1665    #[doc = "Bit 19 - Destination increment"]
1666    #[inline(always)]
1667    pub fn dinc(&self) -> DINC_R {
1668        DINC_R::new(((self.bits >> 19) & 0x01) != 0)
1669    }
1670    #[doc = "Bits 20:21 - Source size"]
1671    #[inline(always)]
1672    pub fn ssize(&self) -> SSIZE_R {
1673        SSIZE_R::new(((self.bits >> 20) & 0x03) as u8)
1674    }
1675    #[doc = "Bit 22 - Source increment"]
1676    #[inline(always)]
1677    pub fn sinc(&self) -> SINC_R {
1678        SINC_R::new(((self.bits >> 22) & 0x01) != 0)
1679    }
1680    #[doc = "Bit 23 - Enable asynchronous DMA requests"]
1681    #[inline(always)]
1682    pub fn eadreq(&self) -> EADREQ_R {
1683        EADREQ_R::new(((self.bits >> 23) & 0x01) != 0)
1684    }
1685    #[doc = "Bit 28 - Auto-align"]
1686    #[inline(always)]
1687    pub fn aa(&self) -> AA_R {
1688        AA_R::new(((self.bits >> 28) & 0x01) != 0)
1689    }
1690    #[doc = "Bit 29 - Cycle steal"]
1691    #[inline(always)]
1692    pub fn cs(&self) -> CS_R {
1693        CS_R::new(((self.bits >> 29) & 0x01) != 0)
1694    }
1695    #[doc = "Bit 30 - Enable peripheral request"]
1696    #[inline(always)]
1697    pub fn erq(&self) -> ERQ_R {
1698        ERQ_R::new(((self.bits >> 30) & 0x01) != 0)
1699    }
1700    #[doc = "Bit 31 - Enable interrupt on completion of transfer"]
1701    #[inline(always)]
1702    pub fn eint(&self) -> EINT_R {
1703        EINT_R::new(((self.bits >> 31) & 0x01) != 0)
1704    }
1705}
1706impl W {
1707    #[doc = "Bits 0:1 - Link channel 2"]
1708    #[inline(always)]
1709    pub fn lch2(&mut self) -> LCH2_W {
1710        LCH2_W { w: self }
1711    }
1712    #[doc = "Bits 2:3 - Link channel 1"]
1713    #[inline(always)]
1714    pub fn lch1(&mut self) -> LCH1_W {
1715        LCH1_W { w: self }
1716    }
1717    #[doc = "Bits 4:5 - Link channel control"]
1718    #[inline(always)]
1719    pub fn linkcc(&mut self) -> LINKCC_W {
1720        LINKCC_W { w: self }
1721    }
1722    #[doc = "Bit 7 - Disable request"]
1723    #[inline(always)]
1724    pub fn d_req(&mut self) -> D_REQ_W {
1725        D_REQ_W { w: self }
1726    }
1727    #[doc = "Bits 8:11 - Destination address modulo"]
1728    #[inline(always)]
1729    pub fn dmod(&mut self) -> DMOD_W {
1730        DMOD_W { w: self }
1731    }
1732    #[doc = "Bits 12:15 - Source address modulo"]
1733    #[inline(always)]
1734    pub fn smod(&mut self) -> SMOD_W {
1735        SMOD_W { w: self }
1736    }
1737    #[doc = "Bit 16 - Start transfer"]
1738    #[inline(always)]
1739    pub fn start(&mut self) -> START_W {
1740        START_W { w: self }
1741    }
1742    #[doc = "Bits 17:18 - Destination size"]
1743    #[inline(always)]
1744    pub fn dsize(&mut self) -> DSIZE_W {
1745        DSIZE_W { w: self }
1746    }
1747    #[doc = "Bit 19 - Destination increment"]
1748    #[inline(always)]
1749    pub fn dinc(&mut self) -> DINC_W {
1750        DINC_W { w: self }
1751    }
1752    #[doc = "Bits 20:21 - Source size"]
1753    #[inline(always)]
1754    pub fn ssize(&mut self) -> SSIZE_W {
1755        SSIZE_W { w: self }
1756    }
1757    #[doc = "Bit 22 - Source increment"]
1758    #[inline(always)]
1759    pub fn sinc(&mut self) -> SINC_W {
1760        SINC_W { w: self }
1761    }
1762    #[doc = "Bit 23 - Enable asynchronous DMA requests"]
1763    #[inline(always)]
1764    pub fn eadreq(&mut self) -> EADREQ_W {
1765        EADREQ_W { w: self }
1766    }
1767    #[doc = "Bit 28 - Auto-align"]
1768    #[inline(always)]
1769    pub fn aa(&mut self) -> AA_W {
1770        AA_W { w: self }
1771    }
1772    #[doc = "Bit 29 - Cycle steal"]
1773    #[inline(always)]
1774    pub fn cs(&mut self) -> CS_W {
1775        CS_W { w: self }
1776    }
1777    #[doc = "Bit 30 - Enable peripheral request"]
1778    #[inline(always)]
1779    pub fn erq(&mut self) -> ERQ_W {
1780        ERQ_W { w: self }
1781    }
1782    #[doc = "Bit 31 - Enable interrupt on completion of transfer"]
1783    #[inline(always)]
1784    pub fn eint(&mut self) -> EINT_W {
1785        EINT_W { w: self }
1786    }
1787}
mkl25z4/dma/dcr0.rs

mkl25z4/dma/
dcr0.rs
