#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::SCGC6 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `FTF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FTFR {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl FTFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FTFR::_0 => false,
FTFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FTFR {
match value {
false => FTFR::_0,
true => FTFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == FTFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == FTFR::_1
}
}
#[doc = "Possible values of the field `DMAMUX`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DMAMUXR {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl DMAMUXR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
DMAMUXR::_0 => false,
DMAMUXR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> DMAMUXR {
match value {
false => DMAMUXR::_0,
true => DMAMUXR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == DMAMUXR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == DMAMUXR::_1
}
}
#[doc = "Possible values of the field `PIT`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PITR {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl PITR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
PITR::_0 => false,
PITR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> PITR {
match value {
false => PITR::_0,
true => PITR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == PITR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == PITR::_1
}
}
#[doc = "Possible values of the field `TPM0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TPM0R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl TPM0R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TPM0R::_0 => false,
TPM0R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TPM0R {
match value {
false => TPM0R::_0,
true => TPM0R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TPM0R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TPM0R::_1
}
}
#[doc = "Possible values of the field `TPM1`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TPM1R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl TPM1R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TPM1R::_0 => false,
TPM1R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TPM1R {
match value {
false => TPM1R::_0,
true => TPM1R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TPM1R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TPM1R::_1
}
}
#[doc = "Possible values of the field `TPM2`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TPM2R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl TPM2R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TPM2R::_0 => false,
TPM2R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TPM2R {
match value {
false => TPM2R::_0,
true => TPM2R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TPM2R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TPM2R::_1
}
}
#[doc = "Possible values of the field `ADC0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADC0R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl ADC0R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
ADC0R::_0 => false,
ADC0R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> ADC0R {
match value {
false => ADC0R::_0,
true => ADC0R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == ADC0R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == ADC0R::_1
}
}
#[doc = "Possible values of the field `RTC`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RTCR {
#[doc = "Access and interrupts disabled"]
_0,
#[doc = "Access and interrupts enabled"]
_1,
}
impl RTCR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RTCR::_0 => false,
RTCR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RTCR {
match value {
false => RTCR::_0,
true => RTCR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RTCR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RTCR::_1
}
}
#[doc = "Possible values of the field `DAC0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DAC0R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl DAC0R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
DAC0R::_0 => false,
DAC0R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> DAC0R {
match value {
false => DAC0R::_0,
true => DAC0R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == DAC0R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == DAC0R::_1
}
}
#[doc = "Values that can be written to the field `FTF`"]
pub enum FTFW {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl FTFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FTFW::_0 => false,
FTFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FTFW<'a> {
w: &'a mut W,
}
impl<'a> _FTFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FTFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(FTFW::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(FTFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `DMAMUX`"]
pub enum DMAMUXW {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl DMAMUXW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
DMAMUXW::_0 => false,
DMAMUXW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _DMAMUXW<'a> {
w: &'a mut W,
}
impl<'a> _DMAMUXW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: DMAMUXW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(DMAMUXW::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(DMAMUXW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 1;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `PIT`"]
pub enum PITW {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl PITW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
PITW::_0 => false,
PITW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _PITW<'a> {
w: &'a mut W,
}
impl<'a> _PITW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: PITW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(PITW::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(PITW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 23;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `TPM0`"]
pub enum TPM0W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl TPM0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
TPM0W::_0 => false,
TPM0W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _TPM0W<'a> {
w: &'a mut W,
}
impl<'a> _TPM0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: TPM0W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(TPM0W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(TPM0W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `TPM1`"]
pub enum TPM1W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl TPM1W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
TPM1W::_0 => false,
TPM1W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _TPM1W<'a> {
w: &'a mut W,
}
impl<'a> _TPM1W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: TPM1W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(TPM1W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(TPM1W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 25;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `TPM2`"]
pub enum TPM2W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl TPM2W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
TPM2W::_0 => false,
TPM2W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _TPM2W<'a> {
w: &'a mut W,
}
impl<'a> _TPM2W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: TPM2W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(TPM2W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(TPM2W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 26;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `ADC0`"]
pub enum ADC0W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl ADC0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
ADC0W::_0 => false,
ADC0W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _ADC0W<'a> {
w: &'a mut W,
}
impl<'a> _ADC0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: ADC0W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(ADC0W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(ADC0W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 27;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RTC`"]
pub enum RTCW {
#[doc = "Access and interrupts disabled"]
_0,
#[doc = "Access and interrupts enabled"]
_1,
}
impl RTCW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RTCW::_0 => false,
RTCW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _RTCW<'a> {
w: &'a mut W,
}
impl<'a> _RTCW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RTCW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Access and interrupts disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(RTCW::_0)
}
#[doc = "Access and interrupts enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(RTCW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 29;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `DAC0`"]
pub enum DAC0W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl DAC0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
DAC0W::_0 => false,
DAC0W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _DAC0W<'a> {
w: &'a mut W,
}
impl<'a> _DAC0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: DAC0W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(DAC0W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(DAC0W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 31;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - Flash Memory Clock Gate Control"]
#[inline]
pub fn ftf(&self) -> FTFR {
FTFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 1 - DMA Mux Clock Gate Control"]
#[inline]
pub fn dmamux(&self) -> DMAMUXR {
DMAMUXR::_from({
const MASK: bool = true;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 23 - PIT Clock Gate Control"]
#[inline]
pub fn pit(&self) -> PITR {
PITR::_from({
const MASK: bool = true;
const OFFSET: u8 = 23;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 24 - TPM0 Clock Gate Control"]
#[inline]
pub fn tpm0(&self) -> TPM0R {
TPM0R::_from({
const MASK: bool = true;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 25 - TPM1 Clock Gate Control"]
#[inline]
pub fn tpm1(&self) -> TPM1R {
TPM1R::_from({
const MASK: bool = true;
const OFFSET: u8 = 25;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 26 - TPM2 Clock Gate Control"]
#[inline]
pub fn tpm2(&self) -> TPM2R {
TPM2R::_from({
const MASK: bool = true;
const OFFSET: u8 = 26;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 27 - ADC0 Clock Gate Control"]
#[inline]
pub fn adc0(&self) -> ADC0R {
ADC0R::_from({
const MASK: bool = true;
const OFFSET: u8 = 27;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 29 - RTC Access Control"]
#[inline]
pub fn rtc(&self) -> RTCR {
RTCR::_from({
const MASK: bool = true;
const OFFSET: u8 = 29;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 31 - DAC0 Clock Gate Control"]
#[inline]
pub fn dac0(&self) -> DAC0R {
DAC0R::_from({
const MASK: bool = true;
const OFFSET: u8 = 31;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 1 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - Flash Memory Clock Gate Control"]
#[inline]
pub fn ftf(&mut self) -> _FTFW {
_FTFW { w: self }
}
#[doc = "Bit 1 - DMA Mux Clock Gate Control"]
#[inline]
pub fn dmamux(&mut self) -> _DMAMUXW {
_DMAMUXW { w: self }
}
#[doc = "Bit 23 - PIT Clock Gate Control"]
#[inline]
pub fn pit(&mut self) -> _PITW {
_PITW { w: self }
}
#[doc = "Bit 24 - TPM0 Clock Gate Control"]
#[inline]
pub fn tpm0(&mut self) -> _TPM0W {
_TPM0W { w: self }
}
#[doc = "Bit 25 - TPM1 Clock Gate Control"]
#[inline]
pub fn tpm1(&mut self) -> _TPM1W {
_TPM1W { w: self }
}
#[doc = "Bit 26 - TPM2 Clock Gate Control"]
#[inline]
pub fn tpm2(&mut self) -> _TPM2W {
_TPM2W { w: self }
}
#[doc = "Bit 27 - ADC0 Clock Gate Control"]
#[inline]
pub fn adc0(&mut self) -> _ADC0W {
_ADC0W { w: self }
}
#[doc = "Bit 29 - RTC Access Control"]
#[inline]
pub fn rtc(&mut self) -> _RTCW {
_RTCW { w: self }
}
#[doc = "Bit 31 - DAC0 Clock Gate Control"]
#[inline]
pub fn dac0(&mut self) -> _DAC0W {
_DAC0W { w: self }
}
}