1#[doc = "Reader of register C1"]
2pub type R = crate::R<u8, super::C1>;
3#[doc = "Writer for register C1"]
4pub type W = crate::W<u8, super::C1>;
5#[doc = "Register C1 `reset()`'s with value 0"]
6impl crate::ResetValue for super::C1 {
7 type Type = u8;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Parity Type\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum PT_A {
16 #[doc = "0: Even parity."]
17 _0,
18 #[doc = "1: Odd parity."]
19 _1,
20}
21impl From<PT_A> for bool {
22 #[inline(always)]
23 fn from(variant: PT_A) -> Self {
24 match variant {
25 PT_A::_0 => false,
26 PT_A::_1 => true,
27 }
28 }
29}
30#[doc = "Reader of field `PT`"]
31pub type PT_R = crate::R<bool, PT_A>;
32impl PT_R {
33 #[doc = r"Get enumerated values variant"]
34 #[inline(always)]
35 pub fn variant(&self) -> PT_A {
36 match self.bits {
37 false => PT_A::_0,
38 true => PT_A::_1,
39 }
40 }
41 #[doc = "Checks if the value of the field is `_0`"]
42 #[inline(always)]
43 pub fn is_0(&self) -> bool {
44 *self == PT_A::_0
45 }
46 #[doc = "Checks if the value of the field is `_1`"]
47 #[inline(always)]
48 pub fn is_1(&self) -> bool {
49 *self == PT_A::_1
50 }
51}
52#[doc = "Write proxy for field `PT`"]
53pub struct PT_W<'a> {
54 w: &'a mut W,
55}
56impl<'a> PT_W<'a> {
57 #[doc = r"Writes `variant` to the field"]
58 #[inline(always)]
59 pub fn variant(self, variant: PT_A) -> &'a mut W {
60 {
61 self.bit(variant.into())
62 }
63 }
64 #[doc = "Even parity."]
65 #[inline(always)]
66 pub fn _0(self) -> &'a mut W {
67 self.variant(PT_A::_0)
68 }
69 #[doc = "Odd parity."]
70 #[inline(always)]
71 pub fn _1(self) -> &'a mut W {
72 self.variant(PT_A::_1)
73 }
74 #[doc = r"Sets the field bit"]
75 #[inline(always)]
76 pub fn set_bit(self) -> &'a mut W {
77 self.bit(true)
78 }
79 #[doc = r"Clears the field bit"]
80 #[inline(always)]
81 pub fn clear_bit(self) -> &'a mut W {
82 self.bit(false)
83 }
84 #[doc = r"Writes raw bits to the field"]
85 #[inline(always)]
86 pub fn bit(self, value: bool) -> &'a mut W {
87 self.w.bits = (self.w.bits & !0x01) | ((value as u8) & 0x01);
88 self.w
89 }
90}
91#[doc = "Parity Enable\n\nValue on reset: 0"]
92#[derive(Clone, Copy, Debug, PartialEq)]
93pub enum PE_A {
94 #[doc = "0: Parity function disabled."]
95 _0,
96 #[doc = "1: Parity function enabled."]
97 _1,
98}
99impl From<PE_A> for bool {
100 #[inline(always)]
101 fn from(variant: PE_A) -> Self {
102 match variant {
103 PE_A::_0 => false,
104 PE_A::_1 => true,
105 }
106 }
107}
108#[doc = "Reader of field `PE`"]
109pub type PE_R = crate::R<bool, PE_A>;
110impl PE_R {
111 #[doc = r"Get enumerated values variant"]
112 #[inline(always)]
113 pub fn variant(&self) -> PE_A {
114 match self.bits {
115 false => PE_A::_0,
116 true => PE_A::_1,
117 }
118 }
119 #[doc = "Checks if the value of the field is `_0`"]
120 #[inline(always)]
121 pub fn is_0(&self) -> bool {
122 *self == PE_A::_0
123 }
124 #[doc = "Checks if the value of the field is `_1`"]
125 #[inline(always)]
126 pub fn is_1(&self) -> bool {
127 *self == PE_A::_1
128 }
129}
130#[doc = "Write proxy for field `PE`"]
131pub struct PE_W<'a> {
132 w: &'a mut W,
133}
134impl<'a> PE_W<'a> {
135 #[doc = r"Writes `variant` to the field"]
136 #[inline(always)]
137 pub fn variant(self, variant: PE_A) -> &'a mut W {
138 {
139 self.bit(variant.into())
140 }
141 }
142 #[doc = "Parity function disabled."]
143 #[inline(always)]
144 pub fn _0(self) -> &'a mut W {
145 self.variant(PE_A::_0)
146 }
147 #[doc = "Parity function enabled."]
148 #[inline(always)]
149 pub fn _1(self) -> &'a mut W {
150 self.variant(PE_A::_1)
151 }
152 #[doc = r"Sets the field bit"]
153 #[inline(always)]
154 pub fn set_bit(self) -> &'a mut W {
155 self.bit(true)
156 }
157 #[doc = r"Clears the field bit"]
158 #[inline(always)]
159 pub fn clear_bit(self) -> &'a mut W {
160 self.bit(false)
161 }
162 #[doc = r"Writes raw bits to the field"]
163 #[inline(always)]
164 pub fn bit(self, value: bool) -> &'a mut W {
165 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u8) & 0x01) << 1);
166 self.w
167 }
168}
169#[doc = "Idle Line Type Select\n\nValue on reset: 0"]
170#[derive(Clone, Copy, Debug, PartialEq)]
171pub enum ILT_A {
172 #[doc = "0: Idle character bit count starts after start bit."]
173 _0,
174 #[doc = "1: Idle character bit count starts after stop bit."]
175 _1,
176}
177impl From<ILT_A> for bool {
178 #[inline(always)]
179 fn from(variant: ILT_A) -> Self {
180 match variant {
181 ILT_A::_0 => false,
182 ILT_A::_1 => true,
183 }
184 }
185}
186#[doc = "Reader of field `ILT`"]
187pub type ILT_R = crate::R<bool, ILT_A>;
188impl ILT_R {
189 #[doc = r"Get enumerated values variant"]
190 #[inline(always)]
191 pub fn variant(&self) -> ILT_A {
192 match self.bits {
193 false => ILT_A::_0,
194 true => ILT_A::_1,
195 }
196 }
197 #[doc = "Checks if the value of the field is `_0`"]
198 #[inline(always)]
199 pub fn is_0(&self) -> bool {
200 *self == ILT_A::_0
201 }
202 #[doc = "Checks if the value of the field is `_1`"]
203 #[inline(always)]
204 pub fn is_1(&self) -> bool {
205 *self == ILT_A::_1
206 }
207}
208#[doc = "Write proxy for field `ILT`"]
209pub struct ILT_W<'a> {
210 w: &'a mut W,
211}
212impl<'a> ILT_W<'a> {
213 #[doc = r"Writes `variant` to the field"]
214 #[inline(always)]
215 pub fn variant(self, variant: ILT_A) -> &'a mut W {
216 {
217 self.bit(variant.into())
218 }
219 }
220 #[doc = "Idle character bit count starts after start bit."]
221 #[inline(always)]
222 pub fn _0(self) -> &'a mut W {
223 self.variant(ILT_A::_0)
224 }
225 #[doc = "Idle character bit count starts after stop bit."]
226 #[inline(always)]
227 pub fn _1(self) -> &'a mut W {
228 self.variant(ILT_A::_1)
229 }
230 #[doc = r"Sets the field bit"]
231 #[inline(always)]
232 pub fn set_bit(self) -> &'a mut W {
233 self.bit(true)
234 }
235 #[doc = r"Clears the field bit"]
236 #[inline(always)]
237 pub fn clear_bit(self) -> &'a mut W {
238 self.bit(false)
239 }
240 #[doc = r"Writes raw bits to the field"]
241 #[inline(always)]
242 pub fn bit(self, value: bool) -> &'a mut W {
243 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u8) & 0x01) << 2);
244 self.w
245 }
246}
247#[doc = "Receiver Wakeup Method Select\n\nValue on reset: 0"]
248#[derive(Clone, Copy, Debug, PartialEq)]
249pub enum WAKE_A {
250 #[doc = "0: Idle line wakeup."]
251 _0,
252 #[doc = "1: Address mark wakeup."]
253 _1,
254}
255impl From<WAKE_A> for bool {
256 #[inline(always)]
257 fn from(variant: WAKE_A) -> Self {
258 match variant {
259 WAKE_A::_0 => false,
260 WAKE_A::_1 => true,
261 }
262 }
263}
264#[doc = "Reader of field `WAKE`"]
265pub type WAKE_R = crate::R<bool, WAKE_A>;
266impl WAKE_R {
267 #[doc = r"Get enumerated values variant"]
268 #[inline(always)]
269 pub fn variant(&self) -> WAKE_A {
270 match self.bits {
271 false => WAKE_A::_0,
272 true => WAKE_A::_1,
273 }
274 }
275 #[doc = "Checks if the value of the field is `_0`"]
276 #[inline(always)]
277 pub fn is_0(&self) -> bool {
278 *self == WAKE_A::_0
279 }
280 #[doc = "Checks if the value of the field is `_1`"]
281 #[inline(always)]
282 pub fn is_1(&self) -> bool {
283 *self == WAKE_A::_1
284 }
285}
286#[doc = "Write proxy for field `WAKE`"]
287pub struct WAKE_W<'a> {
288 w: &'a mut W,
289}
290impl<'a> WAKE_W<'a> {
291 #[doc = r"Writes `variant` to the field"]
292 #[inline(always)]
293 pub fn variant(self, variant: WAKE_A) -> &'a mut W {
294 {
295 self.bit(variant.into())
296 }
297 }
298 #[doc = "Idle line wakeup."]
299 #[inline(always)]
300 pub fn _0(self) -> &'a mut W {
301 self.variant(WAKE_A::_0)
302 }
303 #[doc = "Address mark wakeup."]
304 #[inline(always)]
305 pub fn _1(self) -> &'a mut W {
306 self.variant(WAKE_A::_1)
307 }
308 #[doc = r"Sets the field bit"]
309 #[inline(always)]
310 pub fn set_bit(self) -> &'a mut W {
311 self.bit(true)
312 }
313 #[doc = r"Clears the field bit"]
314 #[inline(always)]
315 pub fn clear_bit(self) -> &'a mut W {
316 self.bit(false)
317 }
318 #[doc = r"Writes raw bits to the field"]
319 #[inline(always)]
320 pub fn bit(self, value: bool) -> &'a mut W {
321 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u8) & 0x01) << 3);
322 self.w
323 }
324}
325#[doc = "9-bit or 8-bit Mode Select\n\nValue on reset: 0"]
326#[derive(Clone, Copy, Debug, PartialEq)]
327pub enum M_A {
328 #[doc = "0: Normal-start + 8 data bits (MSB/LSB first as determined by MSBF) + stop."]
329 _0,
330 #[doc = "1: Use-start + 9 data bits (MSB/LSB first as determined by MSBF) + stop."]
331 _1,
332}
333impl From<M_A> for bool {
334 #[inline(always)]
335 fn from(variant: M_A) -> Self {
336 match variant {
337 M_A::_0 => false,
338 M_A::_1 => true,
339 }
340 }
341}
342#[doc = "Reader of field `M`"]
343pub type M_R = crate::R<bool, M_A>;
344impl M_R {
345 #[doc = r"Get enumerated values variant"]
346 #[inline(always)]
347 pub fn variant(&self) -> M_A {
348 match self.bits {
349 false => M_A::_0,
350 true => M_A::_1,
351 }
352 }
353 #[doc = "Checks if the value of the field is `_0`"]
354 #[inline(always)]
355 pub fn is_0(&self) -> bool {
356 *self == M_A::_0
357 }
358 #[doc = "Checks if the value of the field is `_1`"]
359 #[inline(always)]
360 pub fn is_1(&self) -> bool {
361 *self == M_A::_1
362 }
363}
364#[doc = "Write proxy for field `M`"]
365pub struct M_W<'a> {
366 w: &'a mut W,
367}
368impl<'a> M_W<'a> {
369 #[doc = r"Writes `variant` to the field"]
370 #[inline(always)]
371 pub fn variant(self, variant: M_A) -> &'a mut W {
372 {
373 self.bit(variant.into())
374 }
375 }
376 #[doc = "Normal-start + 8 data bits (MSB/LSB first as determined by MSBF) + stop."]
377 #[inline(always)]
378 pub fn _0(self) -> &'a mut W {
379 self.variant(M_A::_0)
380 }
381 #[doc = "Use-start + 9 data bits (MSB/LSB first as determined by MSBF) + stop."]
382 #[inline(always)]
383 pub fn _1(self) -> &'a mut W {
384 self.variant(M_A::_1)
385 }
386 #[doc = r"Sets the field bit"]
387 #[inline(always)]
388 pub fn set_bit(self) -> &'a mut W {
389 self.bit(true)
390 }
391 #[doc = r"Clears the field bit"]
392 #[inline(always)]
393 pub fn clear_bit(self) -> &'a mut W {
394 self.bit(false)
395 }
396 #[doc = r"Writes raw bits to the field"]
397 #[inline(always)]
398 pub fn bit(self, value: bool) -> &'a mut W {
399 self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u8) & 0x01) << 4);
400 self.w
401 }
402}
403#[doc = "Receiver Source Select\n\nValue on reset: 0"]
404#[derive(Clone, Copy, Debug, PartialEq)]
405pub enum RSRC_A {
406 #[doc = "0: Selects internal loop back mode. The receiver input is internally connected to transmitter output."]
407 _0,
408 #[doc = "1: Single wire UART mode where the receiver input is connected to the transmit pin input signal."]
409 _1,
410}
411impl From<RSRC_A> for bool {
412 #[inline(always)]
413 fn from(variant: RSRC_A) -> Self {
414 match variant {
415 RSRC_A::_0 => false,
416 RSRC_A::_1 => true,
417 }
418 }
419}
420#[doc = "Reader of field `RSRC`"]
421pub type RSRC_R = crate::R<bool, RSRC_A>;
422impl RSRC_R {
423 #[doc = r"Get enumerated values variant"]
424 #[inline(always)]
425 pub fn variant(&self) -> RSRC_A {
426 match self.bits {
427 false => RSRC_A::_0,
428 true => RSRC_A::_1,
429 }
430 }
431 #[doc = "Checks if the value of the field is `_0`"]
432 #[inline(always)]
433 pub fn is_0(&self) -> bool {
434 *self == RSRC_A::_0
435 }
436 #[doc = "Checks if the value of the field is `_1`"]
437 #[inline(always)]
438 pub fn is_1(&self) -> bool {
439 *self == RSRC_A::_1
440 }
441}
442#[doc = "Write proxy for field `RSRC`"]
443pub struct RSRC_W<'a> {
444 w: &'a mut W,
445}
446impl<'a> RSRC_W<'a> {
447 #[doc = r"Writes `variant` to the field"]
448 #[inline(always)]
449 pub fn variant(self, variant: RSRC_A) -> &'a mut W {
450 {
451 self.bit(variant.into())
452 }
453 }
454 #[doc = "Selects internal loop back mode. The receiver input is internally connected to transmitter output."]
455 #[inline(always)]
456 pub fn _0(self) -> &'a mut W {
457 self.variant(RSRC_A::_0)
458 }
459 #[doc = "Single wire UART mode where the receiver input is connected to the transmit pin input signal."]
460 #[inline(always)]
461 pub fn _1(self) -> &'a mut W {
462 self.variant(RSRC_A::_1)
463 }
464 #[doc = r"Sets the field bit"]
465 #[inline(always)]
466 pub fn set_bit(self) -> &'a mut W {
467 self.bit(true)
468 }
469 #[doc = r"Clears the field bit"]
470 #[inline(always)]
471 pub fn clear_bit(self) -> &'a mut W {
472 self.bit(false)
473 }
474 #[doc = r"Writes raw bits to the field"]
475 #[inline(always)]
476 pub fn bit(self, value: bool) -> &'a mut W {
477 self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u8) & 0x01) << 5);
478 self.w
479 }
480}
481#[doc = "UART Stops in Wait Mode\n\nValue on reset: 0"]
482#[derive(Clone, Copy, Debug, PartialEq)]
483pub enum UARTSWAI_A {
484 #[doc = "0: UART clock continues to run in Wait mode."]
485 _0,
486 #[doc = "1: UART clock freezes while CPU is in Wait mode."]
487 _1,
488}
489impl From<UARTSWAI_A> for bool {
490 #[inline(always)]
491 fn from(variant: UARTSWAI_A) -> Self {
492 match variant {
493 UARTSWAI_A::_0 => false,
494 UARTSWAI_A::_1 => true,
495 }
496 }
497}
498#[doc = "Reader of field `UARTSWAI`"]
499pub type UARTSWAI_R = crate::R<bool, UARTSWAI_A>;
500impl UARTSWAI_R {
501 #[doc = r"Get enumerated values variant"]
502 #[inline(always)]
503 pub fn variant(&self) -> UARTSWAI_A {
504 match self.bits {
505 false => UARTSWAI_A::_0,
506 true => UARTSWAI_A::_1,
507 }
508 }
509 #[doc = "Checks if the value of the field is `_0`"]
510 #[inline(always)]
511 pub fn is_0(&self) -> bool {
512 *self == UARTSWAI_A::_0
513 }
514 #[doc = "Checks if the value of the field is `_1`"]
515 #[inline(always)]
516 pub fn is_1(&self) -> bool {
517 *self == UARTSWAI_A::_1
518 }
519}
520#[doc = "Write proxy for field `UARTSWAI`"]
521pub struct UARTSWAI_W<'a> {
522 w: &'a mut W,
523}
524impl<'a> UARTSWAI_W<'a> {
525 #[doc = r"Writes `variant` to the field"]
526 #[inline(always)]
527 pub fn variant(self, variant: UARTSWAI_A) -> &'a mut W {
528 {
529 self.bit(variant.into())
530 }
531 }
532 #[doc = "UART clock continues to run in Wait mode."]
533 #[inline(always)]
534 pub fn _0(self) -> &'a mut W {
535 self.variant(UARTSWAI_A::_0)
536 }
537 #[doc = "UART clock freezes while CPU is in Wait mode."]
538 #[inline(always)]
539 pub fn _1(self) -> &'a mut W {
540 self.variant(UARTSWAI_A::_1)
541 }
542 #[doc = r"Sets the field bit"]
543 #[inline(always)]
544 pub fn set_bit(self) -> &'a mut W {
545 self.bit(true)
546 }
547 #[doc = r"Clears the field bit"]
548 #[inline(always)]
549 pub fn clear_bit(self) -> &'a mut W {
550 self.bit(false)
551 }
552 #[doc = r"Writes raw bits to the field"]
553 #[inline(always)]
554 pub fn bit(self, value: bool) -> &'a mut W {
555 self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u8) & 0x01) << 6);
556 self.w
557 }
558}
559#[doc = "Loop Mode Select\n\nValue on reset: 0"]
560#[derive(Clone, Copy, Debug, PartialEq)]
561pub enum LOOPS_A {
562 #[doc = "0: Normal operation."]
563 _0,
564 #[doc = "1: Loop mode where transmitter output is internally connected to receiver input. The receiver input is determined by RSRC."]
565 _1,
566}
567impl From<LOOPS_A> for bool {
568 #[inline(always)]
569 fn from(variant: LOOPS_A) -> Self {
570 match variant {
571 LOOPS_A::_0 => false,
572 LOOPS_A::_1 => true,
573 }
574 }
575}
576#[doc = "Reader of field `LOOPS`"]
577pub type LOOPS_R = crate::R<bool, LOOPS_A>;
578impl LOOPS_R {
579 #[doc = r"Get enumerated values variant"]
580 #[inline(always)]
581 pub fn variant(&self) -> LOOPS_A {
582 match self.bits {
583 false => LOOPS_A::_0,
584 true => LOOPS_A::_1,
585 }
586 }
587 #[doc = "Checks if the value of the field is `_0`"]
588 #[inline(always)]
589 pub fn is_0(&self) -> bool {
590 *self == LOOPS_A::_0
591 }
592 #[doc = "Checks if the value of the field is `_1`"]
593 #[inline(always)]
594 pub fn is_1(&self) -> bool {
595 *self == LOOPS_A::_1
596 }
597}
598#[doc = "Write proxy for field `LOOPS`"]
599pub struct LOOPS_W<'a> {
600 w: &'a mut W,
601}
602impl<'a> LOOPS_W<'a> {
603 #[doc = r"Writes `variant` to the field"]
604 #[inline(always)]
605 pub fn variant(self, variant: LOOPS_A) -> &'a mut W {
606 {
607 self.bit(variant.into())
608 }
609 }
610 #[doc = "Normal operation."]
611 #[inline(always)]
612 pub fn _0(self) -> &'a mut W {
613 self.variant(LOOPS_A::_0)
614 }
615 #[doc = "Loop mode where transmitter output is internally connected to receiver input. The receiver input is determined by RSRC."]
616 #[inline(always)]
617 pub fn _1(self) -> &'a mut W {
618 self.variant(LOOPS_A::_1)
619 }
620 #[doc = r"Sets the field bit"]
621 #[inline(always)]
622 pub fn set_bit(self) -> &'a mut W {
623 self.bit(true)
624 }
625 #[doc = r"Clears the field bit"]
626 #[inline(always)]
627 pub fn clear_bit(self) -> &'a mut W {
628 self.bit(false)
629 }
630 #[doc = r"Writes raw bits to the field"]
631 #[inline(always)]
632 pub fn bit(self, value: bool) -> &'a mut W {
633 self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u8) & 0x01) << 7);
634 self.w
635 }
636}
637impl R {
638 #[doc = "Bit 0 - Parity Type"]
639 #[inline(always)]
640 pub fn pt(&self) -> PT_R {
641 PT_R::new((self.bits & 0x01) != 0)
642 }
643 #[doc = "Bit 1 - Parity Enable"]
644 #[inline(always)]
645 pub fn pe(&self) -> PE_R {
646 PE_R::new(((self.bits >> 1) & 0x01) != 0)
647 }
648 #[doc = "Bit 2 - Idle Line Type Select"]
649 #[inline(always)]
650 pub fn ilt(&self) -> ILT_R {
651 ILT_R::new(((self.bits >> 2) & 0x01) != 0)
652 }
653 #[doc = "Bit 3 - Receiver Wakeup Method Select"]
654 #[inline(always)]
655 pub fn wake(&self) -> WAKE_R {
656 WAKE_R::new(((self.bits >> 3) & 0x01) != 0)
657 }
658 #[doc = "Bit 4 - 9-bit or 8-bit Mode Select"]
659 #[inline(always)]
660 pub fn m(&self) -> M_R {
661 M_R::new(((self.bits >> 4) & 0x01) != 0)
662 }
663 #[doc = "Bit 5 - Receiver Source Select"]
664 #[inline(always)]
665 pub fn rsrc(&self) -> RSRC_R {
666 RSRC_R::new(((self.bits >> 5) & 0x01) != 0)
667 }
668 #[doc = "Bit 6 - UART Stops in Wait Mode"]
669 #[inline(always)]
670 pub fn uartswai(&self) -> UARTSWAI_R {
671 UARTSWAI_R::new(((self.bits >> 6) & 0x01) != 0)
672 }
673 #[doc = "Bit 7 - Loop Mode Select"]
674 #[inline(always)]
675 pub fn loops(&self) -> LOOPS_R {
676 LOOPS_R::new(((self.bits >> 7) & 0x01) != 0)
677 }
678}
679impl W {
680 #[doc = "Bit 0 - Parity Type"]
681 #[inline(always)]
682 pub fn pt(&mut self) -> PT_W {
683 PT_W { w: self }
684 }
685 #[doc = "Bit 1 - Parity Enable"]
686 #[inline(always)]
687 pub fn pe(&mut self) -> PE_W {
688 PE_W { w: self }
689 }
690 #[doc = "Bit 2 - Idle Line Type Select"]
691 #[inline(always)]
692 pub fn ilt(&mut self) -> ILT_W {
693 ILT_W { w: self }
694 }
695 #[doc = "Bit 3 - Receiver Wakeup Method Select"]
696 #[inline(always)]
697 pub fn wake(&mut self) -> WAKE_W {
698 WAKE_W { w: self }
699 }
700 #[doc = "Bit 4 - 9-bit or 8-bit Mode Select"]
701 #[inline(always)]
702 pub fn m(&mut self) -> M_W {
703 M_W { w: self }
704 }
705 #[doc = "Bit 5 - Receiver Source Select"]
706 #[inline(always)]
707 pub fn rsrc(&mut self) -> RSRC_W {
708 RSRC_W { w: self }
709 }
710 #[doc = "Bit 6 - UART Stops in Wait Mode"]
711 #[inline(always)]
712 pub fn uartswai(&mut self) -> UARTSWAI_W {
713 UARTSWAI_W { w: self }
714 }
715 #[doc = "Bit 7 - Loop Mode Select"]
716 #[inline(always)]
717 pub fn loops(&mut self) -> LOOPS_W {
718 LOOPS_W { w: self }
719 }
720}