1#[doc = "Reader of register SYSCTL"]
2pub type R = crate::R<u32, super::SYSCTL>;
3#[doc = "Writer for register SYSCTL"]
4pub type W = crate::W<u32, super::SYSCTL>;
5#[doc = "Register SYSCTL `reset()`'s with value 0x8008"]
6impl crate::ResetValue for super::SYSCTL {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0x8008
11 }
12}
13#[doc = "IPG Clock Enable\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum IPGEN_A {
16 #[doc = "0: Bus clock will be internally gated off."]
17 _0,
18 #[doc = "1: Bus clock will not be automatically gated off."]
19 _1,
20}
21impl From<IPGEN_A> for bool {
22 #[inline(always)]
23 fn from(variant: IPGEN_A) -> Self {
24 match variant {
25 IPGEN_A::_0 => false,
26 IPGEN_A::_1 => true,
27 }
28 }
29}
30#[doc = "Reader of field `IPGEN`"]
31pub type IPGEN_R = crate::R<bool, IPGEN_A>;
32impl IPGEN_R {
33 #[doc = r"Get enumerated values variant"]
34 #[inline(always)]
35 pub fn variant(&self) -> IPGEN_A {
36 match self.bits {
37 false => IPGEN_A::_0,
38 true => IPGEN_A::_1,
39 }
40 }
41 #[doc = "Checks if the value of the field is `_0`"]
42 #[inline(always)]
43 pub fn is_0(&self) -> bool {
44 *self == IPGEN_A::_0
45 }
46 #[doc = "Checks if the value of the field is `_1`"]
47 #[inline(always)]
48 pub fn is_1(&self) -> bool {
49 *self == IPGEN_A::_1
50 }
51}
52#[doc = "Write proxy for field `IPGEN`"]
53pub struct IPGEN_W<'a> {
54 w: &'a mut W,
55}
56impl<'a> IPGEN_W<'a> {
57 #[doc = r"Writes `variant` to the field"]
58 #[inline(always)]
59 pub fn variant(self, variant: IPGEN_A) -> &'a mut W {
60 {
61 self.bit(variant.into())
62 }
63 }
64 #[doc = "Bus clock will be internally gated off."]
65 #[inline(always)]
66 pub fn _0(self) -> &'a mut W {
67 self.variant(IPGEN_A::_0)
68 }
69 #[doc = "Bus clock will not be automatically gated off."]
70 #[inline(always)]
71 pub fn _1(self) -> &'a mut W {
72 self.variant(IPGEN_A::_1)
73 }
74 #[doc = r"Sets the field bit"]
75 #[inline(always)]
76 pub fn set_bit(self) -> &'a mut W {
77 self.bit(true)
78 }
79 #[doc = r"Clears the field bit"]
80 #[inline(always)]
81 pub fn clear_bit(self) -> &'a mut W {
82 self.bit(false)
83 }
84 #[doc = r"Writes raw bits to the field"]
85 #[inline(always)]
86 pub fn bit(self, value: bool) -> &'a mut W {
87 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
88 self.w
89 }
90}
91#[doc = "System Clock Enable\n\nValue on reset: 0"]
92#[derive(Clone, Copy, Debug, PartialEq)]
93pub enum HCKEN_A {
94 #[doc = "0: System clock will be internally gated off."]
95 _0,
96 #[doc = "1: System clock will not be automatically gated off."]
97 _1,
98}
99impl From<HCKEN_A> for bool {
100 #[inline(always)]
101 fn from(variant: HCKEN_A) -> Self {
102 match variant {
103 HCKEN_A::_0 => false,
104 HCKEN_A::_1 => true,
105 }
106 }
107}
108#[doc = "Reader of field `HCKEN`"]
109pub type HCKEN_R = crate::R<bool, HCKEN_A>;
110impl HCKEN_R {
111 #[doc = r"Get enumerated values variant"]
112 #[inline(always)]
113 pub fn variant(&self) -> HCKEN_A {
114 match self.bits {
115 false => HCKEN_A::_0,
116 true => HCKEN_A::_1,
117 }
118 }
119 #[doc = "Checks if the value of the field is `_0`"]
120 #[inline(always)]
121 pub fn is_0(&self) -> bool {
122 *self == HCKEN_A::_0
123 }
124 #[doc = "Checks if the value of the field is `_1`"]
125 #[inline(always)]
126 pub fn is_1(&self) -> bool {
127 *self == HCKEN_A::_1
128 }
129}
130#[doc = "Write proxy for field `HCKEN`"]
131pub struct HCKEN_W<'a> {
132 w: &'a mut W,
133}
134impl<'a> HCKEN_W<'a> {
135 #[doc = r"Writes `variant` to the field"]
136 #[inline(always)]
137 pub fn variant(self, variant: HCKEN_A) -> &'a mut W {
138 {
139 self.bit(variant.into())
140 }
141 }
142 #[doc = "System clock will be internally gated off."]
143 #[inline(always)]
144 pub fn _0(self) -> &'a mut W {
145 self.variant(HCKEN_A::_0)
146 }
147 #[doc = "System clock will not be automatically gated off."]
148 #[inline(always)]
149 pub fn _1(self) -> &'a mut W {
150 self.variant(HCKEN_A::_1)
151 }
152 #[doc = r"Sets the field bit"]
153 #[inline(always)]
154 pub fn set_bit(self) -> &'a mut W {
155 self.bit(true)
156 }
157 #[doc = r"Clears the field bit"]
158 #[inline(always)]
159 pub fn clear_bit(self) -> &'a mut W {
160 self.bit(false)
161 }
162 #[doc = r"Writes raw bits to the field"]
163 #[inline(always)]
164 pub fn bit(self, value: bool) -> &'a mut W {
165 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
166 self.w
167 }
168}
169#[doc = "Peripheral Clock Enable\n\nValue on reset: 0"]
170#[derive(Clone, Copy, Debug, PartialEq)]
171pub enum PEREN_A {
172 #[doc = "0: SDHC clock will be internally gated off."]
173 _0,
174 #[doc = "1: SDHC clock will not be automatically gated off."]
175 _1,
176}
177impl From<PEREN_A> for bool {
178 #[inline(always)]
179 fn from(variant: PEREN_A) -> Self {
180 match variant {
181 PEREN_A::_0 => false,
182 PEREN_A::_1 => true,
183 }
184 }
185}
186#[doc = "Reader of field `PEREN`"]
187pub type PEREN_R = crate::R<bool, PEREN_A>;
188impl PEREN_R {
189 #[doc = r"Get enumerated values variant"]
190 #[inline(always)]
191 pub fn variant(&self) -> PEREN_A {
192 match self.bits {
193 false => PEREN_A::_0,
194 true => PEREN_A::_1,
195 }
196 }
197 #[doc = "Checks if the value of the field is `_0`"]
198 #[inline(always)]
199 pub fn is_0(&self) -> bool {
200 *self == PEREN_A::_0
201 }
202 #[doc = "Checks if the value of the field is `_1`"]
203 #[inline(always)]
204 pub fn is_1(&self) -> bool {
205 *self == PEREN_A::_1
206 }
207}
208#[doc = "Write proxy for field `PEREN`"]
209pub struct PEREN_W<'a> {
210 w: &'a mut W,
211}
212impl<'a> PEREN_W<'a> {
213 #[doc = r"Writes `variant` to the field"]
214 #[inline(always)]
215 pub fn variant(self, variant: PEREN_A) -> &'a mut W {
216 {
217 self.bit(variant.into())
218 }
219 }
220 #[doc = "SDHC clock will be internally gated off."]
221 #[inline(always)]
222 pub fn _0(self) -> &'a mut W {
223 self.variant(PEREN_A::_0)
224 }
225 #[doc = "SDHC clock will not be automatically gated off."]
226 #[inline(always)]
227 pub fn _1(self) -> &'a mut W {
228 self.variant(PEREN_A::_1)
229 }
230 #[doc = r"Sets the field bit"]
231 #[inline(always)]
232 pub fn set_bit(self) -> &'a mut W {
233 self.bit(true)
234 }
235 #[doc = r"Clears the field bit"]
236 #[inline(always)]
237 pub fn clear_bit(self) -> &'a mut W {
238 self.bit(false)
239 }
240 #[doc = r"Writes raw bits to the field"]
241 #[inline(always)]
242 pub fn bit(self, value: bool) -> &'a mut W {
243 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
244 self.w
245 }
246}
247#[doc = "Reader of field `SDCLKEN`"]
248pub type SDCLKEN_R = crate::R<bool, bool>;
249#[doc = "Write proxy for field `SDCLKEN`"]
250pub struct SDCLKEN_W<'a> {
251 w: &'a mut W,
252}
253impl<'a> SDCLKEN_W<'a> {
254 #[doc = r"Sets the field bit"]
255 #[inline(always)]
256 pub fn set_bit(self) -> &'a mut W {
257 self.bit(true)
258 }
259 #[doc = r"Clears the field bit"]
260 #[inline(always)]
261 pub fn clear_bit(self) -> &'a mut W {
262 self.bit(false)
263 }
264 #[doc = r"Writes raw bits to the field"]
265 #[inline(always)]
266 pub fn bit(self, value: bool) -> &'a mut W {
267 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
268 self.w
269 }
270}
271#[doc = "Divisor\n\nValue on reset: 0"]
272#[derive(Clone, Copy, Debug, PartialEq)]
273pub enum DVS_A {
274 #[doc = "0: Divisor by 1."]
275 _0,
276 #[doc = "1: Divisor by 2."]
277 _1,
278 #[doc = "14: Divisor by 15."]
279 _1110,
280 #[doc = "15: Divisor by 16."]
281 _1111,
282}
283impl From<DVS_A> for u8 {
284 #[inline(always)]
285 fn from(variant: DVS_A) -> Self {
286 match variant {
287 DVS_A::_0 => 0,
288 DVS_A::_1 => 1,
289 DVS_A::_1110 => 14,
290 DVS_A::_1111 => 15,
291 }
292 }
293}
294#[doc = "Reader of field `DVS`"]
295pub type DVS_R = crate::R<u8, DVS_A>;
296impl DVS_R {
297 #[doc = r"Get enumerated values variant"]
298 #[inline(always)]
299 pub fn variant(&self) -> crate::Variant<u8, DVS_A> {
300 use crate::Variant::*;
301 match self.bits {
302 0 => Val(DVS_A::_0),
303 1 => Val(DVS_A::_1),
304 14 => Val(DVS_A::_1110),
305 15 => Val(DVS_A::_1111),
306 i => Res(i),
307 }
308 }
309 #[doc = "Checks if the value of the field is `_0`"]
310 #[inline(always)]
311 pub fn is_0(&self) -> bool {
312 *self == DVS_A::_0
313 }
314 #[doc = "Checks if the value of the field is `_1`"]
315 #[inline(always)]
316 pub fn is_1(&self) -> bool {
317 *self == DVS_A::_1
318 }
319 #[doc = "Checks if the value of the field is `_1110`"]
320 #[inline(always)]
321 pub fn is_1110(&self) -> bool {
322 *self == DVS_A::_1110
323 }
324 #[doc = "Checks if the value of the field is `_1111`"]
325 #[inline(always)]
326 pub fn is_1111(&self) -> bool {
327 *self == DVS_A::_1111
328 }
329}
330#[doc = "Write proxy for field `DVS`"]
331pub struct DVS_W<'a> {
332 w: &'a mut W,
333}
334impl<'a> DVS_W<'a> {
335 #[doc = r"Writes `variant` to the field"]
336 #[inline(always)]
337 pub fn variant(self, variant: DVS_A) -> &'a mut W {
338 unsafe { self.bits(variant.into()) }
339 }
340 #[doc = "Divisor by 1."]
341 #[inline(always)]
342 pub fn _0(self) -> &'a mut W {
343 self.variant(DVS_A::_0)
344 }
345 #[doc = "Divisor by 2."]
346 #[inline(always)]
347 pub fn _1(self) -> &'a mut W {
348 self.variant(DVS_A::_1)
349 }
350 #[doc = "Divisor by 15."]
351 #[inline(always)]
352 pub fn _1110(self) -> &'a mut W {
353 self.variant(DVS_A::_1110)
354 }
355 #[doc = "Divisor by 16."]
356 #[inline(always)]
357 pub fn _1111(self) -> &'a mut W {
358 self.variant(DVS_A::_1111)
359 }
360 #[doc = r"Writes raw bits to the field"]
361 #[inline(always)]
362 pub unsafe fn bits(self, value: u8) -> &'a mut W {
363 self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4);
364 self.w
365 }
366}
367#[doc = "SDCLK Frequency Select\n\nValue on reset: 128"]
368#[derive(Clone, Copy, Debug, PartialEq)]
369pub enum SDCLKFS_A {
370 #[doc = "1: Base clock divided by 2."]
371 _1,
372 #[doc = "2: Base clock divided by 4."]
373 _10,
374 #[doc = "4: Base clock divided by 8."]
375 _100,
376 #[doc = "8: Base clock divided by 16."]
377 _1000,
378 #[doc = "16: Base clock divided by 32."]
379 _10000,
380 #[doc = "32: Base clock divided by 64."]
381 _100000,
382 #[doc = "64: Base clock divided by 128."]
383 _1000000,
384 #[doc = "128: Base clock divided by 256."]
385 _10000000,
386}
387impl From<SDCLKFS_A> for u8 {
388 #[inline(always)]
389 fn from(variant: SDCLKFS_A) -> Self {
390 match variant {
391 SDCLKFS_A::_1 => 1,
392 SDCLKFS_A::_10 => 2,
393 SDCLKFS_A::_100 => 4,
394 SDCLKFS_A::_1000 => 8,
395 SDCLKFS_A::_10000 => 16,
396 SDCLKFS_A::_100000 => 32,
397 SDCLKFS_A::_1000000 => 64,
398 SDCLKFS_A::_10000000 => 128,
399 }
400 }
401}
402#[doc = "Reader of field `SDCLKFS`"]
403pub type SDCLKFS_R = crate::R<u8, SDCLKFS_A>;
404impl SDCLKFS_R {
405 #[doc = r"Get enumerated values variant"]
406 #[inline(always)]
407 pub fn variant(&self) -> crate::Variant<u8, SDCLKFS_A> {
408 use crate::Variant::*;
409 match self.bits {
410 1 => Val(SDCLKFS_A::_1),
411 2 => Val(SDCLKFS_A::_10),
412 4 => Val(SDCLKFS_A::_100),
413 8 => Val(SDCLKFS_A::_1000),
414 16 => Val(SDCLKFS_A::_10000),
415 32 => Val(SDCLKFS_A::_100000),
416 64 => Val(SDCLKFS_A::_1000000),
417 128 => Val(SDCLKFS_A::_10000000),
418 i => Res(i),
419 }
420 }
421 #[doc = "Checks if the value of the field is `_1`"]
422 #[inline(always)]
423 pub fn is_1(&self) -> bool {
424 *self == SDCLKFS_A::_1
425 }
426 #[doc = "Checks if the value of the field is `_10`"]
427 #[inline(always)]
428 pub fn is_10(&self) -> bool {
429 *self == SDCLKFS_A::_10
430 }
431 #[doc = "Checks if the value of the field is `_100`"]
432 #[inline(always)]
433 pub fn is_100(&self) -> bool {
434 *self == SDCLKFS_A::_100
435 }
436 #[doc = "Checks if the value of the field is `_1000`"]
437 #[inline(always)]
438 pub fn is_1000(&self) -> bool {
439 *self == SDCLKFS_A::_1000
440 }
441 #[doc = "Checks if the value of the field is `_10000`"]
442 #[inline(always)]
443 pub fn is_10000(&self) -> bool {
444 *self == SDCLKFS_A::_10000
445 }
446 #[doc = "Checks if the value of the field is `_100000`"]
447 #[inline(always)]
448 pub fn is_100000(&self) -> bool {
449 *self == SDCLKFS_A::_100000
450 }
451 #[doc = "Checks if the value of the field is `_1000000`"]
452 #[inline(always)]
453 pub fn is_1000000(&self) -> bool {
454 *self == SDCLKFS_A::_1000000
455 }
456 #[doc = "Checks if the value of the field is `_10000000`"]
457 #[inline(always)]
458 pub fn is_10000000(&self) -> bool {
459 *self == SDCLKFS_A::_10000000
460 }
461}
462#[doc = "Write proxy for field `SDCLKFS`"]
463pub struct SDCLKFS_W<'a> {
464 w: &'a mut W,
465}
466impl<'a> SDCLKFS_W<'a> {
467 #[doc = r"Writes `variant` to the field"]
468 #[inline(always)]
469 pub fn variant(self, variant: SDCLKFS_A) -> &'a mut W {
470 unsafe { self.bits(variant.into()) }
471 }
472 #[doc = "Base clock divided by 2."]
473 #[inline(always)]
474 pub fn _1(self) -> &'a mut W {
475 self.variant(SDCLKFS_A::_1)
476 }
477 #[doc = "Base clock divided by 4."]
478 #[inline(always)]
479 pub fn _10(self) -> &'a mut W {
480 self.variant(SDCLKFS_A::_10)
481 }
482 #[doc = "Base clock divided by 8."]
483 #[inline(always)]
484 pub fn _100(self) -> &'a mut W {
485 self.variant(SDCLKFS_A::_100)
486 }
487 #[doc = "Base clock divided by 16."]
488 #[inline(always)]
489 pub fn _1000(self) -> &'a mut W {
490 self.variant(SDCLKFS_A::_1000)
491 }
492 #[doc = "Base clock divided by 32."]
493 #[inline(always)]
494 pub fn _10000(self) -> &'a mut W {
495 self.variant(SDCLKFS_A::_10000)
496 }
497 #[doc = "Base clock divided by 64."]
498 #[inline(always)]
499 pub fn _100000(self) -> &'a mut W {
500 self.variant(SDCLKFS_A::_100000)
501 }
502 #[doc = "Base clock divided by 128."]
503 #[inline(always)]
504 pub fn _1000000(self) -> &'a mut W {
505 self.variant(SDCLKFS_A::_1000000)
506 }
507 #[doc = "Base clock divided by 256."]
508 #[inline(always)]
509 pub fn _10000000(self) -> &'a mut W {
510 self.variant(SDCLKFS_A::_10000000)
511 }
512 #[doc = r"Writes raw bits to the field"]
513 #[inline(always)]
514 pub unsafe fn bits(self, value: u8) -> &'a mut W {
515 self.w.bits = (self.w.bits & !(0xff << 8)) | (((value as u32) & 0xff) << 8);
516 self.w
517 }
518}
519#[doc = "Data Timeout Counter Value\n\nValue on reset: 0"]
520#[derive(Clone, Copy, Debug, PartialEq)]
521pub enum DTOCV_A {
522 #[doc = "0: SDCLK x 2 13"]
523 _0000,
524 #[doc = "1: SDCLK x 2 14"]
525 _0001,
526 #[doc = "14: SDCLK x 2 27"]
527 _1110,
528}
529impl From<DTOCV_A> for u8 {
530 #[inline(always)]
531 fn from(variant: DTOCV_A) -> Self {
532 match variant {
533 DTOCV_A::_0000 => 0,
534 DTOCV_A::_0001 => 1,
535 DTOCV_A::_1110 => 14,
536 }
537 }
538}
539#[doc = "Reader of field `DTOCV`"]
540pub type DTOCV_R = crate::R<u8, DTOCV_A>;
541impl DTOCV_R {
542 #[doc = r"Get enumerated values variant"]
543 #[inline(always)]
544 pub fn variant(&self) -> crate::Variant<u8, DTOCV_A> {
545 use crate::Variant::*;
546 match self.bits {
547 0 => Val(DTOCV_A::_0000),
548 1 => Val(DTOCV_A::_0001),
549 14 => Val(DTOCV_A::_1110),
550 i => Res(i),
551 }
552 }
553 #[doc = "Checks if the value of the field is `_0000`"]
554 #[inline(always)]
555 pub fn is_0000(&self) -> bool {
556 *self == DTOCV_A::_0000
557 }
558 #[doc = "Checks if the value of the field is `_0001`"]
559 #[inline(always)]
560 pub fn is_0001(&self) -> bool {
561 *self == DTOCV_A::_0001
562 }
563 #[doc = "Checks if the value of the field is `_1110`"]
564 #[inline(always)]
565 pub fn is_1110(&self) -> bool {
566 *self == DTOCV_A::_1110
567 }
568}
569#[doc = "Write proxy for field `DTOCV`"]
570pub struct DTOCV_W<'a> {
571 w: &'a mut W,
572}
573impl<'a> DTOCV_W<'a> {
574 #[doc = r"Writes `variant` to the field"]
575 #[inline(always)]
576 pub fn variant(self, variant: DTOCV_A) -> &'a mut W {
577 unsafe { self.bits(variant.into()) }
578 }
579 #[doc = "SDCLK x 2 13"]
580 #[inline(always)]
581 pub fn _0000(self) -> &'a mut W {
582 self.variant(DTOCV_A::_0000)
583 }
584 #[doc = "SDCLK x 2 14"]
585 #[inline(always)]
586 pub fn _0001(self) -> &'a mut W {
587 self.variant(DTOCV_A::_0001)
588 }
589 #[doc = "SDCLK x 2 27"]
590 #[inline(always)]
591 pub fn _1110(self) -> &'a mut W {
592 self.variant(DTOCV_A::_1110)
593 }
594 #[doc = r"Writes raw bits to the field"]
595 #[inline(always)]
596 pub unsafe fn bits(self, value: u8) -> &'a mut W {
597 self.w.bits = (self.w.bits & !(0x0f << 16)) | (((value as u32) & 0x0f) << 16);
598 self.w
599 }
600}
601#[doc = "Software Reset For ALL\n\nValue on reset: 0"]
602#[derive(Clone, Copy, Debug, PartialEq)]
603pub enum RSTA_AW {
604 #[doc = "0: No reset."]
605 _0,
606 #[doc = "1: Reset."]
607 _1,
608}
609impl From<RSTA_AW> for bool {
610 #[inline(always)]
611 fn from(variant: RSTA_AW) -> Self {
612 match variant {
613 RSTA_AW::_0 => false,
614 RSTA_AW::_1 => true,
615 }
616 }
617}
618#[doc = "Write proxy for field `RSTA`"]
619pub struct RSTA_W<'a> {
620 w: &'a mut W,
621}
622impl<'a> RSTA_W<'a> {
623 #[doc = r"Writes `variant` to the field"]
624 #[inline(always)]
625 pub fn variant(self, variant: RSTA_AW) -> &'a mut W {
626 {
627 self.bit(variant.into())
628 }
629 }
630 #[doc = "No reset."]
631 #[inline(always)]
632 pub fn _0(self) -> &'a mut W {
633 self.variant(RSTA_AW::_0)
634 }
635 #[doc = "Reset."]
636 #[inline(always)]
637 pub fn _1(self) -> &'a mut W {
638 self.variant(RSTA_AW::_1)
639 }
640 #[doc = r"Sets the field bit"]
641 #[inline(always)]
642 pub fn set_bit(self) -> &'a mut W {
643 self.bit(true)
644 }
645 #[doc = r"Clears the field bit"]
646 #[inline(always)]
647 pub fn clear_bit(self) -> &'a mut W {
648 self.bit(false)
649 }
650 #[doc = r"Writes raw bits to the field"]
651 #[inline(always)]
652 pub fn bit(self, value: bool) -> &'a mut W {
653 self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
654 self.w
655 }
656}
657#[doc = "Software Reset For CMD Line\n\nValue on reset: 0"]
658#[derive(Clone, Copy, Debug, PartialEq)]
659pub enum RSTC_AW {
660 #[doc = "0: No reset."]
661 _0,
662 #[doc = "1: Reset."]
663 _1,
664}
665impl From<RSTC_AW> for bool {
666 #[inline(always)]
667 fn from(variant: RSTC_AW) -> Self {
668 match variant {
669 RSTC_AW::_0 => false,
670 RSTC_AW::_1 => true,
671 }
672 }
673}
674#[doc = "Write proxy for field `RSTC`"]
675pub struct RSTC_W<'a> {
676 w: &'a mut W,
677}
678impl<'a> RSTC_W<'a> {
679 #[doc = r"Writes `variant` to the field"]
680 #[inline(always)]
681 pub fn variant(self, variant: RSTC_AW) -> &'a mut W {
682 {
683 self.bit(variant.into())
684 }
685 }
686 #[doc = "No reset."]
687 #[inline(always)]
688 pub fn _0(self) -> &'a mut W {
689 self.variant(RSTC_AW::_0)
690 }
691 #[doc = "Reset."]
692 #[inline(always)]
693 pub fn _1(self) -> &'a mut W {
694 self.variant(RSTC_AW::_1)
695 }
696 #[doc = r"Sets the field bit"]
697 #[inline(always)]
698 pub fn set_bit(self) -> &'a mut W {
699 self.bit(true)
700 }
701 #[doc = r"Clears the field bit"]
702 #[inline(always)]
703 pub fn clear_bit(self) -> &'a mut W {
704 self.bit(false)
705 }
706 #[doc = r"Writes raw bits to the field"]
707 #[inline(always)]
708 pub fn bit(self, value: bool) -> &'a mut W {
709 self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
710 self.w
711 }
712}
713#[doc = "Software Reset For DAT Line\n\nValue on reset: 0"]
714#[derive(Clone, Copy, Debug, PartialEq)]
715pub enum RSTD_AW {
716 #[doc = "0: No reset."]
717 _0,
718 #[doc = "1: Reset."]
719 _1,
720}
721impl From<RSTD_AW> for bool {
722 #[inline(always)]
723 fn from(variant: RSTD_AW) -> Self {
724 match variant {
725 RSTD_AW::_0 => false,
726 RSTD_AW::_1 => true,
727 }
728 }
729}
730#[doc = "Write proxy for field `RSTD`"]
731pub struct RSTD_W<'a> {
732 w: &'a mut W,
733}
734impl<'a> RSTD_W<'a> {
735 #[doc = r"Writes `variant` to the field"]
736 #[inline(always)]
737 pub fn variant(self, variant: RSTD_AW) -> &'a mut W {
738 {
739 self.bit(variant.into())
740 }
741 }
742 #[doc = "No reset."]
743 #[inline(always)]
744 pub fn _0(self) -> &'a mut W {
745 self.variant(RSTD_AW::_0)
746 }
747 #[doc = "Reset."]
748 #[inline(always)]
749 pub fn _1(self) -> &'a mut W {
750 self.variant(RSTD_AW::_1)
751 }
752 #[doc = r"Sets the field bit"]
753 #[inline(always)]
754 pub fn set_bit(self) -> &'a mut W {
755 self.bit(true)
756 }
757 #[doc = r"Clears the field bit"]
758 #[inline(always)]
759 pub fn clear_bit(self) -> &'a mut W {
760 self.bit(false)
761 }
762 #[doc = r"Writes raw bits to the field"]
763 #[inline(always)]
764 pub fn bit(self, value: bool) -> &'a mut W {
765 self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
766 self.w
767 }
768}
769#[doc = "Reader of field `INITA`"]
770pub type INITA_R = crate::R<bool, bool>;
771#[doc = "Write proxy for field `INITA`"]
772pub struct INITA_W<'a> {
773 w: &'a mut W,
774}
775impl<'a> INITA_W<'a> {
776 #[doc = r"Sets the field bit"]
777 #[inline(always)]
778 pub fn set_bit(self) -> &'a mut W {
779 self.bit(true)
780 }
781 #[doc = r"Clears the field bit"]
782 #[inline(always)]
783 pub fn clear_bit(self) -> &'a mut W {
784 self.bit(false)
785 }
786 #[doc = r"Writes raw bits to the field"]
787 #[inline(always)]
788 pub fn bit(self, value: bool) -> &'a mut W {
789 self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
790 self.w
791 }
792}
793impl R {
794 #[doc = "Bit 0 - IPG Clock Enable"]
795 #[inline(always)]
796 pub fn ipgen(&self) -> IPGEN_R {
797 IPGEN_R::new((self.bits & 0x01) != 0)
798 }
799 #[doc = "Bit 1 - System Clock Enable"]
800 #[inline(always)]
801 pub fn hcken(&self) -> HCKEN_R {
802 HCKEN_R::new(((self.bits >> 1) & 0x01) != 0)
803 }
804 #[doc = "Bit 2 - Peripheral Clock Enable"]
805 #[inline(always)]
806 pub fn peren(&self) -> PEREN_R {
807 PEREN_R::new(((self.bits >> 2) & 0x01) != 0)
808 }
809 #[doc = "Bit 3 - SD Clock Enable"]
810 #[inline(always)]
811 pub fn sdclken(&self) -> SDCLKEN_R {
812 SDCLKEN_R::new(((self.bits >> 3) & 0x01) != 0)
813 }
814 #[doc = "Bits 4:7 - Divisor"]
815 #[inline(always)]
816 pub fn dvs(&self) -> DVS_R {
817 DVS_R::new(((self.bits >> 4) & 0x0f) as u8)
818 }
819 #[doc = "Bits 8:15 - SDCLK Frequency Select"]
820 #[inline(always)]
821 pub fn sdclkfs(&self) -> SDCLKFS_R {
822 SDCLKFS_R::new(((self.bits >> 8) & 0xff) as u8)
823 }
824 #[doc = "Bits 16:19 - Data Timeout Counter Value"]
825 #[inline(always)]
826 pub fn dtocv(&self) -> DTOCV_R {
827 DTOCV_R::new(((self.bits >> 16) & 0x0f) as u8)
828 }
829 #[doc = "Bit 27 - Initialization Active"]
830 #[inline(always)]
831 pub fn inita(&self) -> INITA_R {
832 INITA_R::new(((self.bits >> 27) & 0x01) != 0)
833 }
834}
835impl W {
836 #[doc = "Bit 0 - IPG Clock Enable"]
837 #[inline(always)]
838 pub fn ipgen(&mut self) -> IPGEN_W {
839 IPGEN_W { w: self }
840 }
841 #[doc = "Bit 1 - System Clock Enable"]
842 #[inline(always)]
843 pub fn hcken(&mut self) -> HCKEN_W {
844 HCKEN_W { w: self }
845 }
846 #[doc = "Bit 2 - Peripheral Clock Enable"]
847 #[inline(always)]
848 pub fn peren(&mut self) -> PEREN_W {
849 PEREN_W { w: self }
850 }
851 #[doc = "Bit 3 - SD Clock Enable"]
852 #[inline(always)]
853 pub fn sdclken(&mut self) -> SDCLKEN_W {
854 SDCLKEN_W { w: self }
855 }
856 #[doc = "Bits 4:7 - Divisor"]
857 #[inline(always)]
858 pub fn dvs(&mut self) -> DVS_W {
859 DVS_W { w: self }
860 }
861 #[doc = "Bits 8:15 - SDCLK Frequency Select"]
862 #[inline(always)]
863 pub fn sdclkfs(&mut self) -> SDCLKFS_W {
864 SDCLKFS_W { w: self }
865 }
866 #[doc = "Bits 16:19 - Data Timeout Counter Value"]
867 #[inline(always)]
868 pub fn dtocv(&mut self) -> DTOCV_W {
869 DTOCV_W { w: self }
870 }
871 #[doc = "Bit 24 - Software Reset For ALL"]
872 #[inline(always)]
873 pub fn rsta(&mut self) -> RSTA_W {
874 RSTA_W { w: self }
875 }
876 #[doc = "Bit 25 - Software Reset For CMD Line"]
877 #[inline(always)]
878 pub fn rstc(&mut self) -> RSTC_W {
879 RSTC_W { w: self }
880 }
881 #[doc = "Bit 26 - Software Reset For DAT Line"]
882 #[inline(always)]
883 pub fn rstd(&mut self) -> RSTD_W {
884 RSTD_W { w: self }
885 }
886 #[doc = "Bit 27 - Initialization Active"]
887 #[inline(always)]
888 pub fn inita(&mut self) -> INITA_W {
889 INITA_W { w: self }
890 }
891}