mk66f18/uart4/
cfifo.rs

1#[doc = "Reader of register CFIFO"]
2pub type R = crate::R<u8, super::CFIFO>;
3#[doc = "Writer for register CFIFO"]
4pub type W = crate::W<u8, super::CFIFO>;
5#[doc = "Register CFIFO `reset()`'s with value 0"]
6impl crate::ResetValue for super::CFIFO {
7    type Type = u8;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Receive FIFO Underflow Interrupt Enable\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum RXUFE_A {
16    #[doc = "0: RXUF flag does not generate an interrupt to the host."]
17    _0,
18    #[doc = "1: RXUF flag generates an interrupt to the host."]
19    _1,
20}
21impl From<RXUFE_A> for bool {
22    #[inline(always)]
23    fn from(variant: RXUFE_A) -> Self {
24        match variant {
25            RXUFE_A::_0 => false,
26            RXUFE_A::_1 => true,
27        }
28    }
29}
30#[doc = "Reader of field `RXUFE`"]
31pub type RXUFE_R = crate::R<bool, RXUFE_A>;
32impl RXUFE_R {
33    #[doc = r"Get enumerated values variant"]
34    #[inline(always)]
35    pub fn variant(&self) -> RXUFE_A {
36        match self.bits {
37            false => RXUFE_A::_0,
38            true => RXUFE_A::_1,
39        }
40    }
41    #[doc = "Checks if the value of the field is `_0`"]
42    #[inline(always)]
43    pub fn is_0(&self) -> bool {
44        *self == RXUFE_A::_0
45    }
46    #[doc = "Checks if the value of the field is `_1`"]
47    #[inline(always)]
48    pub fn is_1(&self) -> bool {
49        *self == RXUFE_A::_1
50    }
51}
52#[doc = "Write proxy for field `RXUFE`"]
53pub struct RXUFE_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> RXUFE_W<'a> {
57    #[doc = r"Writes `variant` to the field"]
58    #[inline(always)]
59    pub fn variant(self, variant: RXUFE_A) -> &'a mut W {
60        {
61            self.bit(variant.into())
62        }
63    }
64    #[doc = "RXUF flag does not generate an interrupt to the host."]
65    #[inline(always)]
66    pub fn _0(self) -> &'a mut W {
67        self.variant(RXUFE_A::_0)
68    }
69    #[doc = "RXUF flag generates an interrupt to the host."]
70    #[inline(always)]
71    pub fn _1(self) -> &'a mut W {
72        self.variant(RXUFE_A::_1)
73    }
74    #[doc = r"Sets the field bit"]
75    #[inline(always)]
76    pub fn set_bit(self) -> &'a mut W {
77        self.bit(true)
78    }
79    #[doc = r"Clears the field bit"]
80    #[inline(always)]
81    pub fn clear_bit(self) -> &'a mut W {
82        self.bit(false)
83    }
84    #[doc = r"Writes raw bits to the field"]
85    #[inline(always)]
86    pub fn bit(self, value: bool) -> &'a mut W {
87        self.w.bits = (self.w.bits & !0x01) | ((value as u8) & 0x01);
88        self.w
89    }
90}
91#[doc = "Transmit FIFO Overflow Interrupt Enable\n\nValue on reset: 0"]
92#[derive(Clone, Copy, Debug, PartialEq)]
93pub enum TXOFE_A {
94    #[doc = "0: TXOF flag does not generate an interrupt to the host."]
95    _0,
96    #[doc = "1: TXOF flag generates an interrupt to the host."]
97    _1,
98}
99impl From<TXOFE_A> for bool {
100    #[inline(always)]
101    fn from(variant: TXOFE_A) -> Self {
102        match variant {
103            TXOFE_A::_0 => false,
104            TXOFE_A::_1 => true,
105        }
106    }
107}
108#[doc = "Reader of field `TXOFE`"]
109pub type TXOFE_R = crate::R<bool, TXOFE_A>;
110impl TXOFE_R {
111    #[doc = r"Get enumerated values variant"]
112    #[inline(always)]
113    pub fn variant(&self) -> TXOFE_A {
114        match self.bits {
115            false => TXOFE_A::_0,
116            true => TXOFE_A::_1,
117        }
118    }
119    #[doc = "Checks if the value of the field is `_0`"]
120    #[inline(always)]
121    pub fn is_0(&self) -> bool {
122        *self == TXOFE_A::_0
123    }
124    #[doc = "Checks if the value of the field is `_1`"]
125    #[inline(always)]
126    pub fn is_1(&self) -> bool {
127        *self == TXOFE_A::_1
128    }
129}
130#[doc = "Write proxy for field `TXOFE`"]
131pub struct TXOFE_W<'a> {
132    w: &'a mut W,
133}
134impl<'a> TXOFE_W<'a> {
135    #[doc = r"Writes `variant` to the field"]
136    #[inline(always)]
137    pub fn variant(self, variant: TXOFE_A) -> &'a mut W {
138        {
139            self.bit(variant.into())
140        }
141    }
142    #[doc = "TXOF flag does not generate an interrupt to the host."]
143    #[inline(always)]
144    pub fn _0(self) -> &'a mut W {
145        self.variant(TXOFE_A::_0)
146    }
147    #[doc = "TXOF flag generates an interrupt to the host."]
148    #[inline(always)]
149    pub fn _1(self) -> &'a mut W {
150        self.variant(TXOFE_A::_1)
151    }
152    #[doc = r"Sets the field bit"]
153    #[inline(always)]
154    pub fn set_bit(self) -> &'a mut W {
155        self.bit(true)
156    }
157    #[doc = r"Clears the field bit"]
158    #[inline(always)]
159    pub fn clear_bit(self) -> &'a mut W {
160        self.bit(false)
161    }
162    #[doc = r"Writes raw bits to the field"]
163    #[inline(always)]
164    pub fn bit(self, value: bool) -> &'a mut W {
165        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u8) & 0x01) << 1);
166        self.w
167    }
168}
169#[doc = "Receive FIFO Overflow Interrupt Enable\n\nValue on reset: 0"]
170#[derive(Clone, Copy, Debug, PartialEq)]
171pub enum RXOFE_A {
172    #[doc = "0: RXOF flag does not generate an interrupt to the host."]
173    _0,
174    #[doc = "1: RXOF flag generates an interrupt to the host."]
175    _1,
176}
177impl From<RXOFE_A> for bool {
178    #[inline(always)]
179    fn from(variant: RXOFE_A) -> Self {
180        match variant {
181            RXOFE_A::_0 => false,
182            RXOFE_A::_1 => true,
183        }
184    }
185}
186#[doc = "Reader of field `RXOFE`"]
187pub type RXOFE_R = crate::R<bool, RXOFE_A>;
188impl RXOFE_R {
189    #[doc = r"Get enumerated values variant"]
190    #[inline(always)]
191    pub fn variant(&self) -> RXOFE_A {
192        match self.bits {
193            false => RXOFE_A::_0,
194            true => RXOFE_A::_1,
195        }
196    }
197    #[doc = "Checks if the value of the field is `_0`"]
198    #[inline(always)]
199    pub fn is_0(&self) -> bool {
200        *self == RXOFE_A::_0
201    }
202    #[doc = "Checks if the value of the field is `_1`"]
203    #[inline(always)]
204    pub fn is_1(&self) -> bool {
205        *self == RXOFE_A::_1
206    }
207}
208#[doc = "Write proxy for field `RXOFE`"]
209pub struct RXOFE_W<'a> {
210    w: &'a mut W,
211}
212impl<'a> RXOFE_W<'a> {
213    #[doc = r"Writes `variant` to the field"]
214    #[inline(always)]
215    pub fn variant(self, variant: RXOFE_A) -> &'a mut W {
216        {
217            self.bit(variant.into())
218        }
219    }
220    #[doc = "RXOF flag does not generate an interrupt to the host."]
221    #[inline(always)]
222    pub fn _0(self) -> &'a mut W {
223        self.variant(RXOFE_A::_0)
224    }
225    #[doc = "RXOF flag generates an interrupt to the host."]
226    #[inline(always)]
227    pub fn _1(self) -> &'a mut W {
228        self.variant(RXOFE_A::_1)
229    }
230    #[doc = r"Sets the field bit"]
231    #[inline(always)]
232    pub fn set_bit(self) -> &'a mut W {
233        self.bit(true)
234    }
235    #[doc = r"Clears the field bit"]
236    #[inline(always)]
237    pub fn clear_bit(self) -> &'a mut W {
238        self.bit(false)
239    }
240    #[doc = r"Writes raw bits to the field"]
241    #[inline(always)]
242    pub fn bit(self, value: bool) -> &'a mut W {
243        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u8) & 0x01) << 2);
244        self.w
245    }
246}
247#[doc = "Receive FIFO/Buffer Flush\n\nValue on reset: 0"]
248#[derive(Clone, Copy, Debug, PartialEq)]
249pub enum RXFLUSH_AW {
250    #[doc = "0: No flush operation occurs."]
251    _0,
252    #[doc = "1: All data in the receive FIFO/buffer is cleared out."]
253    _1,
254}
255impl From<RXFLUSH_AW> for bool {
256    #[inline(always)]
257    fn from(variant: RXFLUSH_AW) -> Self {
258        match variant {
259            RXFLUSH_AW::_0 => false,
260            RXFLUSH_AW::_1 => true,
261        }
262    }
263}
264#[doc = "Write proxy for field `RXFLUSH`"]
265pub struct RXFLUSH_W<'a> {
266    w: &'a mut W,
267}
268impl<'a> RXFLUSH_W<'a> {
269    #[doc = r"Writes `variant` to the field"]
270    #[inline(always)]
271    pub fn variant(self, variant: RXFLUSH_AW) -> &'a mut W {
272        {
273            self.bit(variant.into())
274        }
275    }
276    #[doc = "No flush operation occurs."]
277    #[inline(always)]
278    pub fn _0(self) -> &'a mut W {
279        self.variant(RXFLUSH_AW::_0)
280    }
281    #[doc = "All data in the receive FIFO/buffer is cleared out."]
282    #[inline(always)]
283    pub fn _1(self) -> &'a mut W {
284        self.variant(RXFLUSH_AW::_1)
285    }
286    #[doc = r"Sets the field bit"]
287    #[inline(always)]
288    pub fn set_bit(self) -> &'a mut W {
289        self.bit(true)
290    }
291    #[doc = r"Clears the field bit"]
292    #[inline(always)]
293    pub fn clear_bit(self) -> &'a mut W {
294        self.bit(false)
295    }
296    #[doc = r"Writes raw bits to the field"]
297    #[inline(always)]
298    pub fn bit(self, value: bool) -> &'a mut W {
299        self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u8) & 0x01) << 6);
300        self.w
301    }
302}
303#[doc = "Transmit FIFO/Buffer Flush\n\nValue on reset: 0"]
304#[derive(Clone, Copy, Debug, PartialEq)]
305pub enum TXFLUSH_AW {
306    #[doc = "0: No flush operation occurs."]
307    _0,
308    #[doc = "1: All data in the transmit FIFO/Buffer is cleared out."]
309    _1,
310}
311impl From<TXFLUSH_AW> for bool {
312    #[inline(always)]
313    fn from(variant: TXFLUSH_AW) -> Self {
314        match variant {
315            TXFLUSH_AW::_0 => false,
316            TXFLUSH_AW::_1 => true,
317        }
318    }
319}
320#[doc = "Write proxy for field `TXFLUSH`"]
321pub struct TXFLUSH_W<'a> {
322    w: &'a mut W,
323}
324impl<'a> TXFLUSH_W<'a> {
325    #[doc = r"Writes `variant` to the field"]
326    #[inline(always)]
327    pub fn variant(self, variant: TXFLUSH_AW) -> &'a mut W {
328        {
329            self.bit(variant.into())
330        }
331    }
332    #[doc = "No flush operation occurs."]
333    #[inline(always)]
334    pub fn _0(self) -> &'a mut W {
335        self.variant(TXFLUSH_AW::_0)
336    }
337    #[doc = "All data in the transmit FIFO/Buffer is cleared out."]
338    #[inline(always)]
339    pub fn _1(self) -> &'a mut W {
340        self.variant(TXFLUSH_AW::_1)
341    }
342    #[doc = r"Sets the field bit"]
343    #[inline(always)]
344    pub fn set_bit(self) -> &'a mut W {
345        self.bit(true)
346    }
347    #[doc = r"Clears the field bit"]
348    #[inline(always)]
349    pub fn clear_bit(self) -> &'a mut W {
350        self.bit(false)
351    }
352    #[doc = r"Writes raw bits to the field"]
353    #[inline(always)]
354    pub fn bit(self, value: bool) -> &'a mut W {
355        self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u8) & 0x01) << 7);
356        self.w
357    }
358}
359impl R {
360    #[doc = "Bit 0 - Receive FIFO Underflow Interrupt Enable"]
361    #[inline(always)]
362    pub fn rxufe(&self) -> RXUFE_R {
363        RXUFE_R::new((self.bits & 0x01) != 0)
364    }
365    #[doc = "Bit 1 - Transmit FIFO Overflow Interrupt Enable"]
366    #[inline(always)]
367    pub fn txofe(&self) -> TXOFE_R {
368        TXOFE_R::new(((self.bits >> 1) & 0x01) != 0)
369    }
370    #[doc = "Bit 2 - Receive FIFO Overflow Interrupt Enable"]
371    #[inline(always)]
372    pub fn rxofe(&self) -> RXOFE_R {
373        RXOFE_R::new(((self.bits >> 2) & 0x01) != 0)
374    }
375}
376impl W {
377    #[doc = "Bit 0 - Receive FIFO Underflow Interrupt Enable"]
378    #[inline(always)]
379    pub fn rxufe(&mut self) -> RXUFE_W {
380        RXUFE_W { w: self }
381    }
382    #[doc = "Bit 1 - Transmit FIFO Overflow Interrupt Enable"]
383    #[inline(always)]
384    pub fn txofe(&mut self) -> TXOFE_W {
385        TXOFE_W { w: self }
386    }
387    #[doc = "Bit 2 - Receive FIFO Overflow Interrupt Enable"]
388    #[inline(always)]
389    pub fn rxofe(&mut self) -> RXOFE_W {
390        RXOFE_W { w: self }
391    }
392    #[doc = "Bit 6 - Receive FIFO/Buffer Flush"]
393    #[inline(always)]
394    pub fn rxflush(&mut self) -> RXFLUSH_W {
395        RXFLUSH_W { w: self }
396    }
397    #[doc = "Bit 7 - Transmit FIFO/Buffer Flush"]
398    #[inline(always)]
399    pub fn txflush(&mut self) -> TXFLUSH_W {
400        TXFLUSH_W { w: self }
401    }
402}
mk66f18/uart4/cfifo.rs

mk66f18/uart4/
cfifo.rs
