1#[doc = "Reader of register PUSHR"]
2pub type R = crate::R<u32, super::PUSHR>;
3#[doc = "Writer for register PUSHR"]
4pub type W = crate::W<u32, super::PUSHR>;
5#[doc = "Register PUSHR `reset()`'s with value 0"]
6impl crate::ResetValue for super::PUSHR {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `TXDATA`"]
14pub type TXDATA_R = crate::R<u16, u16>;
15#[doc = "Write proxy for field `TXDATA`"]
16pub struct TXDATA_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> TXDATA_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u16) -> &'a mut W {
23 self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
24 self.w
25 }
26}
27#[doc = "Select which PCS signals are to be asserted for the transfer\n\nValue on reset: 0"]
28#[derive(Clone, Copy, Debug, PartialEq)]
29pub enum PCS0_A {
30 #[doc = "0: Negate the PCS\\[x\\] signal."]
31 _0,
32 #[doc = "1: Assert the PCS\\[x\\] signal."]
33 _1,
34}
35impl From<PCS0_A> for bool {
36 #[inline(always)]
37 fn from(variant: PCS0_A) -> Self {
38 match variant {
39 PCS0_A::_0 => false,
40 PCS0_A::_1 => true,
41 }
42 }
43}
44#[doc = "Reader of field `PCS0`"]
45pub type PCS0_R = crate::R<bool, PCS0_A>;
46impl PCS0_R {
47 #[doc = r"Get enumerated values variant"]
48 #[inline(always)]
49 pub fn variant(&self) -> PCS0_A {
50 match self.bits {
51 false => PCS0_A::_0,
52 true => PCS0_A::_1,
53 }
54 }
55 #[doc = "Checks if the value of the field is `_0`"]
56 #[inline(always)]
57 pub fn is_0(&self) -> bool {
58 *self == PCS0_A::_0
59 }
60 #[doc = "Checks if the value of the field is `_1`"]
61 #[inline(always)]
62 pub fn is_1(&self) -> bool {
63 *self == PCS0_A::_1
64 }
65}
66#[doc = "Write proxy for field `PCS0`"]
67pub struct PCS0_W<'a> {
68 w: &'a mut W,
69}
70impl<'a> PCS0_W<'a> {
71 #[doc = r"Writes `variant` to the field"]
72 #[inline(always)]
73 pub fn variant(self, variant: PCS0_A) -> &'a mut W {
74 {
75 self.bit(variant.into())
76 }
77 }
78 #[doc = "Negate the PCS\\[x\\] signal."]
79 #[inline(always)]
80 pub fn _0(self) -> &'a mut W {
81 self.variant(PCS0_A::_0)
82 }
83 #[doc = "Assert the PCS\\[x\\] signal."]
84 #[inline(always)]
85 pub fn _1(self) -> &'a mut W {
86 self.variant(PCS0_A::_1)
87 }
88 #[doc = r"Sets the field bit"]
89 #[inline(always)]
90 pub fn set_bit(self) -> &'a mut W {
91 self.bit(true)
92 }
93 #[doc = r"Clears the field bit"]
94 #[inline(always)]
95 pub fn clear_bit(self) -> &'a mut W {
96 self.bit(false)
97 }
98 #[doc = r"Writes raw bits to the field"]
99 #[inline(always)]
100 pub fn bit(self, value: bool) -> &'a mut W {
101 self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
102 self.w
103 }
104}
105#[doc = "Select which PCS signals are to be asserted for the transfer\n\nValue on reset: 0"]
106#[derive(Clone, Copy, Debug, PartialEq)]
107pub enum PCS1_A {
108 #[doc = "0: Negate the PCS\\[x\\] signal."]
109 _0,
110 #[doc = "1: Assert the PCS\\[x\\] signal."]
111 _1,
112}
113impl From<PCS1_A> for bool {
114 #[inline(always)]
115 fn from(variant: PCS1_A) -> Self {
116 match variant {
117 PCS1_A::_0 => false,
118 PCS1_A::_1 => true,
119 }
120 }
121}
122#[doc = "Reader of field `PCS1`"]
123pub type PCS1_R = crate::R<bool, PCS1_A>;
124impl PCS1_R {
125 #[doc = r"Get enumerated values variant"]
126 #[inline(always)]
127 pub fn variant(&self) -> PCS1_A {
128 match self.bits {
129 false => PCS1_A::_0,
130 true => PCS1_A::_1,
131 }
132 }
133 #[doc = "Checks if the value of the field is `_0`"]
134 #[inline(always)]
135 pub fn is_0(&self) -> bool {
136 *self == PCS1_A::_0
137 }
138 #[doc = "Checks if the value of the field is `_1`"]
139 #[inline(always)]
140 pub fn is_1(&self) -> bool {
141 *self == PCS1_A::_1
142 }
143}
144#[doc = "Write proxy for field `PCS1`"]
145pub struct PCS1_W<'a> {
146 w: &'a mut W,
147}
148impl<'a> PCS1_W<'a> {
149 #[doc = r"Writes `variant` to the field"]
150 #[inline(always)]
151 pub fn variant(self, variant: PCS1_A) -> &'a mut W {
152 {
153 self.bit(variant.into())
154 }
155 }
156 #[doc = "Negate the PCS\\[x\\] signal."]
157 #[inline(always)]
158 pub fn _0(self) -> &'a mut W {
159 self.variant(PCS1_A::_0)
160 }
161 #[doc = "Assert the PCS\\[x\\] signal."]
162 #[inline(always)]
163 pub fn _1(self) -> &'a mut W {
164 self.variant(PCS1_A::_1)
165 }
166 #[doc = r"Sets the field bit"]
167 #[inline(always)]
168 pub fn set_bit(self) -> &'a mut W {
169 self.bit(true)
170 }
171 #[doc = r"Clears the field bit"]
172 #[inline(always)]
173 pub fn clear_bit(self) -> &'a mut W {
174 self.bit(false)
175 }
176 #[doc = r"Writes raw bits to the field"]
177 #[inline(always)]
178 pub fn bit(self, value: bool) -> &'a mut W {
179 self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
180 self.w
181 }
182}
183#[doc = "Select which PCS signals are to be asserted for the transfer\n\nValue on reset: 0"]
184#[derive(Clone, Copy, Debug, PartialEq)]
185pub enum PCS2_A {
186 #[doc = "0: Negate the PCS\\[x\\] signal."]
187 _0,
188 #[doc = "1: Assert the PCS\\[x\\] signal."]
189 _1,
190}
191impl From<PCS2_A> for bool {
192 #[inline(always)]
193 fn from(variant: PCS2_A) -> Self {
194 match variant {
195 PCS2_A::_0 => false,
196 PCS2_A::_1 => true,
197 }
198 }
199}
200#[doc = "Reader of field `PCS2`"]
201pub type PCS2_R = crate::R<bool, PCS2_A>;
202impl PCS2_R {
203 #[doc = r"Get enumerated values variant"]
204 #[inline(always)]
205 pub fn variant(&self) -> PCS2_A {
206 match self.bits {
207 false => PCS2_A::_0,
208 true => PCS2_A::_1,
209 }
210 }
211 #[doc = "Checks if the value of the field is `_0`"]
212 #[inline(always)]
213 pub fn is_0(&self) -> bool {
214 *self == PCS2_A::_0
215 }
216 #[doc = "Checks if the value of the field is `_1`"]
217 #[inline(always)]
218 pub fn is_1(&self) -> bool {
219 *self == PCS2_A::_1
220 }
221}
222#[doc = "Write proxy for field `PCS2`"]
223pub struct PCS2_W<'a> {
224 w: &'a mut W,
225}
226impl<'a> PCS2_W<'a> {
227 #[doc = r"Writes `variant` to the field"]
228 #[inline(always)]
229 pub fn variant(self, variant: PCS2_A) -> &'a mut W {
230 {
231 self.bit(variant.into())
232 }
233 }
234 #[doc = "Negate the PCS\\[x\\] signal."]
235 #[inline(always)]
236 pub fn _0(self) -> &'a mut W {
237 self.variant(PCS2_A::_0)
238 }
239 #[doc = "Assert the PCS\\[x\\] signal."]
240 #[inline(always)]
241 pub fn _1(self) -> &'a mut W {
242 self.variant(PCS2_A::_1)
243 }
244 #[doc = r"Sets the field bit"]
245 #[inline(always)]
246 pub fn set_bit(self) -> &'a mut W {
247 self.bit(true)
248 }
249 #[doc = r"Clears the field bit"]
250 #[inline(always)]
251 pub fn clear_bit(self) -> &'a mut W {
252 self.bit(false)
253 }
254 #[doc = r"Writes raw bits to the field"]
255 #[inline(always)]
256 pub fn bit(self, value: bool) -> &'a mut W {
257 self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
258 self.w
259 }
260}
261#[doc = "Select which PCS signals are to be asserted for the transfer\n\nValue on reset: 0"]
262#[derive(Clone, Copy, Debug, PartialEq)]
263pub enum PCS3_A {
264 #[doc = "0: Negate the PCS\\[x\\] signal."]
265 _0,
266 #[doc = "1: Assert the PCS\\[x\\] signal."]
267 _1,
268}
269impl From<PCS3_A> for bool {
270 #[inline(always)]
271 fn from(variant: PCS3_A) -> Self {
272 match variant {
273 PCS3_A::_0 => false,
274 PCS3_A::_1 => true,
275 }
276 }
277}
278#[doc = "Reader of field `PCS3`"]
279pub type PCS3_R = crate::R<bool, PCS3_A>;
280impl PCS3_R {
281 #[doc = r"Get enumerated values variant"]
282 #[inline(always)]
283 pub fn variant(&self) -> PCS3_A {
284 match self.bits {
285 false => PCS3_A::_0,
286 true => PCS3_A::_1,
287 }
288 }
289 #[doc = "Checks if the value of the field is `_0`"]
290 #[inline(always)]
291 pub fn is_0(&self) -> bool {
292 *self == PCS3_A::_0
293 }
294 #[doc = "Checks if the value of the field is `_1`"]
295 #[inline(always)]
296 pub fn is_1(&self) -> bool {
297 *self == PCS3_A::_1
298 }
299}
300#[doc = "Write proxy for field `PCS3`"]
301pub struct PCS3_W<'a> {
302 w: &'a mut W,
303}
304impl<'a> PCS3_W<'a> {
305 #[doc = r"Writes `variant` to the field"]
306 #[inline(always)]
307 pub fn variant(self, variant: PCS3_A) -> &'a mut W {
308 {
309 self.bit(variant.into())
310 }
311 }
312 #[doc = "Negate the PCS\\[x\\] signal."]
313 #[inline(always)]
314 pub fn _0(self) -> &'a mut W {
315 self.variant(PCS3_A::_0)
316 }
317 #[doc = "Assert the PCS\\[x\\] signal."]
318 #[inline(always)]
319 pub fn _1(self) -> &'a mut W {
320 self.variant(PCS3_A::_1)
321 }
322 #[doc = r"Sets the field bit"]
323 #[inline(always)]
324 pub fn set_bit(self) -> &'a mut W {
325 self.bit(true)
326 }
327 #[doc = r"Clears the field bit"]
328 #[inline(always)]
329 pub fn clear_bit(self) -> &'a mut W {
330 self.bit(false)
331 }
332 #[doc = r"Writes raw bits to the field"]
333 #[inline(always)]
334 pub fn bit(self, value: bool) -> &'a mut W {
335 self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
336 self.w
337 }
338}
339#[doc = "Select which PCS signals are to be asserted for the transfer\n\nValue on reset: 0"]
340#[derive(Clone, Copy, Debug, PartialEq)]
341pub enum PCS4_A {
342 #[doc = "0: Negate the PCS\\[x\\] signal."]
343 _0,
344 #[doc = "1: Assert the PCS\\[x\\] signal."]
345 _1,
346}
347impl From<PCS4_A> for bool {
348 #[inline(always)]
349 fn from(variant: PCS4_A) -> Self {
350 match variant {
351 PCS4_A::_0 => false,
352 PCS4_A::_1 => true,
353 }
354 }
355}
356#[doc = "Reader of field `PCS4`"]
357pub type PCS4_R = crate::R<bool, PCS4_A>;
358impl PCS4_R {
359 #[doc = r"Get enumerated values variant"]
360 #[inline(always)]
361 pub fn variant(&self) -> PCS4_A {
362 match self.bits {
363 false => PCS4_A::_0,
364 true => PCS4_A::_1,
365 }
366 }
367 #[doc = "Checks if the value of the field is `_0`"]
368 #[inline(always)]
369 pub fn is_0(&self) -> bool {
370 *self == PCS4_A::_0
371 }
372 #[doc = "Checks if the value of the field is `_1`"]
373 #[inline(always)]
374 pub fn is_1(&self) -> bool {
375 *self == PCS4_A::_1
376 }
377}
378#[doc = "Write proxy for field `PCS4`"]
379pub struct PCS4_W<'a> {
380 w: &'a mut W,
381}
382impl<'a> PCS4_W<'a> {
383 #[doc = r"Writes `variant` to the field"]
384 #[inline(always)]
385 pub fn variant(self, variant: PCS4_A) -> &'a mut W {
386 {
387 self.bit(variant.into())
388 }
389 }
390 #[doc = "Negate the PCS\\[x\\] signal."]
391 #[inline(always)]
392 pub fn _0(self) -> &'a mut W {
393 self.variant(PCS4_A::_0)
394 }
395 #[doc = "Assert the PCS\\[x\\] signal."]
396 #[inline(always)]
397 pub fn _1(self) -> &'a mut W {
398 self.variant(PCS4_A::_1)
399 }
400 #[doc = r"Sets the field bit"]
401 #[inline(always)]
402 pub fn set_bit(self) -> &'a mut W {
403 self.bit(true)
404 }
405 #[doc = r"Clears the field bit"]
406 #[inline(always)]
407 pub fn clear_bit(self) -> &'a mut W {
408 self.bit(false)
409 }
410 #[doc = r"Writes raw bits to the field"]
411 #[inline(always)]
412 pub fn bit(self, value: bool) -> &'a mut W {
413 self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
414 self.w
415 }
416}
417#[doc = "Select which PCS signals are to be asserted for the transfer\n\nValue on reset: 0"]
418#[derive(Clone, Copy, Debug, PartialEq)]
419pub enum PCS5_A {
420 #[doc = "0: Negate the PCS\\[x\\] signal."]
421 _0,
422 #[doc = "1: Assert the PCS\\[x\\] signal."]
423 _1,
424}
425impl From<PCS5_A> for bool {
426 #[inline(always)]
427 fn from(variant: PCS5_A) -> Self {
428 match variant {
429 PCS5_A::_0 => false,
430 PCS5_A::_1 => true,
431 }
432 }
433}
434#[doc = "Reader of field `PCS5`"]
435pub type PCS5_R = crate::R<bool, PCS5_A>;
436impl PCS5_R {
437 #[doc = r"Get enumerated values variant"]
438 #[inline(always)]
439 pub fn variant(&self) -> PCS5_A {
440 match self.bits {
441 false => PCS5_A::_0,
442 true => PCS5_A::_1,
443 }
444 }
445 #[doc = "Checks if the value of the field is `_0`"]
446 #[inline(always)]
447 pub fn is_0(&self) -> bool {
448 *self == PCS5_A::_0
449 }
450 #[doc = "Checks if the value of the field is `_1`"]
451 #[inline(always)]
452 pub fn is_1(&self) -> bool {
453 *self == PCS5_A::_1
454 }
455}
456#[doc = "Write proxy for field `PCS5`"]
457pub struct PCS5_W<'a> {
458 w: &'a mut W,
459}
460impl<'a> PCS5_W<'a> {
461 #[doc = r"Writes `variant` to the field"]
462 #[inline(always)]
463 pub fn variant(self, variant: PCS5_A) -> &'a mut W {
464 {
465 self.bit(variant.into())
466 }
467 }
468 #[doc = "Negate the PCS\\[x\\] signal."]
469 #[inline(always)]
470 pub fn _0(self) -> &'a mut W {
471 self.variant(PCS5_A::_0)
472 }
473 #[doc = "Assert the PCS\\[x\\] signal."]
474 #[inline(always)]
475 pub fn _1(self) -> &'a mut W {
476 self.variant(PCS5_A::_1)
477 }
478 #[doc = r"Sets the field bit"]
479 #[inline(always)]
480 pub fn set_bit(self) -> &'a mut W {
481 self.bit(true)
482 }
483 #[doc = r"Clears the field bit"]
484 #[inline(always)]
485 pub fn clear_bit(self) -> &'a mut W {
486 self.bit(false)
487 }
488 #[doc = r"Writes raw bits to the field"]
489 #[inline(always)]
490 pub fn bit(self, value: bool) -> &'a mut W {
491 self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
492 self.w
493 }
494}
495#[doc = "Clear Transfer Counter\n\nValue on reset: 0"]
496#[derive(Clone, Copy, Debug, PartialEq)]
497pub enum CTCNT_A {
498 #[doc = "0: Do not clear the TCR\\[TCNT\\] field."]
499 _0,
500 #[doc = "1: Clear the TCR\\[TCNT\\] field."]
501 _1,
502}
503impl From<CTCNT_A> for bool {
504 #[inline(always)]
505 fn from(variant: CTCNT_A) -> Self {
506 match variant {
507 CTCNT_A::_0 => false,
508 CTCNT_A::_1 => true,
509 }
510 }
511}
512#[doc = "Reader of field `CTCNT`"]
513pub type CTCNT_R = crate::R<bool, CTCNT_A>;
514impl CTCNT_R {
515 #[doc = r"Get enumerated values variant"]
516 #[inline(always)]
517 pub fn variant(&self) -> CTCNT_A {
518 match self.bits {
519 false => CTCNT_A::_0,
520 true => CTCNT_A::_1,
521 }
522 }
523 #[doc = "Checks if the value of the field is `_0`"]
524 #[inline(always)]
525 pub fn is_0(&self) -> bool {
526 *self == CTCNT_A::_0
527 }
528 #[doc = "Checks if the value of the field is `_1`"]
529 #[inline(always)]
530 pub fn is_1(&self) -> bool {
531 *self == CTCNT_A::_1
532 }
533}
534#[doc = "Write proxy for field `CTCNT`"]
535pub struct CTCNT_W<'a> {
536 w: &'a mut W,
537}
538impl<'a> CTCNT_W<'a> {
539 #[doc = r"Writes `variant` to the field"]
540 #[inline(always)]
541 pub fn variant(self, variant: CTCNT_A) -> &'a mut W {
542 {
543 self.bit(variant.into())
544 }
545 }
546 #[doc = "Do not clear the TCR\\[TCNT\\] field."]
547 #[inline(always)]
548 pub fn _0(self) -> &'a mut W {
549 self.variant(CTCNT_A::_0)
550 }
551 #[doc = "Clear the TCR\\[TCNT\\] field."]
552 #[inline(always)]
553 pub fn _1(self) -> &'a mut W {
554 self.variant(CTCNT_A::_1)
555 }
556 #[doc = r"Sets the field bit"]
557 #[inline(always)]
558 pub fn set_bit(self) -> &'a mut W {
559 self.bit(true)
560 }
561 #[doc = r"Clears the field bit"]
562 #[inline(always)]
563 pub fn clear_bit(self) -> &'a mut W {
564 self.bit(false)
565 }
566 #[doc = r"Writes raw bits to the field"]
567 #[inline(always)]
568 pub fn bit(self, value: bool) -> &'a mut W {
569 self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
570 self.w
571 }
572}
573#[doc = "End Of Queue\n\nValue on reset: 0"]
574#[derive(Clone, Copy, Debug, PartialEq)]
575pub enum EOQ_A {
576 #[doc = "0: The SPI data is not the last data to transfer."]
577 _0,
578 #[doc = "1: The SPI data is the last data to transfer."]
579 _1,
580}
581impl From<EOQ_A> for bool {
582 #[inline(always)]
583 fn from(variant: EOQ_A) -> Self {
584 match variant {
585 EOQ_A::_0 => false,
586 EOQ_A::_1 => true,
587 }
588 }
589}
590#[doc = "Reader of field `EOQ`"]
591pub type EOQ_R = crate::R<bool, EOQ_A>;
592impl EOQ_R {
593 #[doc = r"Get enumerated values variant"]
594 #[inline(always)]
595 pub fn variant(&self) -> EOQ_A {
596 match self.bits {
597 false => EOQ_A::_0,
598 true => EOQ_A::_1,
599 }
600 }
601 #[doc = "Checks if the value of the field is `_0`"]
602 #[inline(always)]
603 pub fn is_0(&self) -> bool {
604 *self == EOQ_A::_0
605 }
606 #[doc = "Checks if the value of the field is `_1`"]
607 #[inline(always)]
608 pub fn is_1(&self) -> bool {
609 *self == EOQ_A::_1
610 }
611}
612#[doc = "Write proxy for field `EOQ`"]
613pub struct EOQ_W<'a> {
614 w: &'a mut W,
615}
616impl<'a> EOQ_W<'a> {
617 #[doc = r"Writes `variant` to the field"]
618 #[inline(always)]
619 pub fn variant(self, variant: EOQ_A) -> &'a mut W {
620 {
621 self.bit(variant.into())
622 }
623 }
624 #[doc = "The SPI data is not the last data to transfer."]
625 #[inline(always)]
626 pub fn _0(self) -> &'a mut W {
627 self.variant(EOQ_A::_0)
628 }
629 #[doc = "The SPI data is the last data to transfer."]
630 #[inline(always)]
631 pub fn _1(self) -> &'a mut W {
632 self.variant(EOQ_A::_1)
633 }
634 #[doc = r"Sets the field bit"]
635 #[inline(always)]
636 pub fn set_bit(self) -> &'a mut W {
637 self.bit(true)
638 }
639 #[doc = r"Clears the field bit"]
640 #[inline(always)]
641 pub fn clear_bit(self) -> &'a mut W {
642 self.bit(false)
643 }
644 #[doc = r"Writes raw bits to the field"]
645 #[inline(always)]
646 pub fn bit(self, value: bool) -> &'a mut W {
647 self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
648 self.w
649 }
650}
651#[doc = "Clock and Transfer Attributes Select\n\nValue on reset: 0"]
652#[derive(Clone, Copy, Debug, PartialEq)]
653pub enum CTAS_A {
654 #[doc = "0: CTAR0"]
655 _000,
656 #[doc = "1: CTAR1"]
657 _001,
658}
659impl From<CTAS_A> for u8 {
660 #[inline(always)]
661 fn from(variant: CTAS_A) -> Self {
662 match variant {
663 CTAS_A::_000 => 0,
664 CTAS_A::_001 => 1,
665 }
666 }
667}
668#[doc = "Reader of field `CTAS`"]
669pub type CTAS_R = crate::R<u8, CTAS_A>;
670impl CTAS_R {
671 #[doc = r"Get enumerated values variant"]
672 #[inline(always)]
673 pub fn variant(&self) -> crate::Variant<u8, CTAS_A> {
674 use crate::Variant::*;
675 match self.bits {
676 0 => Val(CTAS_A::_000),
677 1 => Val(CTAS_A::_001),
678 i => Res(i),
679 }
680 }
681 #[doc = "Checks if the value of the field is `_000`"]
682 #[inline(always)]
683 pub fn is_000(&self) -> bool {
684 *self == CTAS_A::_000
685 }
686 #[doc = "Checks if the value of the field is `_001`"]
687 #[inline(always)]
688 pub fn is_001(&self) -> bool {
689 *self == CTAS_A::_001
690 }
691}
692#[doc = "Write proxy for field `CTAS`"]
693pub struct CTAS_W<'a> {
694 w: &'a mut W,
695}
696impl<'a> CTAS_W<'a> {
697 #[doc = r"Writes `variant` to the field"]
698 #[inline(always)]
699 pub fn variant(self, variant: CTAS_A) -> &'a mut W {
700 unsafe { self.bits(variant.into()) }
701 }
702 #[doc = "CTAR0"]
703 #[inline(always)]
704 pub fn _000(self) -> &'a mut W {
705 self.variant(CTAS_A::_000)
706 }
707 #[doc = "CTAR1"]
708 #[inline(always)]
709 pub fn _001(self) -> &'a mut W {
710 self.variant(CTAS_A::_001)
711 }
712 #[doc = r"Writes raw bits to the field"]
713 #[inline(always)]
714 pub unsafe fn bits(self, value: u8) -> &'a mut W {
715 self.w.bits = (self.w.bits & !(0x07 << 28)) | (((value as u32) & 0x07) << 28);
716 self.w
717 }
718}
719#[doc = "Continuous Peripheral Chip Select Enable\n\nValue on reset: 0"]
720#[derive(Clone, Copy, Debug, PartialEq)]
721pub enum CONT_A {
722 #[doc = "0: Return PCSn signals to their inactive state between transfers."]
723 _0,
724 #[doc = "1: Keep PCSn signals asserted between transfers."]
725 _1,
726}
727impl From<CONT_A> for bool {
728 #[inline(always)]
729 fn from(variant: CONT_A) -> Self {
730 match variant {
731 CONT_A::_0 => false,
732 CONT_A::_1 => true,
733 }
734 }
735}
736#[doc = "Reader of field `CONT`"]
737pub type CONT_R = crate::R<bool, CONT_A>;
738impl CONT_R {
739 #[doc = r"Get enumerated values variant"]
740 #[inline(always)]
741 pub fn variant(&self) -> CONT_A {
742 match self.bits {
743 false => CONT_A::_0,
744 true => CONT_A::_1,
745 }
746 }
747 #[doc = "Checks if the value of the field is `_0`"]
748 #[inline(always)]
749 pub fn is_0(&self) -> bool {
750 *self == CONT_A::_0
751 }
752 #[doc = "Checks if the value of the field is `_1`"]
753 #[inline(always)]
754 pub fn is_1(&self) -> bool {
755 *self == CONT_A::_1
756 }
757}
758#[doc = "Write proxy for field `CONT`"]
759pub struct CONT_W<'a> {
760 w: &'a mut W,
761}
762impl<'a> CONT_W<'a> {
763 #[doc = r"Writes `variant` to the field"]
764 #[inline(always)]
765 pub fn variant(self, variant: CONT_A) -> &'a mut W {
766 {
767 self.bit(variant.into())
768 }
769 }
770 #[doc = "Return PCSn signals to their inactive state between transfers."]
771 #[inline(always)]
772 pub fn _0(self) -> &'a mut W {
773 self.variant(CONT_A::_0)
774 }
775 #[doc = "Keep PCSn signals asserted between transfers."]
776 #[inline(always)]
777 pub fn _1(self) -> &'a mut W {
778 self.variant(CONT_A::_1)
779 }
780 #[doc = r"Sets the field bit"]
781 #[inline(always)]
782 pub fn set_bit(self) -> &'a mut W {
783 self.bit(true)
784 }
785 #[doc = r"Clears the field bit"]
786 #[inline(always)]
787 pub fn clear_bit(self) -> &'a mut W {
788 self.bit(false)
789 }
790 #[doc = r"Writes raw bits to the field"]
791 #[inline(always)]
792 pub fn bit(self, value: bool) -> &'a mut W {
793 self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
794 self.w
795 }
796}
797impl R {
798 #[doc = "Bits 0:15 - Transmit Data"]
799 #[inline(always)]
800 pub fn txdata(&self) -> TXDATA_R {
801 TXDATA_R::new((self.bits & 0xffff) as u16)
802 }
803 #[doc = "Bit 16 - Select which PCS signals are to be asserted for the transfer"]
804 #[inline(always)]
805 pub fn pcs0(&self) -> PCS0_R {
806 PCS0_R::new(((self.bits >> 16) & 0x01) != 0)
807 }
808 #[doc = "Bit 17 - Select which PCS signals are to be asserted for the transfer"]
809 #[inline(always)]
810 pub fn pcs1(&self) -> PCS1_R {
811 PCS1_R::new(((self.bits >> 17) & 0x01) != 0)
812 }
813 #[doc = "Bit 18 - Select which PCS signals are to be asserted for the transfer"]
814 #[inline(always)]
815 pub fn pcs2(&self) -> PCS2_R {
816 PCS2_R::new(((self.bits >> 18) & 0x01) != 0)
817 }
818 #[doc = "Bit 19 - Select which PCS signals are to be asserted for the transfer"]
819 #[inline(always)]
820 pub fn pcs3(&self) -> PCS3_R {
821 PCS3_R::new(((self.bits >> 19) & 0x01) != 0)
822 }
823 #[doc = "Bit 20 - Select which PCS signals are to be asserted for the transfer"]
824 #[inline(always)]
825 pub fn pcs4(&self) -> PCS4_R {
826 PCS4_R::new(((self.bits >> 20) & 0x01) != 0)
827 }
828 #[doc = "Bit 21 - Select which PCS signals are to be asserted for the transfer"]
829 #[inline(always)]
830 pub fn pcs5(&self) -> PCS5_R {
831 PCS5_R::new(((self.bits >> 21) & 0x01) != 0)
832 }
833 #[doc = "Bit 26 - Clear Transfer Counter"]
834 #[inline(always)]
835 pub fn ctcnt(&self) -> CTCNT_R {
836 CTCNT_R::new(((self.bits >> 26) & 0x01) != 0)
837 }
838 #[doc = "Bit 27 - End Of Queue"]
839 #[inline(always)]
840 pub fn eoq(&self) -> EOQ_R {
841 EOQ_R::new(((self.bits >> 27) & 0x01) != 0)
842 }
843 #[doc = "Bits 28:30 - Clock and Transfer Attributes Select"]
844 #[inline(always)]
845 pub fn ctas(&self) -> CTAS_R {
846 CTAS_R::new(((self.bits >> 28) & 0x07) as u8)
847 }
848 #[doc = "Bit 31 - Continuous Peripheral Chip Select Enable"]
849 #[inline(always)]
850 pub fn cont(&self) -> CONT_R {
851 CONT_R::new(((self.bits >> 31) & 0x01) != 0)
852 }
853}
854impl W {
855 #[doc = "Bits 0:15 - Transmit Data"]
856 #[inline(always)]
857 pub fn txdata(&mut self) -> TXDATA_W {
858 TXDATA_W { w: self }
859 }
860 #[doc = "Bit 16 - Select which PCS signals are to be asserted for the transfer"]
861 #[inline(always)]
862 pub fn pcs0(&mut self) -> PCS0_W {
863 PCS0_W { w: self }
864 }
865 #[doc = "Bit 17 - Select which PCS signals are to be asserted for the transfer"]
866 #[inline(always)]
867 pub fn pcs1(&mut self) -> PCS1_W {
868 PCS1_W { w: self }
869 }
870 #[doc = "Bit 18 - Select which PCS signals are to be asserted for the transfer"]
871 #[inline(always)]
872 pub fn pcs2(&mut self) -> PCS2_W {
873 PCS2_W { w: self }
874 }
875 #[doc = "Bit 19 - Select which PCS signals are to be asserted for the transfer"]
876 #[inline(always)]
877 pub fn pcs3(&mut self) -> PCS3_W {
878 PCS3_W { w: self }
879 }
880 #[doc = "Bit 20 - Select which PCS signals are to be asserted for the transfer"]
881 #[inline(always)]
882 pub fn pcs4(&mut self) -> PCS4_W {
883 PCS4_W { w: self }
884 }
885 #[doc = "Bit 21 - Select which PCS signals are to be asserted for the transfer"]
886 #[inline(always)]
887 pub fn pcs5(&mut self) -> PCS5_W {
888 PCS5_W { w: self }
889 }
890 #[doc = "Bit 26 - Clear Transfer Counter"]
891 #[inline(always)]
892 pub fn ctcnt(&mut self) -> CTCNT_W {
893 CTCNT_W { w: self }
894 }
895 #[doc = "Bit 27 - End Of Queue"]
896 #[inline(always)]
897 pub fn eoq(&mut self) -> EOQ_W {
898 EOQ_W { w: self }
899 }
900 #[doc = "Bits 28:30 - Clock and Transfer Attributes Select"]
901 #[inline(always)]
902 pub fn ctas(&mut self) -> CTAS_W {
903 CTAS_W { w: self }
904 }
905 #[doc = "Bit 31 - Continuous Peripheral Chip Select Enable"]
906 #[inline(always)]
907 pub fn cont(&mut self) -> CONT_W {
908 CONT_W { w: self }
909 }
910}