mk20d7/pdb0/
mod.rs

1#[doc = r" Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    #[doc = "0x00 - Status and Control Register"]
5    pub sc: SC,
6    #[doc = "0x04 - Modulus Register"]
7    pub mod_: MOD,
8    #[doc = "0x08 - Counter Register"]
9    pub cnt: CNT,
10    #[doc = "0x0c - Interrupt Delay Register"]
11    pub idly: IDLY,
12    #[doc = "0x10 - Channel n Control Register 1"]
13    pub ch0c1: CHC1,
14    #[doc = "0x14 - Channel n Status Register"]
15    pub ch0s: CHS,
16    #[doc = "0x18 - Channel n Delay 0 Register"]
17    pub ch0dly0: CHDLY0,
18    #[doc = "0x1c - Channel n Delay 1 Register"]
19    pub ch0dly1: CHDLY1,
20    _reserved0: [u8; 24usize],
21    #[doc = "0x38 - Channel n Control Register 1"]
22    pub ch1c1: CHC1,
23    #[doc = "0x3c - Channel n Status Register"]
24    pub ch1s: CHS,
25    #[doc = "0x40 - Channel n Delay 0 Register"]
26    pub ch1dly0: CHDLY0,
27    #[doc = "0x44 - Channel n Delay 1 Register"]
28    pub ch1dly1: CHDLY1,
29    _reserved1: [u8; 264usize],
30    #[doc = "0x150 - DAC Interval Trigger n Control Register"]
31    pub dacintc: DACINTC,
32    #[doc = "0x154 - DAC Interval n Register"]
33    pub dacint: DACINT,
34    _reserved2: [u8; 56usize],
35    #[doc = "0x190 - Pulse-Out n Enable Register"]
36    pub poen: POEN,
37    #[doc = "0x194 - Pulse-Out n Delay Register"]
38    pub podly: [PODLY; 3],
39}
40#[doc = "Status and Control Register"]
41pub struct SC {
42    register: ::vcell::VolatileCell<u32>,
43}
44#[doc = "Status and Control Register"]
45pub mod sc;
46#[doc = "Modulus Register"]
47pub struct MOD {
48    register: ::vcell::VolatileCell<u32>,
49}
50#[doc = "Modulus Register"]
51pub mod mod_;
52#[doc = "Counter Register"]
53pub struct CNT {
54    register: ::vcell::VolatileCell<u32>,
55}
56#[doc = "Counter Register"]
57pub mod cnt;
58#[doc = "Interrupt Delay Register"]
59pub struct IDLY {
60    register: ::vcell::VolatileCell<u32>,
61}
62#[doc = "Interrupt Delay Register"]
63pub mod idly;
64#[doc = "Channel n Control Register 1"]
65pub struct CHC1 {
66    register: ::vcell::VolatileCell<u32>,
67}
68#[doc = "Channel n Control Register 1"]
69pub mod chc1;
70#[doc = "Channel n Status Register"]
71pub struct CHS {
72    register: ::vcell::VolatileCell<u32>,
73}
74#[doc = "Channel n Status Register"]
75pub mod chs;
76#[doc = "Channel n Delay 0 Register"]
77pub struct CHDLY0 {
78    register: ::vcell::VolatileCell<u32>,
79}
80#[doc = "Channel n Delay 0 Register"]
81pub mod chdly0;
82#[doc = "Channel n Delay 1 Register"]
83pub struct CHDLY1 {
84    register: ::vcell::VolatileCell<u32>,
85}
86#[doc = "Channel n Delay 1 Register"]
87pub mod chdly1;
88#[doc = "DAC Interval Trigger n Control Register"]
89pub struct DACINTC {
90    register: ::vcell::VolatileCell<u32>,
91}
92#[doc = "DAC Interval Trigger n Control Register"]
93pub mod dacintc;
94#[doc = "DAC Interval n Register"]
95pub struct DACINT {
96    register: ::vcell::VolatileCell<u32>,
97}
98#[doc = "DAC Interval n Register"]
99pub mod dacint;
100#[doc = "Pulse-Out n Enable Register"]
101pub struct POEN {
102    register: ::vcell::VolatileCell<u32>,
103}
104#[doc = "Pulse-Out n Enable Register"]
105pub mod poen;
106#[doc = "Pulse-Out n Delay Register"]
107pub struct PODLY {
108    register: ::vcell::VolatileCell<u32>,
109}
110#[doc = "Pulse-Out n Delay Register"]
111pub mod podly;
mk20d7/pdb0/mod.rs

mk20d7/pdb0/
mod.rs
