mk20d7/dma/tcd_citer_elinkno/
mod.rs1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u16,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u16,
8}
9impl super::TCD_CITER_ELINKNO {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = r" Value of the field"]
46pub struct CITERR {
47 bits: u16,
48}
49impl CITERR {
50 #[doc = r" Value of the field as raw bits"]
51 #[inline]
52 pub fn bits(&self) -> u16 {
53 self.bits
54 }
55}
56#[doc = "Possible values of the field `ELINK`"]
57#[derive(Clone, Copy, Debug, PartialEq)]
58pub enum ELINKR {
59 #[doc = "The channel-to-channel linking is disabled"]
60 _0,
61 #[doc = "The channel-to-channel linking is enabled"]
62 _1,
63}
64impl ELINKR {
65 #[doc = r" Returns `true` if the bit is clear (0)"]
66 #[inline]
67 pub fn bit_is_clear(&self) -> bool {
68 !self.bit()
69 }
70 #[doc = r" Returns `true` if the bit is set (1)"]
71 #[inline]
72 pub fn bit_is_set(&self) -> bool {
73 self.bit()
74 }
75 #[doc = r" Value of the field as raw bits"]
76 #[inline]
77 pub fn bit(&self) -> bool {
78 match *self {
79 ELINKR::_0 => false,
80 ELINKR::_1 => true,
81 }
82 }
83 #[allow(missing_docs)]
84 #[doc(hidden)]
85 #[inline]
86 pub fn _from(value: bool) -> ELINKR {
87 match value {
88 false => ELINKR::_0,
89 true => ELINKR::_1,
90 }
91 }
92 #[doc = "Checks if the value of the field is `_0`"]
93 #[inline]
94 pub fn is_0(&self) -> bool {
95 *self == ELINKR::_0
96 }
97 #[doc = "Checks if the value of the field is `_1`"]
98 #[inline]
99 pub fn is_1(&self) -> bool {
100 *self == ELINKR::_1
101 }
102}
103#[doc = r" Proxy"]
104pub struct _CITERW<'a> {
105 w: &'a mut W,
106}
107impl<'a> _CITERW<'a> {
108 #[doc = r" Writes raw bits to the field"]
109 #[inline]
110 pub unsafe fn bits(self, value: u16) -> &'a mut W {
111 const MASK: u16 = 32767;
112 const OFFSET: u8 = 0;
113 self.w.bits &= !((MASK as u16) << OFFSET);
114 self.w.bits |= ((value & MASK) as u16) << OFFSET;
115 self.w
116 }
117}
118#[doc = "Values that can be written to the field `ELINK`"]
119pub enum ELINKW {
120 #[doc = "The channel-to-channel linking is disabled"]
121 _0,
122 #[doc = "The channel-to-channel linking is enabled"]
123 _1,
124}
125impl ELINKW {
126 #[allow(missing_docs)]
127 #[doc(hidden)]
128 #[inline]
129 pub fn _bits(&self) -> bool {
130 match *self {
131 ELINKW::_0 => false,
132 ELINKW::_1 => true,
133 }
134 }
135}
136#[doc = r" Proxy"]
137pub struct _ELINKW<'a> {
138 w: &'a mut W,
139}
140impl<'a> _ELINKW<'a> {
141 #[doc = r" Writes `variant` to the field"]
142 #[inline]
143 pub fn variant(self, variant: ELINKW) -> &'a mut W {
144 {
145 self.bit(variant._bits())
146 }
147 }
148 #[doc = "The channel-to-channel linking is disabled"]
149 #[inline]
150 pub fn _0(self) -> &'a mut W {
151 self.variant(ELINKW::_0)
152 }
153 #[doc = "The channel-to-channel linking is enabled"]
154 #[inline]
155 pub fn _1(self) -> &'a mut W {
156 self.variant(ELINKW::_1)
157 }
158 #[doc = r" Sets the field bit"]
159 pub fn set_bit(self) -> &'a mut W {
160 self.bit(true)
161 }
162 #[doc = r" Clears the field bit"]
163 pub fn clear_bit(self) -> &'a mut W {
164 self.bit(false)
165 }
166 #[doc = r" Writes raw bits to the field"]
167 #[inline]
168 pub fn bit(self, value: bool) -> &'a mut W {
169 const MASK: bool = true;
170 const OFFSET: u8 = 15;
171 self.w.bits &= !((MASK as u16) << OFFSET);
172 self.w.bits |= ((value & MASK) as u16) << OFFSET;
173 self.w
174 }
175}
176impl R {
177 #[doc = r" Value of the register as raw bits"]
178 #[inline]
179 pub fn bits(&self) -> u16 {
180 self.bits
181 }
182 #[doc = "Bits 0:14 - Current Major Iteration Count"]
183 #[inline]
184 pub fn citer(&self) -> CITERR {
185 let bits = {
186 const MASK: u16 = 32767;
187 const OFFSET: u8 = 0;
188 ((self.bits >> OFFSET) & MASK as u16) as u16
189 };
190 CITERR { bits }
191 }
192 #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
193 #[inline]
194 pub fn elink(&self) -> ELINKR {
195 ELINKR::_from({
196 const MASK: bool = true;
197 const OFFSET: u8 = 15;
198 ((self.bits >> OFFSET) & MASK as u16) != 0
199 })
200 }
201}
202impl W {
203 #[doc = r" Reset value of the register"]
204 #[inline]
205 pub fn reset_value() -> W {
206 W { bits: 0 }
207 }
208 #[doc = r" Writes raw bits to the register"]
209 #[inline]
210 pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
211 self.bits = bits;
212 self
213 }
214 #[doc = "Bits 0:14 - Current Major Iteration Count"]
215 #[inline]
216 pub fn citer(&mut self) -> _CITERW {
217 _CITERW { w: self }
218 }
219 #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
220 #[inline]
221 pub fn elink(&mut self) -> _ELINKW {
222 _ELINKW { w: self }
223 }
224}