mimxrt685s_pac/adc0/
pause.rs

1#[doc = "Register `PAUSE` reader"]
2pub type R = crate::R<PauseSpec>;
3#[doc = "Register `PAUSE` writer"]
4pub type W = crate::W<PauseSpec>;
5#[doc = "Field `PAUSEDLY` reader - Pause Delay"]
6pub type PausedlyR = crate::FieldReader<u16>;
7#[doc = "Field `PAUSEDLY` writer - Pause Delay"]
8pub type PausedlyW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
9#[doc = "PAUSE Option Enable\n\nValue on reset: 0"]
10#[cfg_attr(feature = "defmt", derive(defmt::Format))]
11#[derive(Clone, Copy, Debug, PartialEq, Eq)]
12pub enum Pauseen {
13    #[doc = "0: Pause operation disabled"]
14    Pauseen0 = 0,
15    #[doc = "1: Pause operation enabled"]
16    Pauseen1 = 1,
17}
18impl From<Pauseen> for bool {
19    #[inline(always)]
20    fn from(variant: Pauseen) -> Self {
21        variant as u8 != 0
22    }
23}
24#[doc = "Field `PAUSEEN` reader - PAUSE Option Enable"]
25pub type PauseenR = crate::BitReader<Pauseen>;
26impl PauseenR {
27    #[doc = "Get enumerated values variant"]
28    #[inline(always)]
29    pub const fn variant(&self) -> Pauseen {
30        match self.bits {
31            false => Pauseen::Pauseen0,
32            true => Pauseen::Pauseen1,
33        }
34    }
35    #[doc = "Pause operation disabled"]
36    #[inline(always)]
37    pub fn is_pauseen_0(&self) -> bool {
38        *self == Pauseen::Pauseen0
39    }
40    #[doc = "Pause operation enabled"]
41    #[inline(always)]
42    pub fn is_pauseen_1(&self) -> bool {
43        *self == Pauseen::Pauseen1
44    }
45}
46#[doc = "Field `PAUSEEN` writer - PAUSE Option Enable"]
47pub type PauseenW<'a, REG> = crate::BitWriter<'a, REG, Pauseen>;
48impl<'a, REG> PauseenW<'a, REG>
49where
50    REG: crate::Writable + crate::RegisterSpec,
51{
52    #[doc = "Pause operation disabled"]
53    #[inline(always)]
54    pub fn pauseen_0(self) -> &'a mut crate::W<REG> {
55        self.variant(Pauseen::Pauseen0)
56    }
57    #[doc = "Pause operation enabled"]
58    #[inline(always)]
59    pub fn pauseen_1(self) -> &'a mut crate::W<REG> {
60        self.variant(Pauseen::Pauseen1)
61    }
62}
63impl R {
64    #[doc = "Bits 0:8 - Pause Delay"]
65    #[inline(always)]
66    pub fn pausedly(&self) -> PausedlyR {
67        PausedlyR::new((self.bits & 0x01ff) as u16)
68    }
69    #[doc = "Bit 31 - PAUSE Option Enable"]
70    #[inline(always)]
71    pub fn pauseen(&self) -> PauseenR {
72        PauseenR::new(((self.bits >> 31) & 1) != 0)
73    }
74}
75#[cfg(feature = "debug")]
76impl core::fmt::Debug for R {
77    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
78        f.debug_struct("PAUSE")
79            .field("pausedly", &self.pausedly())
80            .field("pauseen", &self.pauseen())
81            .finish()
82    }
83}
84impl W {
85    #[doc = "Bits 0:8 - Pause Delay"]
86    #[inline(always)]
87    pub fn pausedly(&mut self) -> PausedlyW<PauseSpec> {
88        PausedlyW::new(self, 0)
89    }
90    #[doc = "Bit 31 - PAUSE Option Enable"]
91    #[inline(always)]
92    pub fn pauseen(&mut self) -> PauseenW<PauseSpec> {
93        PauseenW::new(self, 31)
94    }
95}
96#[doc = "ADC Pause Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pause::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pause::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
97pub struct PauseSpec;
98impl crate::RegisterSpec for PauseSpec {
99    type Ux = u32;
100}
101#[doc = "`read()` method returns [`pause::R`](R) reader structure"]
102impl crate::Readable for PauseSpec {}
103#[doc = "`write(|w| ..)` method takes [`pause::W`](W) writer structure"]
104impl crate::Writable for PauseSpec {
105    type Safety = crate::Unsafe;
106    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
107    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
108}
109#[doc = "`reset()` method sets PAUSE to value 0"]
110impl crate::Resettable for PauseSpec {
111    const RESET_VALUE: u32 = 0;
112}
mimxrt685s_pac/adc0/pause.rs

mimxrt685s_pac/adc0/
pause.rs
