1#[doc = "Register `C0` reader"]
2pub type R = crate::R<C0Spec>;
3#[doc = "Register `C0` writer"]
4pub type W = crate::W<C0Spec>;
5#[doc = "Comparator hard block hysteresis control. See chip data sheet to get the actual hystersis value with each level\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum Hystctr {
10 #[doc = "0: The hard block output has level 0 hysteresis internally."]
11 Hystctr0 = 0,
12 #[doc = "1: The hard block output has level 1 hysteresis internally."]
13 Hystctr1 = 1,
14 #[doc = "2: The hard block output has level 2 hysteresis internally."]
15 Hystctr2 = 2,
16 #[doc = "3: The hard block output has level 3 hysteresis internally."]
17 Hystctr3 = 3,
18}
19impl From<Hystctr> for u8 {
20 #[inline(always)]
21 fn from(variant: Hystctr) -> Self {
22 variant as _
23 }
24}
25impl crate::FieldSpec for Hystctr {
26 type Ux = u8;
27}
28impl crate::IsEnum for Hystctr {}
29#[doc = "Field `HYSTCTR` reader - Comparator hard block hysteresis control. See chip data sheet to get the actual hystersis value with each level"]
30pub type HystctrR = crate::FieldReader<Hystctr>;
31impl HystctrR {
32 #[doc = "Get enumerated values variant"]
33 #[inline(always)]
34 pub const fn variant(&self) -> Hystctr {
35 match self.bits {
36 0 => Hystctr::Hystctr0,
37 1 => Hystctr::Hystctr1,
38 2 => Hystctr::Hystctr2,
39 3 => Hystctr::Hystctr3,
40 _ => unreachable!(),
41 }
42 }
43 #[doc = "The hard block output has level 0 hysteresis internally."]
44 #[inline(always)]
45 pub fn is_hystctr_0(&self) -> bool {
46 *self == Hystctr::Hystctr0
47 }
48 #[doc = "The hard block output has level 1 hysteresis internally."]
49 #[inline(always)]
50 pub fn is_hystctr_1(&self) -> bool {
51 *self == Hystctr::Hystctr1
52 }
53 #[doc = "The hard block output has level 2 hysteresis internally."]
54 #[inline(always)]
55 pub fn is_hystctr_2(&self) -> bool {
56 *self == Hystctr::Hystctr2
57 }
58 #[doc = "The hard block output has level 3 hysteresis internally."]
59 #[inline(always)]
60 pub fn is_hystctr_3(&self) -> bool {
61 *self == Hystctr::Hystctr3
62 }
63}
64#[doc = "Field `HYSTCTR` writer - Comparator hard block hysteresis control. See chip data sheet to get the actual hystersis value with each level"]
65pub type HystctrW<'a, REG> = crate::FieldWriter<'a, REG, 2, Hystctr, crate::Safe>;
66impl<'a, REG> HystctrW<'a, REG>
67where
68 REG: crate::Writable + crate::RegisterSpec,
69 REG::Ux: From<u8>,
70{
71 #[doc = "The hard block output has level 0 hysteresis internally."]
72 #[inline(always)]
73 pub fn hystctr_0(self) -> &'a mut crate::W<REG> {
74 self.variant(Hystctr::Hystctr0)
75 }
76 #[doc = "The hard block output has level 1 hysteresis internally."]
77 #[inline(always)]
78 pub fn hystctr_1(self) -> &'a mut crate::W<REG> {
79 self.variant(Hystctr::Hystctr1)
80 }
81 #[doc = "The hard block output has level 2 hysteresis internally."]
82 #[inline(always)]
83 pub fn hystctr_2(self) -> &'a mut crate::W<REG> {
84 self.variant(Hystctr::Hystctr2)
85 }
86 #[doc = "The hard block output has level 3 hysteresis internally."]
87 #[inline(always)]
88 pub fn hystctr_3(self) -> &'a mut crate::W<REG> {
89 self.variant(Hystctr::Hystctr3)
90 }
91}
92#[doc = "Filter Sample Count\n\nValue on reset: 0"]
93#[cfg_attr(feature = "defmt", derive(defmt::Format))]
94#[derive(Clone, Copy, Debug, PartialEq, Eq)]
95#[repr(u8)]
96pub enum FilterCnt {
97 #[doc = "0: Filter is disabled. If SE = 1, then COUT is a logic zero (this is not a legal state, and is not recommended). If SE = 0, COUT = COUTA."]
98 FilterCnt0 = 0,
99 #[doc = "1: 1 consecutive sample must agree (comparator output is simply sampled)."]
100 FilterCnt1 = 1,
101 #[doc = "2: 2 consecutive samples must agree."]
102 FilterCnt2 = 2,
103 #[doc = "3: 3 consecutive samples must agree."]
104 FilterCnt3 = 3,
105 #[doc = "4: 4 consecutive samples must agree."]
106 FilterCnt4 = 4,
107 #[doc = "5: 5 consecutive samples must agree."]
108 FilterCnt5 = 5,
109 #[doc = "6: 6 consecutive samples must agree."]
110 FilterCnt6 = 6,
111 #[doc = "7: 7 consecutive samples must agree."]
112 FilterCnt7 = 7,
113}
114impl From<FilterCnt> for u8 {
115 #[inline(always)]
116 fn from(variant: FilterCnt) -> Self {
117 variant as _
118 }
119}
120impl crate::FieldSpec for FilterCnt {
121 type Ux = u8;
122}
123impl crate::IsEnum for FilterCnt {}
124#[doc = "Field `FILTER_CNT` reader - Filter Sample Count"]
125pub type FilterCntR = crate::FieldReader<FilterCnt>;
126impl FilterCntR {
127 #[doc = "Get enumerated values variant"]
128 #[inline(always)]
129 pub const fn variant(&self) -> FilterCnt {
130 match self.bits {
131 0 => FilterCnt::FilterCnt0,
132 1 => FilterCnt::FilterCnt1,
133 2 => FilterCnt::FilterCnt2,
134 3 => FilterCnt::FilterCnt3,
135 4 => FilterCnt::FilterCnt4,
136 5 => FilterCnt::FilterCnt5,
137 6 => FilterCnt::FilterCnt6,
138 7 => FilterCnt::FilterCnt7,
139 _ => unreachable!(),
140 }
141 }
142 #[doc = "Filter is disabled. If SE = 1, then COUT is a logic zero (this is not a legal state, and is not recommended). If SE = 0, COUT = COUTA."]
143 #[inline(always)]
144 pub fn is_filter_cnt_0(&self) -> bool {
145 *self == FilterCnt::FilterCnt0
146 }
147 #[doc = "1 consecutive sample must agree (comparator output is simply sampled)."]
148 #[inline(always)]
149 pub fn is_filter_cnt_1(&self) -> bool {
150 *self == FilterCnt::FilterCnt1
151 }
152 #[doc = "2 consecutive samples must agree."]
153 #[inline(always)]
154 pub fn is_filter_cnt_2(&self) -> bool {
155 *self == FilterCnt::FilterCnt2
156 }
157 #[doc = "3 consecutive samples must agree."]
158 #[inline(always)]
159 pub fn is_filter_cnt_3(&self) -> bool {
160 *self == FilterCnt::FilterCnt3
161 }
162 #[doc = "4 consecutive samples must agree."]
163 #[inline(always)]
164 pub fn is_filter_cnt_4(&self) -> bool {
165 *self == FilterCnt::FilterCnt4
166 }
167 #[doc = "5 consecutive samples must agree."]
168 #[inline(always)]
169 pub fn is_filter_cnt_5(&self) -> bool {
170 *self == FilterCnt::FilterCnt5
171 }
172 #[doc = "6 consecutive samples must agree."]
173 #[inline(always)]
174 pub fn is_filter_cnt_6(&self) -> bool {
175 *self == FilterCnt::FilterCnt6
176 }
177 #[doc = "7 consecutive samples must agree."]
178 #[inline(always)]
179 pub fn is_filter_cnt_7(&self) -> bool {
180 *self == FilterCnt::FilterCnt7
181 }
182}
183#[doc = "Field `FILTER_CNT` writer - Filter Sample Count"]
184pub type FilterCntW<'a, REG> = crate::FieldWriter<'a, REG, 3, FilterCnt, crate::Safe>;
185impl<'a, REG> FilterCntW<'a, REG>
186where
187 REG: crate::Writable + crate::RegisterSpec,
188 REG::Ux: From<u8>,
189{
190 #[doc = "Filter is disabled. If SE = 1, then COUT is a logic zero (this is not a legal state, and is not recommended). If SE = 0, COUT = COUTA."]
191 #[inline(always)]
192 pub fn filter_cnt_0(self) -> &'a mut crate::W<REG> {
193 self.variant(FilterCnt::FilterCnt0)
194 }
195 #[doc = "1 consecutive sample must agree (comparator output is simply sampled)."]
196 #[inline(always)]
197 pub fn filter_cnt_1(self) -> &'a mut crate::W<REG> {
198 self.variant(FilterCnt::FilterCnt1)
199 }
200 #[doc = "2 consecutive samples must agree."]
201 #[inline(always)]
202 pub fn filter_cnt_2(self) -> &'a mut crate::W<REG> {
203 self.variant(FilterCnt::FilterCnt2)
204 }
205 #[doc = "3 consecutive samples must agree."]
206 #[inline(always)]
207 pub fn filter_cnt_3(self) -> &'a mut crate::W<REG> {
208 self.variant(FilterCnt::FilterCnt3)
209 }
210 #[doc = "4 consecutive samples must agree."]
211 #[inline(always)]
212 pub fn filter_cnt_4(self) -> &'a mut crate::W<REG> {
213 self.variant(FilterCnt::FilterCnt4)
214 }
215 #[doc = "5 consecutive samples must agree."]
216 #[inline(always)]
217 pub fn filter_cnt_5(self) -> &'a mut crate::W<REG> {
218 self.variant(FilterCnt::FilterCnt5)
219 }
220 #[doc = "6 consecutive samples must agree."]
221 #[inline(always)]
222 pub fn filter_cnt_6(self) -> &'a mut crate::W<REG> {
223 self.variant(FilterCnt::FilterCnt6)
224 }
225 #[doc = "7 consecutive samples must agree."]
226 #[inline(always)]
227 pub fn filter_cnt_7(self) -> &'a mut crate::W<REG> {
228 self.variant(FilterCnt::FilterCnt7)
229 }
230}
231#[doc = "Comparator Module Enable\n\nValue on reset: 0"]
232#[cfg_attr(feature = "defmt", derive(defmt::Format))]
233#[derive(Clone, Copy, Debug, PartialEq, Eq)]
234pub enum En {
235 #[doc = "0: Analog Comparator is disabled."]
236 En0 = 0,
237 #[doc = "1: Analog Comparator is enabled."]
238 En1 = 1,
239}
240impl From<En> for bool {
241 #[inline(always)]
242 fn from(variant: En) -> Self {
243 variant as u8 != 0
244 }
245}
246#[doc = "Field `EN` reader - Comparator Module Enable"]
247pub type EnR = crate::BitReader<En>;
248impl EnR {
249 #[doc = "Get enumerated values variant"]
250 #[inline(always)]
251 pub const fn variant(&self) -> En {
252 match self.bits {
253 false => En::En0,
254 true => En::En1,
255 }
256 }
257 #[doc = "Analog Comparator is disabled."]
258 #[inline(always)]
259 pub fn is_en_0(&self) -> bool {
260 *self == En::En0
261 }
262 #[doc = "Analog Comparator is enabled."]
263 #[inline(always)]
264 pub fn is_en_1(&self) -> bool {
265 *self == En::En1
266 }
267}
268#[doc = "Field `EN` writer - Comparator Module Enable"]
269pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>;
270impl<'a, REG> EnW<'a, REG>
271where
272 REG: crate::Writable + crate::RegisterSpec,
273{
274 #[doc = "Analog Comparator is disabled."]
275 #[inline(always)]
276 pub fn en_0(self) -> &'a mut crate::W<REG> {
277 self.variant(En::En0)
278 }
279 #[doc = "Analog Comparator is enabled."]
280 #[inline(always)]
281 pub fn en_1(self) -> &'a mut crate::W<REG> {
282 self.variant(En::En1)
283 }
284}
285#[doc = "Comparator Output Pin Enable\n\nValue on reset: 0"]
286#[cfg_attr(feature = "defmt", derive(defmt::Format))]
287#[derive(Clone, Copy, Debug, PartialEq, Eq)]
288pub enum Ope {
289 #[doc = "0: When OPE is 0, the comparator output (after window/filter settings dependent on software configuration) is not available to a packaged pin."]
290 Ope0 = 0,
291 #[doc = "1: When OPE is 1, and if the software has configured the comparator to own a packaged pin, the comparator is available in a packaged pin."]
292 Ope1 = 1,
293}
294impl From<Ope> for bool {
295 #[inline(always)]
296 fn from(variant: Ope) -> Self {
297 variant as u8 != 0
298 }
299}
300#[doc = "Field `OPE` reader - Comparator Output Pin Enable"]
301pub type OpeR = crate::BitReader<Ope>;
302impl OpeR {
303 #[doc = "Get enumerated values variant"]
304 #[inline(always)]
305 pub const fn variant(&self) -> Ope {
306 match self.bits {
307 false => Ope::Ope0,
308 true => Ope::Ope1,
309 }
310 }
311 #[doc = "When OPE is 0, the comparator output (after window/filter settings dependent on software configuration) is not available to a packaged pin."]
312 #[inline(always)]
313 pub fn is_ope_0(&self) -> bool {
314 *self == Ope::Ope0
315 }
316 #[doc = "When OPE is 1, and if the software has configured the comparator to own a packaged pin, the comparator is available in a packaged pin."]
317 #[inline(always)]
318 pub fn is_ope_1(&self) -> bool {
319 *self == Ope::Ope1
320 }
321}
322#[doc = "Field `OPE` writer - Comparator Output Pin Enable"]
323pub type OpeW<'a, REG> = crate::BitWriter<'a, REG, Ope>;
324impl<'a, REG> OpeW<'a, REG>
325where
326 REG: crate::Writable + crate::RegisterSpec,
327{
328 #[doc = "When OPE is 0, the comparator output (after window/filter settings dependent on software configuration) is not available to a packaged pin."]
329 #[inline(always)]
330 pub fn ope_0(self) -> &'a mut crate::W<REG> {
331 self.variant(Ope::Ope0)
332 }
333 #[doc = "When OPE is 1, and if the software has configured the comparator to own a packaged pin, the comparator is available in a packaged pin."]
334 #[inline(always)]
335 pub fn ope_1(self) -> &'a mut crate::W<REG> {
336 self.variant(Ope::Ope1)
337 }
338}
339#[doc = "Comparator Output Select\n\nValue on reset: 0"]
340#[cfg_attr(feature = "defmt", derive(defmt::Format))]
341#[derive(Clone, Copy, Debug, PartialEq, Eq)]
342pub enum Cos {
343 #[doc = "0: Set CMPO to equal COUT (filtered comparator output)."]
344 Cos0 = 0,
345 #[doc = "1: Set CMPO to equal COUTA (unfiltered comparator output)."]
346 Cos1 = 1,
347}
348impl From<Cos> for bool {
349 #[inline(always)]
350 fn from(variant: Cos) -> Self {
351 variant as u8 != 0
352 }
353}
354#[doc = "Field `COS` reader - Comparator Output Select"]
355pub type CosR = crate::BitReader<Cos>;
356impl CosR {
357 #[doc = "Get enumerated values variant"]
358 #[inline(always)]
359 pub const fn variant(&self) -> Cos {
360 match self.bits {
361 false => Cos::Cos0,
362 true => Cos::Cos1,
363 }
364 }
365 #[doc = "Set CMPO to equal COUT (filtered comparator output)."]
366 #[inline(always)]
367 pub fn is_cos_0(&self) -> bool {
368 *self == Cos::Cos0
369 }
370 #[doc = "Set CMPO to equal COUTA (unfiltered comparator output)."]
371 #[inline(always)]
372 pub fn is_cos_1(&self) -> bool {
373 *self == Cos::Cos1
374 }
375}
376#[doc = "Field `COS` writer - Comparator Output Select"]
377pub type CosW<'a, REG> = crate::BitWriter<'a, REG, Cos>;
378impl<'a, REG> CosW<'a, REG>
379where
380 REG: crate::Writable + crate::RegisterSpec,
381{
382 #[doc = "Set CMPO to equal COUT (filtered comparator output)."]
383 #[inline(always)]
384 pub fn cos_0(self) -> &'a mut crate::W<REG> {
385 self.variant(Cos::Cos0)
386 }
387 #[doc = "Set CMPO to equal COUTA (unfiltered comparator output)."]
388 #[inline(always)]
389 pub fn cos_1(self) -> &'a mut crate::W<REG> {
390 self.variant(Cos::Cos1)
391 }
392}
393#[doc = "Comparator invert\n\nValue on reset: 0"]
394#[cfg_attr(feature = "defmt", derive(defmt::Format))]
395#[derive(Clone, Copy, Debug, PartialEq, Eq)]
396pub enum Invt {
397 #[doc = "0: Does not invert the comparator output."]
398 Invt0 = 0,
399 #[doc = "1: Inverts the comparator output."]
400 Invt1 = 1,
401}
402impl From<Invt> for bool {
403 #[inline(always)]
404 fn from(variant: Invt) -> Self {
405 variant as u8 != 0
406 }
407}
408#[doc = "Field `INVT` reader - Comparator invert"]
409pub type InvtR = crate::BitReader<Invt>;
410impl InvtR {
411 #[doc = "Get enumerated values variant"]
412 #[inline(always)]
413 pub const fn variant(&self) -> Invt {
414 match self.bits {
415 false => Invt::Invt0,
416 true => Invt::Invt1,
417 }
418 }
419 #[doc = "Does not invert the comparator output."]
420 #[inline(always)]
421 pub fn is_invt_0(&self) -> bool {
422 *self == Invt::Invt0
423 }
424 #[doc = "Inverts the comparator output."]
425 #[inline(always)]
426 pub fn is_invt_1(&self) -> bool {
427 *self == Invt::Invt1
428 }
429}
430#[doc = "Field `INVT` writer - Comparator invert"]
431pub type InvtW<'a, REG> = crate::BitWriter<'a, REG, Invt>;
432impl<'a, REG> InvtW<'a, REG>
433where
434 REG: crate::Writable + crate::RegisterSpec,
435{
436 #[doc = "Does not invert the comparator output."]
437 #[inline(always)]
438 pub fn invt_0(self) -> &'a mut crate::W<REG> {
439 self.variant(Invt::Invt0)
440 }
441 #[doc = "Inverts the comparator output."]
442 #[inline(always)]
443 pub fn invt_1(self) -> &'a mut crate::W<REG> {
444 self.variant(Invt::Invt1)
445 }
446}
447#[doc = "Power Mode Select\n\nValue on reset: 0"]
448#[cfg_attr(feature = "defmt", derive(defmt::Format))]
449#[derive(Clone, Copy, Debug, PartialEq, Eq)]
450pub enum Pmode {
451 #[doc = "0: Low Speed (LS) comparison mode is selected."]
452 Pmode0 = 0,
453 #[doc = "1: High Speed (HS) comparison mode is selected."]
454 Pmode1 = 1,
455}
456impl From<Pmode> for bool {
457 #[inline(always)]
458 fn from(variant: Pmode) -> Self {
459 variant as u8 != 0
460 }
461}
462#[doc = "Field `PMODE` reader - Power Mode Select"]
463pub type PmodeR = crate::BitReader<Pmode>;
464impl PmodeR {
465 #[doc = "Get enumerated values variant"]
466 #[inline(always)]
467 pub const fn variant(&self) -> Pmode {
468 match self.bits {
469 false => Pmode::Pmode0,
470 true => Pmode::Pmode1,
471 }
472 }
473 #[doc = "Low Speed (LS) comparison mode is selected."]
474 #[inline(always)]
475 pub fn is_pmode_0(&self) -> bool {
476 *self == Pmode::Pmode0
477 }
478 #[doc = "High Speed (HS) comparison mode is selected."]
479 #[inline(always)]
480 pub fn is_pmode_1(&self) -> bool {
481 *self == Pmode::Pmode1
482 }
483}
484#[doc = "Field `PMODE` writer - Power Mode Select"]
485pub type PmodeW<'a, REG> = crate::BitWriter<'a, REG, Pmode>;
486impl<'a, REG> PmodeW<'a, REG>
487where
488 REG: crate::Writable + crate::RegisterSpec,
489{
490 #[doc = "Low Speed (LS) comparison mode is selected."]
491 #[inline(always)]
492 pub fn pmode_0(self) -> &'a mut crate::W<REG> {
493 self.variant(Pmode::Pmode0)
494 }
495 #[doc = "High Speed (HS) comparison mode is selected."]
496 #[inline(always)]
497 pub fn pmode_1(self) -> &'a mut crate::W<REG> {
498 self.variant(Pmode::Pmode1)
499 }
500}
501#[doc = "Windowing Enable\n\nValue on reset: 0"]
502#[cfg_attr(feature = "defmt", derive(defmt::Format))]
503#[derive(Clone, Copy, Debug, PartialEq, Eq)]
504pub enum We {
505 #[doc = "0: Windowing mode is not selected."]
506 We0 = 0,
507 #[doc = "1: Windowing mode is selected."]
508 We1 = 1,
509}
510impl From<We> for bool {
511 #[inline(always)]
512 fn from(variant: We) -> Self {
513 variant as u8 != 0
514 }
515}
516#[doc = "Field `WE` reader - Windowing Enable"]
517pub type WeR = crate::BitReader<We>;
518impl WeR {
519 #[doc = "Get enumerated values variant"]
520 #[inline(always)]
521 pub const fn variant(&self) -> We {
522 match self.bits {
523 false => We::We0,
524 true => We::We1,
525 }
526 }
527 #[doc = "Windowing mode is not selected."]
528 #[inline(always)]
529 pub fn is_we_0(&self) -> bool {
530 *self == We::We0
531 }
532 #[doc = "Windowing mode is selected."]
533 #[inline(always)]
534 pub fn is_we_1(&self) -> bool {
535 *self == We::We1
536 }
537}
538#[doc = "Field `WE` writer - Windowing Enable"]
539pub type WeW<'a, REG> = crate::BitWriter<'a, REG, We>;
540impl<'a, REG> WeW<'a, REG>
541where
542 REG: crate::Writable + crate::RegisterSpec,
543{
544 #[doc = "Windowing mode is not selected."]
545 #[inline(always)]
546 pub fn we_0(self) -> &'a mut crate::W<REG> {
547 self.variant(We::We0)
548 }
549 #[doc = "Windowing mode is selected."]
550 #[inline(always)]
551 pub fn we_1(self) -> &'a mut crate::W<REG> {
552 self.variant(We::We1)
553 }
554}
555#[doc = "Sample Enable\n\nValue on reset: 0"]
556#[cfg_attr(feature = "defmt", derive(defmt::Format))]
557#[derive(Clone, Copy, Debug, PartialEq, Eq)]
558pub enum Se {
559 #[doc = "0: Sampling mode is not selected."]
560 Se0 = 0,
561 #[doc = "1: Sampling mode is selected."]
562 Se1 = 1,
563}
564impl From<Se> for bool {
565 #[inline(always)]
566 fn from(variant: Se) -> Self {
567 variant as u8 != 0
568 }
569}
570#[doc = "Field `SE` reader - Sample Enable"]
571pub type SeR = crate::BitReader<Se>;
572impl SeR {
573 #[doc = "Get enumerated values variant"]
574 #[inline(always)]
575 pub const fn variant(&self) -> Se {
576 match self.bits {
577 false => Se::Se0,
578 true => Se::Se1,
579 }
580 }
581 #[doc = "Sampling mode is not selected."]
582 #[inline(always)]
583 pub fn is_se_0(&self) -> bool {
584 *self == Se::Se0
585 }
586 #[doc = "Sampling mode is selected."]
587 #[inline(always)]
588 pub fn is_se_1(&self) -> bool {
589 *self == Se::Se1
590 }
591}
592#[doc = "Field `SE` writer - Sample Enable"]
593pub type SeW<'a, REG> = crate::BitWriter<'a, REG, Se>;
594impl<'a, REG> SeW<'a, REG>
595where
596 REG: crate::Writable + crate::RegisterSpec,
597{
598 #[doc = "Sampling mode is not selected."]
599 #[inline(always)]
600 pub fn se_0(self) -> &'a mut crate::W<REG> {
601 self.variant(Se::Se0)
602 }
603 #[doc = "Sampling mode is selected."]
604 #[inline(always)]
605 pub fn se_1(self) -> &'a mut crate::W<REG> {
606 self.variant(Se::Se1)
607 }
608}
609#[doc = "Field `FPR` reader - Filter Sample Period"]
610pub type FprR = crate::FieldReader;
611#[doc = "Field `FPR` writer - Filter Sample Period"]
612pub type FprW<'a, REG> = crate::FieldWriter<'a, REG, 8>;
613#[doc = "Field `COUT` reader - Analog Comparator Output"]
614pub type CoutR = crate::BitReader;
615#[doc = "Analog Comparator Flag Falling\n\nValue on reset: 0"]
616#[cfg_attr(feature = "defmt", derive(defmt::Format))]
617#[derive(Clone, Copy, Debug, PartialEq, Eq)]
618pub enum Cff {
619 #[doc = "0: A falling edge has not been detected on COUT."]
620 Cff0 = 0,
621 #[doc = "1: A falling edge on COUT has occurred."]
622 Cff1 = 1,
623}
624impl From<Cff> for bool {
625 #[inline(always)]
626 fn from(variant: Cff) -> Self {
627 variant as u8 != 0
628 }
629}
630#[doc = "Field `CFF` reader - Analog Comparator Flag Falling"]
631pub type CffR = crate::BitReader<Cff>;
632impl CffR {
633 #[doc = "Get enumerated values variant"]
634 #[inline(always)]
635 pub const fn variant(&self) -> Cff {
636 match self.bits {
637 false => Cff::Cff0,
638 true => Cff::Cff1,
639 }
640 }
641 #[doc = "A falling edge has not been detected on COUT."]
642 #[inline(always)]
643 pub fn is_cff_0(&self) -> bool {
644 *self == Cff::Cff0
645 }
646 #[doc = "A falling edge on COUT has occurred."]
647 #[inline(always)]
648 pub fn is_cff_1(&self) -> bool {
649 *self == Cff::Cff1
650 }
651}
652#[doc = "Field `CFF` writer - Analog Comparator Flag Falling"]
653pub type CffW<'a, REG> = crate::BitWriter1C<'a, REG, Cff>;
654impl<'a, REG> CffW<'a, REG>
655where
656 REG: crate::Writable + crate::RegisterSpec,
657{
658 #[doc = "A falling edge has not been detected on COUT."]
659 #[inline(always)]
660 pub fn cff_0(self) -> &'a mut crate::W<REG> {
661 self.variant(Cff::Cff0)
662 }
663 #[doc = "A falling edge on COUT has occurred."]
664 #[inline(always)]
665 pub fn cff_1(self) -> &'a mut crate::W<REG> {
666 self.variant(Cff::Cff1)
667 }
668}
669#[doc = "Analog Comparator Flag Rising\n\nValue on reset: 0"]
670#[cfg_attr(feature = "defmt", derive(defmt::Format))]
671#[derive(Clone, Copy, Debug, PartialEq, Eq)]
672pub enum Cfr {
673 #[doc = "0: A rising edge has not been detected on COUT."]
674 Cfr0 = 0,
675 #[doc = "1: A rising edge on COUT has occurred."]
676 Cfr1 = 1,
677}
678impl From<Cfr> for bool {
679 #[inline(always)]
680 fn from(variant: Cfr) -> Self {
681 variant as u8 != 0
682 }
683}
684#[doc = "Field `CFR` reader - Analog Comparator Flag Rising"]
685pub type CfrR = crate::BitReader<Cfr>;
686impl CfrR {
687 #[doc = "Get enumerated values variant"]
688 #[inline(always)]
689 pub const fn variant(&self) -> Cfr {
690 match self.bits {
691 false => Cfr::Cfr0,
692 true => Cfr::Cfr1,
693 }
694 }
695 #[doc = "A rising edge has not been detected on COUT."]
696 #[inline(always)]
697 pub fn is_cfr_0(&self) -> bool {
698 *self == Cfr::Cfr0
699 }
700 #[doc = "A rising edge on COUT has occurred."]
701 #[inline(always)]
702 pub fn is_cfr_1(&self) -> bool {
703 *self == Cfr::Cfr1
704 }
705}
706#[doc = "Field `CFR` writer - Analog Comparator Flag Rising"]
707pub type CfrW<'a, REG> = crate::BitWriter1C<'a, REG, Cfr>;
708impl<'a, REG> CfrW<'a, REG>
709where
710 REG: crate::Writable + crate::RegisterSpec,
711{
712 #[doc = "A rising edge has not been detected on COUT."]
713 #[inline(always)]
714 pub fn cfr_0(self) -> &'a mut crate::W<REG> {
715 self.variant(Cfr::Cfr0)
716 }
717 #[doc = "A rising edge on COUT has occurred."]
718 #[inline(always)]
719 pub fn cfr_1(self) -> &'a mut crate::W<REG> {
720 self.variant(Cfr::Cfr1)
721 }
722}
723#[doc = "Comparator Interrupt Enable Falling\n\nValue on reset: 0"]
724#[cfg_attr(feature = "defmt", derive(defmt::Format))]
725#[derive(Clone, Copy, Debug, PartialEq, Eq)]
726pub enum Ief {
727 #[doc = "0: Interrupt is disabled."]
728 Ief0 = 0,
729 #[doc = "1: Interrupt is enabled."]
730 Ief1 = 1,
731}
732impl From<Ief> for bool {
733 #[inline(always)]
734 fn from(variant: Ief) -> Self {
735 variant as u8 != 0
736 }
737}
738#[doc = "Field `IEF` reader - Comparator Interrupt Enable Falling"]
739pub type IefR = crate::BitReader<Ief>;
740impl IefR {
741 #[doc = "Get enumerated values variant"]
742 #[inline(always)]
743 pub const fn variant(&self) -> Ief {
744 match self.bits {
745 false => Ief::Ief0,
746 true => Ief::Ief1,
747 }
748 }
749 #[doc = "Interrupt is disabled."]
750 #[inline(always)]
751 pub fn is_ief_0(&self) -> bool {
752 *self == Ief::Ief0
753 }
754 #[doc = "Interrupt is enabled."]
755 #[inline(always)]
756 pub fn is_ief_1(&self) -> bool {
757 *self == Ief::Ief1
758 }
759}
760#[doc = "Field `IEF` writer - Comparator Interrupt Enable Falling"]
761pub type IefW<'a, REG> = crate::BitWriter<'a, REG, Ief>;
762impl<'a, REG> IefW<'a, REG>
763where
764 REG: crate::Writable + crate::RegisterSpec,
765{
766 #[doc = "Interrupt is disabled."]
767 #[inline(always)]
768 pub fn ief_0(self) -> &'a mut crate::W<REG> {
769 self.variant(Ief::Ief0)
770 }
771 #[doc = "Interrupt is enabled."]
772 #[inline(always)]
773 pub fn ief_1(self) -> &'a mut crate::W<REG> {
774 self.variant(Ief::Ief1)
775 }
776}
777#[doc = "Comparator Interrupt Enable Rising\n\nValue on reset: 0"]
778#[cfg_attr(feature = "defmt", derive(defmt::Format))]
779#[derive(Clone, Copy, Debug, PartialEq, Eq)]
780pub enum Ier {
781 #[doc = "0: Interrupt is disabled."]
782 Ier0 = 0,
783 #[doc = "1: Interrupt is enabled."]
784 Ier1 = 1,
785}
786impl From<Ier> for bool {
787 #[inline(always)]
788 fn from(variant: Ier) -> Self {
789 variant as u8 != 0
790 }
791}
792#[doc = "Field `IER` reader - Comparator Interrupt Enable Rising"]
793pub type IerR = crate::BitReader<Ier>;
794impl IerR {
795 #[doc = "Get enumerated values variant"]
796 #[inline(always)]
797 pub const fn variant(&self) -> Ier {
798 match self.bits {
799 false => Ier::Ier0,
800 true => Ier::Ier1,
801 }
802 }
803 #[doc = "Interrupt is disabled."]
804 #[inline(always)]
805 pub fn is_ier_0(&self) -> bool {
806 *self == Ier::Ier0
807 }
808 #[doc = "Interrupt is enabled."]
809 #[inline(always)]
810 pub fn is_ier_1(&self) -> bool {
811 *self == Ier::Ier1
812 }
813}
814#[doc = "Field `IER` writer - Comparator Interrupt Enable Rising"]
815pub type IerW<'a, REG> = crate::BitWriter<'a, REG, Ier>;
816impl<'a, REG> IerW<'a, REG>
817where
818 REG: crate::Writable + crate::RegisterSpec,
819{
820 #[doc = "Interrupt is disabled."]
821 #[inline(always)]
822 pub fn ier_0(self) -> &'a mut crate::W<REG> {
823 self.variant(Ier::Ier0)
824 }
825 #[doc = "Interrupt is enabled."]
826 #[inline(always)]
827 pub fn ier_1(self) -> &'a mut crate::W<REG> {
828 self.variant(Ier::Ier1)
829 }
830}
831#[doc = "DMA Enable\n\nValue on reset: 0"]
832#[cfg_attr(feature = "defmt", derive(defmt::Format))]
833#[derive(Clone, Copy, Debug, PartialEq, Eq)]
834pub enum Dmaen {
835 #[doc = "0: DMA is disabled."]
836 Dmaen0 = 0,
837 #[doc = "1: DMA is enabled."]
838 Dmaen1 = 1,
839}
840impl From<Dmaen> for bool {
841 #[inline(always)]
842 fn from(variant: Dmaen) -> Self {
843 variant as u8 != 0
844 }
845}
846#[doc = "Field `DMAEN` reader - DMA Enable"]
847pub type DmaenR = crate::BitReader<Dmaen>;
848impl DmaenR {
849 #[doc = "Get enumerated values variant"]
850 #[inline(always)]
851 pub const fn variant(&self) -> Dmaen {
852 match self.bits {
853 false => Dmaen::Dmaen0,
854 true => Dmaen::Dmaen1,
855 }
856 }
857 #[doc = "DMA is disabled."]
858 #[inline(always)]
859 pub fn is_dmaen_0(&self) -> bool {
860 *self == Dmaen::Dmaen0
861 }
862 #[doc = "DMA is enabled."]
863 #[inline(always)]
864 pub fn is_dmaen_1(&self) -> bool {
865 *self == Dmaen::Dmaen1
866 }
867}
868#[doc = "Field `DMAEN` writer - DMA Enable"]
869pub type DmaenW<'a, REG> = crate::BitWriter<'a, REG, Dmaen>;
870impl<'a, REG> DmaenW<'a, REG>
871where
872 REG: crate::Writable + crate::RegisterSpec,
873{
874 #[doc = "DMA is disabled."]
875 #[inline(always)]
876 pub fn dmaen_0(self) -> &'a mut crate::W<REG> {
877 self.variant(Dmaen::Dmaen0)
878 }
879 #[doc = "DMA is enabled."]
880 #[inline(always)]
881 pub fn dmaen_1(self) -> &'a mut crate::W<REG> {
882 self.variant(Dmaen::Dmaen1)
883 }
884}
885#[doc = "CMP to DAC link enable.\n\nValue on reset: 0"]
886#[cfg_attr(feature = "defmt", derive(defmt::Format))]
887#[derive(Clone, Copy, Debug, PartialEq, Eq)]
888pub enum Linken {
889 #[doc = "0: CMP to DAC link is disabled"]
890 Linken0 = 0,
891 #[doc = "1: CMP to DAC link is enabled."]
892 Linken1 = 1,
893}
894impl From<Linken> for bool {
895 #[inline(always)]
896 fn from(variant: Linken) -> Self {
897 variant as u8 != 0
898 }
899}
900#[doc = "Field `LINKEN` reader - CMP to DAC link enable."]
901pub type LinkenR = crate::BitReader<Linken>;
902impl LinkenR {
903 #[doc = "Get enumerated values variant"]
904 #[inline(always)]
905 pub const fn variant(&self) -> Linken {
906 match self.bits {
907 false => Linken::Linken0,
908 true => Linken::Linken1,
909 }
910 }
911 #[doc = "CMP to DAC link is disabled"]
912 #[inline(always)]
913 pub fn is_linken_0(&self) -> bool {
914 *self == Linken::Linken0
915 }
916 #[doc = "CMP to DAC link is enabled."]
917 #[inline(always)]
918 pub fn is_linken_1(&self) -> bool {
919 *self == Linken::Linken1
920 }
921}
922#[doc = "Field `LINKEN` writer - CMP to DAC link enable."]
923pub type LinkenW<'a, REG> = crate::BitWriter<'a, REG, Linken>;
924impl<'a, REG> LinkenW<'a, REG>
925where
926 REG: crate::Writable + crate::RegisterSpec,
927{
928 #[doc = "CMP to DAC link is disabled"]
929 #[inline(always)]
930 pub fn linken_0(self) -> &'a mut crate::W<REG> {
931 self.variant(Linken::Linken0)
932 }
933 #[doc = "CMP to DAC link is enabled."]
934 #[inline(always)]
935 pub fn linken_1(self) -> &'a mut crate::W<REG> {
936 self.variant(Linken::Linken1)
937 }
938}
939impl R {
940 #[doc = "Bits 0:1 - Comparator hard block hysteresis control. See chip data sheet to get the actual hystersis value with each level"]
941 #[inline(always)]
942 pub fn hystctr(&self) -> HystctrR {
943 HystctrR::new((self.bits & 3) as u8)
944 }
945 #[doc = "Bits 4:6 - Filter Sample Count"]
946 #[inline(always)]
947 pub fn filter_cnt(&self) -> FilterCntR {
948 FilterCntR::new(((self.bits >> 4) & 7) as u8)
949 }
950 #[doc = "Bit 8 - Comparator Module Enable"]
951 #[inline(always)]
952 pub fn en(&self) -> EnR {
953 EnR::new(((self.bits >> 8) & 1) != 0)
954 }
955 #[doc = "Bit 9 - Comparator Output Pin Enable"]
956 #[inline(always)]
957 pub fn ope(&self) -> OpeR {
958 OpeR::new(((self.bits >> 9) & 1) != 0)
959 }
960 #[doc = "Bit 10 - Comparator Output Select"]
961 #[inline(always)]
962 pub fn cos(&self) -> CosR {
963 CosR::new(((self.bits >> 10) & 1) != 0)
964 }
965 #[doc = "Bit 11 - Comparator invert"]
966 #[inline(always)]
967 pub fn invt(&self) -> InvtR {
968 InvtR::new(((self.bits >> 11) & 1) != 0)
969 }
970 #[doc = "Bit 12 - Power Mode Select"]
971 #[inline(always)]
972 pub fn pmode(&self) -> PmodeR {
973 PmodeR::new(((self.bits >> 12) & 1) != 0)
974 }
975 #[doc = "Bit 14 - Windowing Enable"]
976 #[inline(always)]
977 pub fn we(&self) -> WeR {
978 WeR::new(((self.bits >> 14) & 1) != 0)
979 }
980 #[doc = "Bit 15 - Sample Enable"]
981 #[inline(always)]
982 pub fn se(&self) -> SeR {
983 SeR::new(((self.bits >> 15) & 1) != 0)
984 }
985 #[doc = "Bits 16:23 - Filter Sample Period"]
986 #[inline(always)]
987 pub fn fpr(&self) -> FprR {
988 FprR::new(((self.bits >> 16) & 0xff) as u8)
989 }
990 #[doc = "Bit 24 - Analog Comparator Output"]
991 #[inline(always)]
992 pub fn cout(&self) -> CoutR {
993 CoutR::new(((self.bits >> 24) & 1) != 0)
994 }
995 #[doc = "Bit 25 - Analog Comparator Flag Falling"]
996 #[inline(always)]
997 pub fn cff(&self) -> CffR {
998 CffR::new(((self.bits >> 25) & 1) != 0)
999 }
1000 #[doc = "Bit 26 - Analog Comparator Flag Rising"]
1001 #[inline(always)]
1002 pub fn cfr(&self) -> CfrR {
1003 CfrR::new(((self.bits >> 26) & 1) != 0)
1004 }
1005 #[doc = "Bit 27 - Comparator Interrupt Enable Falling"]
1006 #[inline(always)]
1007 pub fn ief(&self) -> IefR {
1008 IefR::new(((self.bits >> 27) & 1) != 0)
1009 }
1010 #[doc = "Bit 28 - Comparator Interrupt Enable Rising"]
1011 #[inline(always)]
1012 pub fn ier(&self) -> IerR {
1013 IerR::new(((self.bits >> 28) & 1) != 0)
1014 }
1015 #[doc = "Bit 30 - DMA Enable"]
1016 #[inline(always)]
1017 pub fn dmaen(&self) -> DmaenR {
1018 DmaenR::new(((self.bits >> 30) & 1) != 0)
1019 }
1020 #[doc = "Bit 31 - CMP to DAC link enable."]
1021 #[inline(always)]
1022 pub fn linken(&self) -> LinkenR {
1023 LinkenR::new(((self.bits >> 31) & 1) != 0)
1024 }
1025}
1026#[cfg(feature = "debug")]
1027impl core::fmt::Debug for R {
1028 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1029 f.debug_struct("C0")
1030 .field("hystctr", &self.hystctr())
1031 .field("filter_cnt", &self.filter_cnt())
1032 .field("en", &self.en())
1033 .field("ope", &self.ope())
1034 .field("cos", &self.cos())
1035 .field("invt", &self.invt())
1036 .field("pmode", &self.pmode())
1037 .field("we", &self.we())
1038 .field("se", &self.se())
1039 .field("fpr", &self.fpr())
1040 .field("cout", &self.cout())
1041 .field("cff", &self.cff())
1042 .field("cfr", &self.cfr())
1043 .field("ief", &self.ief())
1044 .field("ier", &self.ier())
1045 .field("dmaen", &self.dmaen())
1046 .field("linken", &self.linken())
1047 .finish()
1048 }
1049}
1050impl W {
1051 #[doc = "Bits 0:1 - Comparator hard block hysteresis control. See chip data sheet to get the actual hystersis value with each level"]
1052 #[inline(always)]
1053 pub fn hystctr(&mut self) -> HystctrW<C0Spec> {
1054 HystctrW::new(self, 0)
1055 }
1056 #[doc = "Bits 4:6 - Filter Sample Count"]
1057 #[inline(always)]
1058 pub fn filter_cnt(&mut self) -> FilterCntW<C0Spec> {
1059 FilterCntW::new(self, 4)
1060 }
1061 #[doc = "Bit 8 - Comparator Module Enable"]
1062 #[inline(always)]
1063 pub fn en(&mut self) -> EnW<C0Spec> {
1064 EnW::new(self, 8)
1065 }
1066 #[doc = "Bit 9 - Comparator Output Pin Enable"]
1067 #[inline(always)]
1068 pub fn ope(&mut self) -> OpeW<C0Spec> {
1069 OpeW::new(self, 9)
1070 }
1071 #[doc = "Bit 10 - Comparator Output Select"]
1072 #[inline(always)]
1073 pub fn cos(&mut self) -> CosW<C0Spec> {
1074 CosW::new(self, 10)
1075 }
1076 #[doc = "Bit 11 - Comparator invert"]
1077 #[inline(always)]
1078 pub fn invt(&mut self) -> InvtW<C0Spec> {
1079 InvtW::new(self, 11)
1080 }
1081 #[doc = "Bit 12 - Power Mode Select"]
1082 #[inline(always)]
1083 pub fn pmode(&mut self) -> PmodeW<C0Spec> {
1084 PmodeW::new(self, 12)
1085 }
1086 #[doc = "Bit 14 - Windowing Enable"]
1087 #[inline(always)]
1088 pub fn we(&mut self) -> WeW<C0Spec> {
1089 WeW::new(self, 14)
1090 }
1091 #[doc = "Bit 15 - Sample Enable"]
1092 #[inline(always)]
1093 pub fn se(&mut self) -> SeW<C0Spec> {
1094 SeW::new(self, 15)
1095 }
1096 #[doc = "Bits 16:23 - Filter Sample Period"]
1097 #[inline(always)]
1098 pub fn fpr(&mut self) -> FprW<C0Spec> {
1099 FprW::new(self, 16)
1100 }
1101 #[doc = "Bit 25 - Analog Comparator Flag Falling"]
1102 #[inline(always)]
1103 pub fn cff(&mut self) -> CffW<C0Spec> {
1104 CffW::new(self, 25)
1105 }
1106 #[doc = "Bit 26 - Analog Comparator Flag Rising"]
1107 #[inline(always)]
1108 pub fn cfr(&mut self) -> CfrW<C0Spec> {
1109 CfrW::new(self, 26)
1110 }
1111 #[doc = "Bit 27 - Comparator Interrupt Enable Falling"]
1112 #[inline(always)]
1113 pub fn ief(&mut self) -> IefW<C0Spec> {
1114 IefW::new(self, 27)
1115 }
1116 #[doc = "Bit 28 - Comparator Interrupt Enable Rising"]
1117 #[inline(always)]
1118 pub fn ier(&mut self) -> IerW<C0Spec> {
1119 IerW::new(self, 28)
1120 }
1121 #[doc = "Bit 30 - DMA Enable"]
1122 #[inline(always)]
1123 pub fn dmaen(&mut self) -> DmaenW<C0Spec> {
1124 DmaenW::new(self, 30)
1125 }
1126 #[doc = "Bit 31 - CMP to DAC link enable."]
1127 #[inline(always)]
1128 pub fn linken(&mut self) -> LinkenW<C0Spec> {
1129 LinkenW::new(self, 31)
1130 }
1131}
1132#[doc = "CMP Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`c0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`c0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
1133pub struct C0Spec;
1134impl crate::RegisterSpec for C0Spec {
1135 type Ux = u32;
1136}
1137#[doc = "`read()` method returns [`c0::R`](R) reader structure"]
1138impl crate::Readable for C0Spec {}
1139#[doc = "`write(|w| ..)` method takes [`c0::W`](W) writer structure"]
1140impl crate::Writable for C0Spec {
1141 type Safety = crate::Unsafe;
1142 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
1143 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x0600_0000;
1144}
1145#[doc = "`reset()` method sets C0 to value 0"]
1146impl crate::Resettable for C0Spec {
1147 const RESET_VALUE: u32 = 0;
1148}