mimxrt685s_pac/clkctl0/
usbhsfclksel.rs

1#[doc = "Register `USBHSFCLKSEL` reader"]
2pub type R = crate::R<UsbhsfclkselSpec>;
3#[doc = "Register `USBHSFCLKSEL` writer"]
4pub type W = crate::W<UsbhsfclkselSpec>;
5#[doc = "USB HS Functional Clock Source Selection. . .\n\nValue on reset: 7"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum Sel {
10    #[doc = "0: XTALIN Clock."]
11    XtalinClk = 0,
12    #[doc = "1: Main Clock."]
13    MainClk = 1,
14    #[doc = "7: None, this may be selected in order to reduce power when no output is needed."]
15    None = 7,
16}
17impl From<Sel> for u8 {
18    #[inline(always)]
19    fn from(variant: Sel) -> Self {
20        variant as _
21    }
22}
23impl crate::FieldSpec for Sel {
24    type Ux = u8;
25}
26impl crate::IsEnum for Sel {}
27#[doc = "Field `SEL` reader - USB HS Functional Clock Source Selection. . ."]
28pub type SelR = crate::FieldReader<Sel>;
29impl SelR {
30    #[doc = "Get enumerated values variant"]
31    #[inline(always)]
32    pub const fn variant(&self) -> Option<Sel> {
33        match self.bits {
34            0 => Some(Sel::XtalinClk),
35            1 => Some(Sel::MainClk),
36            7 => Some(Sel::None),
37            _ => None,
38        }
39    }
40    #[doc = "XTALIN Clock."]
41    #[inline(always)]
42    pub fn is_xtalin_clk(&self) -> bool {
43        *self == Sel::XtalinClk
44    }
45    #[doc = "Main Clock."]
46    #[inline(always)]
47    pub fn is_main_clk(&self) -> bool {
48        *self == Sel::MainClk
49    }
50    #[doc = "None, this may be selected in order to reduce power when no output is needed."]
51    #[inline(always)]
52    pub fn is_none(&self) -> bool {
53        *self == Sel::None
54    }
55}
56#[doc = "Field `SEL` writer - USB HS Functional Clock Source Selection. . ."]
57pub type SelW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sel>;
58impl<'a, REG> SelW<'a, REG>
59where
60    REG: crate::Writable + crate::RegisterSpec,
61    REG::Ux: From<u8>,
62{
63    #[doc = "XTALIN Clock."]
64    #[inline(always)]
65    pub fn xtalin_clk(self) -> &'a mut crate::W<REG> {
66        self.variant(Sel::XtalinClk)
67    }
68    #[doc = "Main Clock."]
69    #[inline(always)]
70    pub fn main_clk(self) -> &'a mut crate::W<REG> {
71        self.variant(Sel::MainClk)
72    }
73    #[doc = "None, this may be selected in order to reduce power when no output is needed."]
74    #[inline(always)]
75    pub fn none(self) -> &'a mut crate::W<REG> {
76        self.variant(Sel::None)
77    }
78}
79impl R {
80    #[doc = "Bits 0:2 - USB HS Functional Clock Source Selection. . ."]
81    #[inline(always)]
82    pub fn sel(&self) -> SelR {
83        SelR::new((self.bits & 7) as u8)
84    }
85}
86#[cfg(feature = "debug")]
87impl core::fmt::Debug for R {
88    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
89        f.debug_struct("USBHSFCLKSEL")
90            .field("sel", &self.sel())
91            .finish()
92    }
93}
94impl W {
95    #[doc = "Bits 0:2 - USB HS Functional Clock Source Selection. . ."]
96    #[inline(always)]
97    pub fn sel(&mut self) -> SelW<UsbhsfclkselSpec> {
98        SelW::new(self, 0)
99    }
100}
101#[doc = "USBHS Fclk selection\n\nYou can [`read`](crate::Reg::read) this register and get [`usbhsfclksel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usbhsfclksel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
102pub struct UsbhsfclkselSpec;
103impl crate::RegisterSpec for UsbhsfclkselSpec {
104    type Ux = u32;
105}
106#[doc = "`read()` method returns [`usbhsfclksel::R`](R) reader structure"]
107impl crate::Readable for UsbhsfclkselSpec {}
108#[doc = "`write(|w| ..)` method takes [`usbhsfclksel::W`](W) writer structure"]
109impl crate::Writable for UsbhsfclkselSpec {
110    type Safety = crate::Unsafe;
111    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
112    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
113}
114#[doc = "`reset()` method sets USBHSFCLKSEL to value 0x07"]
115impl crate::Resettable for UsbhsfclkselSpec {
116    const RESET_VALUE: u32 = 0x07;
117}
mimxrt685s_pac/clkctl0/usbhsfclksel.rs

mimxrt685s_pac/clkctl0/
usbhsfclksel.rs
