mimxrt685s_pac/
sysctl0.rs

1#[repr(C)]
2#[cfg_attr(feature = "debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    _reserved0: [u8; 0x0c],
6    dspstall: Dspstall,
7    ahbmatrixprior: Ahbmatrixprior,
8    packerenable: Packerenable,
9    _reserved3: [u8; 0x18],
10    m33nmisrcsel: M33nmisrcsel,
11    system_stick_calib: SystemStickCalib,
12    system_nstick_calib: SystemNstickCalib,
13    _reserved6: [u8; 0x24],
14    product_id: ProductId,
15    siliconrev_id: SiliconrevId,
16    jtag_id: JtagId,
17    _reserved9: [u8; 0x14],
18    autoclkgateoverride0: Autoclkgateoverride0,
19    autoclkgateoverride1: Autoclkgateoverride1,
20    _reserved11: [u8; 0x18],
21    clkgateoverride0: Clkgateoverride0,
22    _reserved12: [u8; 0x5c],
23    ahb_sram_access_disable: AhbSramAccessDisable,
24    dsp_sram_access_disable: DspSramAccessDisable,
25    _reserved14: [u8; 0x30],
26    ahb_flexspi_access_disable: AhbFlexspiAccessDisable,
27    dsp_flexspi_access_disable: DspFlexspiAccessDisable,
28    _reserved16: [u8; 0x0240],
29    flexspi_bootrom_scratch0: FlexspiBootromScratch0,
30    _reserved17: [u8; 0x88],
31    usbclkctrl: Usbclkctrl,
32    usbclkstat: Usbclkstat,
33    usbphypll0locktimediv2: Usbphypll0locktimediv2,
34    _reserved20: [u8; 0x01e8],
35    pdsleepcfg0: Pdsleepcfg0,
36    pdsleepcfg1: Pdsleepcfg1,
37    pdsleepcfg2: Pdsleepcfg2,
38    pdsleepcfg3: Pdsleepcfg3,
39    pdruncfg0: Pdruncfg0,
40    pdruncfg1: Pdruncfg1,
41    pdruncfg2: Pdruncfg2,
42    pdruncfg3: Pdruncfg3,
43    pdruncfg0_set: Pdruncfg0Set,
44    pdruncfg1_set: Pdruncfg1Set,
45    pdruncfg2_set: Pdruncfg2Set,
46    pdruncfg3_set: Pdruncfg3Set,
47    pdruncfg0_clr: Pdruncfg0Clr,
48    pdruncfg1_clr: Pdruncfg1Clr,
49    pdruncfg2_clr: Pdruncfg2Clr,
50    pdruncfg3_clr: Pdruncfg3Clr,
51    _reserved36: [u8; 0x20],
52    pdwakecfg: Pdwakecfg,
53    _reserved37: [u8; 0x1c],
54    starten0: Starten0,
55    starten1: Starten1,
56    _reserved39: [u8; 0x18],
57    starten0_set: Starten0Set,
58    starten1_set: Starten1Set,
59    _reserved41: [u8; 0x18],
60    starten0_clr: Starten0Clr,
61    starten1_clr: Starten1Clr,
62    _reserved43: [u8; 0x48],
63    mainclksafety: Mainclksafety,
64    _reserved44: [u8; 0x6c],
65    hwwake: Hwwake,
66    _reserved45: [u8; 0x0688],
67    tempsensorctl: Tempsensorctl,
68    _reserved46: [u8; 0x40],
69    bootstateseed: [Bootstateseed; 8],
70    bootstatehmac: [Bootstatehmac; 8],
71    _reserved48: [u8; 0x68],
72    flexspipadctrl: Flexspipadctrl,
73    sdiopadctl: Sdiopadctl,
74    dicehwreg: [Dicehwreg; 8],
75    _reserved51: [u8; 0x30],
76    uuid: [Uuid; 4],
77    _reserved52: [u8; 0x20],
78    aeskey_srcsel: AeskeySrcsel,
79    _reserved53: [u8; 0x04],
80    hashhwkeydisable: Hashhwkeydisable,
81    _reserved54: [u8; 0x14],
82    dbg_locken: DbgLocken,
83    dbg_features: DbgFeatures,
84    dbg_features_dp: DbgFeaturesDp,
85    hwunlock_disable: HwunlockDisable,
86    _reserved58: [u8; 0x04],
87    cs_protcpu0: CsProtcpu0,
88    cs_protcpu1: CsProtcpu1,
89    _reserved60: [u8; 0x04],
90    dbg_auth_scratch: DbgAuthScratch,
91    _reserved61: [u8; 0x0c],
92    key_block: KeyBlock,
93}
94impl RegisterBlock {
95    #[doc = "0x0c - DSP stall register"]
96    #[inline(always)]
97    pub const fn dspstall(&self) -> &Dspstall {
98        &self.dspstall
99    }
100    #[doc = "0x10 - AHB matrix priority"]
101    #[inline(always)]
102    pub const fn ahbmatrixprior(&self) -> &Ahbmatrixprior {
103        &self.ahbmatrixprior
104    }
105    #[doc = "0x14 - Packer enable for DSP RAM packer"]
106    #[inline(always)]
107    pub const fn packerenable(&self) -> &Packerenable {
108        &self.packerenable
109    }
110    #[doc = "0x30 - M33 nmi source selection"]
111    #[inline(always)]
112    pub const fn m33nmisrcsel(&self) -> &M33nmisrcsel {
113        &self.m33nmisrcsel
114    }
115    #[doc = "0x34 - system stick calibration"]
116    #[inline(always)]
117    pub const fn system_stick_calib(&self) -> &SystemStickCalib {
118        &self.system_stick_calib
119    }
120    #[doc = "0x38 - system nstick calibration"]
121    #[inline(always)]
122    pub const fn system_nstick_calib(&self) -> &SystemNstickCalib {
123        &self.system_nstick_calib
124    }
125    #[doc = "0x60 - product ID"]
126    #[inline(always)]
127    pub const fn product_id(&self) -> &ProductId {
128        &self.product_id
129    }
130    #[doc = "0x64 - SILICONREV ID"]
131    #[inline(always)]
132    pub const fn siliconrev_id(&self) -> &SiliconrevId {
133        &self.siliconrev_id
134    }
135    #[doc = "0x68 - jtag ID"]
136    #[inline(always)]
137    pub const fn jtag_id(&self) -> &JtagId {
138        &self.jtag_id
139    }
140    #[doc = "0x80 - auto clock gating override 0"]
141    #[inline(always)]
142    pub const fn autoclkgateoverride0(&self) -> &Autoclkgateoverride0 {
143        &self.autoclkgateoverride0
144    }
145    #[doc = "0x84 - auto clock gating override 1"]
146    #[inline(always)]
147    pub const fn autoclkgateoverride1(&self) -> &Autoclkgateoverride1 {
148        &self.autoclkgateoverride1
149    }
150    #[doc = "0xa0 - Clock gate override 0"]
151    #[inline(always)]
152    pub const fn clkgateoverride0(&self) -> &Clkgateoverride0 {
153        &self.clkgateoverride0
154    }
155    #[doc = "0x100 - AHB SRAM access disable"]
156    #[inline(always)]
157    pub const fn ahb_sram_access_disable(&self) -> &AhbSramAccessDisable {
158        &self.ahb_sram_access_disable
159    }
160    #[doc = "0x104 - DSP SRAM access disable"]
161    #[inline(always)]
162    pub const fn dsp_sram_access_disable(&self) -> &DspSramAccessDisable {
163        &self.dsp_sram_access_disable
164    }
165    #[doc = "0x138 - AHB Flexspi access control"]
166    #[inline(always)]
167    pub const fn ahb_flexspi_access_disable(&self) -> &AhbFlexspiAccessDisable {
168        &self.ahb_flexspi_access_disable
169    }
170    #[doc = "0x13c - DSP Flexspi access control"]
171    #[inline(always)]
172    pub const fn dsp_flexspi_access_disable(&self) -> &DspFlexspiAccessDisable {
173        &self.dsp_flexspi_access_disable
174    }
175    #[doc = "0x380 - FLEXSPI NOR flash configure context register"]
176    #[inline(always)]
177    pub const fn flexspi_bootrom_scratch0(&self) -> &FlexspiBootromScratch0 {
178        &self.flexspi_bootrom_scratch0
179    }
180    #[doc = "0x40c - USB clock control"]
181    #[inline(always)]
182    pub const fn usbclkctrl(&self) -> &Usbclkctrl {
183        &self.usbclkctrl
184    }
185    #[doc = "0x410 - USB clock status"]
186    #[inline(always)]
187    pub const fn usbclkstat(&self) -> &Usbclkstat {
188        &self.usbclkstat
189    }
190    #[doc = "0x414 - USB PHY PLL0 lock time division 2"]
191    #[inline(always)]
192    pub const fn usbphypll0locktimediv2(&self) -> &Usbphypll0locktimediv2 {
193        &self.usbphypll0locktimediv2
194    }
195    #[doc = "0x600 - Sleep configuration 0"]
196    #[inline(always)]
197    pub const fn pdsleepcfg0(&self) -> &Pdsleepcfg0 {
198        &self.pdsleepcfg0
199    }
200    #[doc = "0x604 - Sleep configuration 1"]
201    #[inline(always)]
202    pub const fn pdsleepcfg1(&self) -> &Pdsleepcfg1 {
203        &self.pdsleepcfg1
204    }
205    #[doc = "0x608 - Sleep configuration 2"]
206    #[inline(always)]
207    pub const fn pdsleepcfg2(&self) -> &Pdsleepcfg2 {
208        &self.pdsleepcfg2
209    }
210    #[doc = "0x60c - Sleep configuration 3"]
211    #[inline(always)]
212    pub const fn pdsleepcfg3(&self) -> &Pdsleepcfg3 {
213        &self.pdsleepcfg3
214    }
215    #[doc = "0x610 - Run configuration 0"]
216    #[inline(always)]
217    pub const fn pdruncfg0(&self) -> &Pdruncfg0 {
218        &self.pdruncfg0
219    }
220    #[doc = "0x614 - Run configuration 1"]
221    #[inline(always)]
222    pub const fn pdruncfg1(&self) -> &Pdruncfg1 {
223        &self.pdruncfg1
224    }
225    #[doc = "0x618 - Run configuration 2"]
226    #[inline(always)]
227    pub const fn pdruncfg2(&self) -> &Pdruncfg2 {
228        &self.pdruncfg2
229    }
230    #[doc = "0x61c - Run configuration 3"]
231    #[inline(always)]
232    pub const fn pdruncfg3(&self) -> &Pdruncfg3 {
233        &self.pdruncfg3
234    }
235    #[doc = "0x620 - Run configuration 0 set"]
236    #[inline(always)]
237    pub const fn pdruncfg0_set(&self) -> &Pdruncfg0Set {
238        &self.pdruncfg0_set
239    }
240    #[doc = "0x624 - Run configuration 1 set"]
241    #[inline(always)]
242    pub const fn pdruncfg1_set(&self) -> &Pdruncfg1Set {
243        &self.pdruncfg1_set
244    }
245    #[doc = "0x628 - Run configuration 2 set"]
246    #[inline(always)]
247    pub const fn pdruncfg2_set(&self) -> &Pdruncfg2Set {
248        &self.pdruncfg2_set
249    }
250    #[doc = "0x62c - Run configuration 3 set"]
251    #[inline(always)]
252    pub const fn pdruncfg3_set(&self) -> &Pdruncfg3Set {
253        &self.pdruncfg3_set
254    }
255    #[doc = "0x630 - Run configuration 0 clear"]
256    #[inline(always)]
257    pub const fn pdruncfg0_clr(&self) -> &Pdruncfg0Clr {
258        &self.pdruncfg0_clr
259    }
260    #[doc = "0x634 - Run configuration 1 clear"]
261    #[inline(always)]
262    pub const fn pdruncfg1_clr(&self) -> &Pdruncfg1Clr {
263        &self.pdruncfg1_clr
264    }
265    #[doc = "0x638 - Run configuration 2 clear"]
266    #[inline(always)]
267    pub const fn pdruncfg2_clr(&self) -> &Pdruncfg2Clr {
268        &self.pdruncfg2_clr
269    }
270    #[doc = "0x63c - Run configuration 3 clear"]
271    #[inline(always)]
272    pub const fn pdruncfg3_clr(&self) -> &Pdruncfg3Clr {
273        &self.pdruncfg3_clr
274    }
275    #[doc = "0x660 - PD Wake Configuration"]
276    #[inline(always)]
277    pub const fn pdwakecfg(&self) -> &Pdwakecfg {
278        &self.pdwakecfg
279    }
280    #[doc = "0x680 - Start enable 0"]
281    #[inline(always)]
282    pub const fn starten0(&self) -> &Starten0 {
283        &self.starten0
284    }
285    #[doc = "0x684 - Start enable 1"]
286    #[inline(always)]
287    pub const fn starten1(&self) -> &Starten1 {
288        &self.starten1
289    }
290    #[doc = "0x6a0 - Start enable 0 set"]
291    #[inline(always)]
292    pub const fn starten0_set(&self) -> &Starten0Set {
293        &self.starten0_set
294    }
295    #[doc = "0x6a4 - Start enable 1 set"]
296    #[inline(always)]
297    pub const fn starten1_set(&self) -> &Starten1Set {
298        &self.starten1_set
299    }
300    #[doc = "0x6c0 - Start enable 0 clear"]
301    #[inline(always)]
302    pub const fn starten0_clr(&self) -> &Starten0Clr {
303        &self.starten0_clr
304    }
305    #[doc = "0x6c4 - Start enable 1 clear"]
306    #[inline(always)]
307    pub const fn starten1_clr(&self) -> &Starten1Clr {
308        &self.starten1_clr
309    }
310    #[doc = "0x710 - Main Clock Safety"]
311    #[inline(always)]
312    pub const fn mainclksafety(&self) -> &Mainclksafety {
313        &self.mainclksafety
314    }
315    #[doc = "0x780 - Hardware Wake-up control"]
316    #[inline(always)]
317    pub const fn hwwake(&self) -> &Hwwake {
318        &self.hwwake
319    }
320    #[doc = "0xe0c - tempsensor ctrl"]
321    #[inline(always)]
322    pub const fn tempsensorctl(&self) -> &Tempsensorctl {
323        &self.tempsensorctl
324    }
325    #[doc = "0xe50..0xe70 - boot state seed register"]
326    #[inline(always)]
327    pub const fn bootstateseed(&self, n: usize) -> &Bootstateseed {
328        &self.bootstateseed[n]
329    }
330    #[doc = "Iterator for array of:"]
331    #[doc = "0xe50..0xe70 - boot state seed register"]
332    #[inline(always)]
333    pub fn bootstateseed_iter(&self) -> impl Iterator<Item = &Bootstateseed> {
334        self.bootstateseed.iter()
335    }
336    #[doc = "0xe70..0xe90 - boot state hmac register"]
337    #[inline(always)]
338    pub const fn bootstatehmac(&self, n: usize) -> &Bootstatehmac {
339        &self.bootstatehmac[n]
340    }
341    #[doc = "Iterator for array of:"]
342    #[doc = "0xe70..0xe90 - boot state hmac register"]
343    #[inline(always)]
344    pub fn bootstatehmac_iter(&self) -> impl Iterator<Item = &Bootstatehmac> {
345        self.bootstatehmac.iter()
346    }
347    #[doc = "0xef8 - FLEXSPI IO pads ctrl register"]
348    #[inline(always)]
349    pub const fn flexspipadctrl(&self) -> &Flexspipadctrl {
350        &self.flexspipadctrl
351    }
352    #[doc = "0xefc - sdio pad ctrl"]
353    #[inline(always)]
354    pub const fn sdiopadctl(&self) -> &Sdiopadctl {
355        &self.sdiopadctl
356    }
357    #[doc = "0xf00..0xf20 - DICE General Purpose 32-Bit Data Register"]
358    #[inline(always)]
359    pub const fn dicehwreg(&self, n: usize) -> &Dicehwreg {
360        &self.dicehwreg[n]
361    }
362    #[doc = "Iterator for array of:"]
363    #[doc = "0xf00..0xf20 - DICE General Purpose 32-Bit Data Register"]
364    #[inline(always)]
365    pub fn dicehwreg_iter(&self) -> impl Iterator<Item = &Dicehwreg> {
366        self.dicehwreg.iter()
367    }
368    #[doc = "0xf50..0xf60 - UUIDn 32-Bit Data Register"]
369    #[inline(always)]
370    pub const fn uuid(&self, n: usize) -> &Uuid {
371        &self.uuid[n]
372    }
373    #[doc = "Iterator for array of:"]
374    #[doc = "0xf50..0xf60 - UUIDn 32-Bit Data Register"]
375    #[inline(always)]
376    pub fn uuid_iter(&self) -> impl Iterator<Item = &Uuid> {
377        self.uuid.iter()
378    }
379    #[doc = "0xf80 - AES key source selection"]
380    #[inline(always)]
381    pub const fn aeskey_srcsel(&self) -> &AeskeySrcsel {
382        &self.aeskey_srcsel
383    }
384    #[doc = "0xf88 - Hash hardware key disable"]
385    #[inline(always)]
386    pub const fn hashhwkeydisable(&self) -> &Hashhwkeydisable {
387        &self.hashhwkeydisable
388    }
389    #[doc = "0xfa0 - Debug Write Lock registers"]
390    #[inline(always)]
391    pub const fn dbg_locken(&self) -> &DbgLocken {
392        &self.dbg_locken
393    }
394    #[doc = "0xfa4 - Debug features control for the CM33"]
395    #[inline(always)]
396    pub const fn dbg_features(&self) -> &DbgFeatures {
397        &self.dbg_features
398    }
399    #[doc = "0xfa8 - Debug features duplicate"]
400    #[inline(always)]
401    pub const fn dbg_features_dp(&self) -> &DbgFeaturesDp {
402        &self.dbg_features_dp
403    }
404    #[doc = "0xfac - HW unlock disable"]
405    #[inline(always)]
406    pub const fn hwunlock_disable(&self) -> &HwunlockDisable {
407        &self.hwunlock_disable
408    }
409    #[doc = "0xfb4 - Code Security for CPU0"]
410    #[inline(always)]
411    pub const fn cs_protcpu0(&self) -> &CsProtcpu0 {
412        &self.cs_protcpu0
413    }
414    #[doc = "0xfb8 - Code Security for CPU1"]
415    #[inline(always)]
416    pub const fn cs_protcpu1(&self) -> &CsProtcpu1 {
417        &self.cs_protcpu1
418    }
419    #[doc = "0xfc0 - Debug authorization scratch"]
420    #[inline(always)]
421    pub const fn dbg_auth_scratch(&self) -> &DbgAuthScratch {
422        &self.dbg_auth_scratch
423    }
424    #[doc = "0xfd0 - Key block"]
425    #[inline(always)]
426    pub const fn key_block(&self) -> &KeyBlock {
427        &self.key_block
428    }
429}
430#[doc = "DSPSTALL (rw) register accessor: DSP stall register\n\nYou can [`read`](crate::Reg::read) this register and get [`dspstall::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dspstall::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dspstall`]
431module"]
432#[doc(alias = "DSPSTALL")]
433pub type Dspstall = crate::Reg<dspstall::DspstallSpec>;
434#[doc = "DSP stall register"]
435pub mod dspstall;
436#[doc = "AHBMATRIXPRIOR (rw) register accessor: AHB matrix priority\n\nYou can [`read`](crate::Reg::read) this register and get [`ahbmatrixprior::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ahbmatrixprior::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ahbmatrixprior`]
437module"]
438#[doc(alias = "AHBMATRIXPRIOR")]
439pub type Ahbmatrixprior = crate::Reg<ahbmatrixprior::AhbmatrixpriorSpec>;
440#[doc = "AHB matrix priority"]
441pub mod ahbmatrixprior;
442#[doc = "PACKERENABLE (rw) register accessor: Packer enable for DSP RAM packer\n\nYou can [`read`](crate::Reg::read) this register and get [`packerenable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`packerenable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@packerenable`]
443module"]
444#[doc(alias = "PACKERENABLE")]
445pub type Packerenable = crate::Reg<packerenable::PackerenableSpec>;
446#[doc = "Packer enable for DSP RAM packer"]
447pub mod packerenable;
448#[doc = "M33NMISRCSEL (rw) register accessor: M33 nmi source selection\n\nYou can [`read`](crate::Reg::read) this register and get [`m33nmisrcsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`m33nmisrcsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@m33nmisrcsel`]
449module"]
450#[doc(alias = "M33NMISRCSEL")]
451pub type M33nmisrcsel = crate::Reg<m33nmisrcsel::M33nmisrcselSpec>;
452#[doc = "M33 nmi source selection"]
453pub mod m33nmisrcsel;
454#[doc = "SYSTEM_STICK_CALIB (rw) register accessor: system stick calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`system_stick_calib::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`system_stick_calib::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_stick_calib`]
455module"]
456#[doc(alias = "SYSTEM_STICK_CALIB")]
457pub type SystemStickCalib = crate::Reg<system_stick_calib::SystemStickCalibSpec>;
458#[doc = "system stick calibration"]
459pub mod system_stick_calib;
460#[doc = "SYSTEM_NSTICK_CALIB (rw) register accessor: system nstick calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`system_nstick_calib::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`system_nstick_calib::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_nstick_calib`]
461module"]
462#[doc(alias = "SYSTEM_NSTICK_CALIB")]
463pub type SystemNstickCalib = crate::Reg<system_nstick_calib::SystemNstickCalibSpec>;
464#[doc = "system nstick calibration"]
465pub mod system_nstick_calib;
466#[doc = "PRODUCT_ID (r) register accessor: product ID\n\nYou can [`read`](crate::Reg::read) this register and get [`product_id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@product_id`]
467module"]
468#[doc(alias = "PRODUCT_ID")]
469pub type ProductId = crate::Reg<product_id::ProductIdSpec>;
470#[doc = "product ID"]
471pub mod product_id;
472#[doc = "SILICONREV_ID (r) register accessor: SILICONREV ID\n\nYou can [`read`](crate::Reg::read) this register and get [`siliconrev_id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@siliconrev_id`]
473module"]
474#[doc(alias = "SILICONREV_ID")]
475pub type SiliconrevId = crate::Reg<siliconrev_id::SiliconrevIdSpec>;
476#[doc = "SILICONREV ID"]
477pub mod siliconrev_id;
478#[doc = "JTAG_ID (r) register accessor: jtag ID\n\nYou can [`read`](crate::Reg::read) this register and get [`jtag_id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@jtag_id`]
479module"]
480#[doc(alias = "JTAG_ID")]
481pub type JtagId = crate::Reg<jtag_id::JtagIdSpec>;
482#[doc = "jtag ID"]
483pub mod jtag_id;
484#[doc = "AUTOCLKGATEOVERRIDE0 (rw) register accessor: auto clock gating override 0\n\nYou can [`read`](crate::Reg::read) this register and get [`autoclkgateoverride0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`autoclkgateoverride0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@autoclkgateoverride0`]
485module"]
486#[doc(alias = "AUTOCLKGATEOVERRIDE0")]
487pub type Autoclkgateoverride0 = crate::Reg<autoclkgateoverride0::Autoclkgateoverride0Spec>;
488#[doc = "auto clock gating override 0"]
489pub mod autoclkgateoverride0;
490#[doc = "AUTOCLKGATEOVERRIDE1 (rw) register accessor: auto clock gating override 1\n\nYou can [`read`](crate::Reg::read) this register and get [`autoclkgateoverride1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`autoclkgateoverride1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@autoclkgateoverride1`]
491module"]
492#[doc(alias = "AUTOCLKGATEOVERRIDE1")]
493pub type Autoclkgateoverride1 = crate::Reg<autoclkgateoverride1::Autoclkgateoverride1Spec>;
494#[doc = "auto clock gating override 1"]
495pub mod autoclkgateoverride1;
496#[doc = "CLKGATEOVERRIDE0 (rw) register accessor: Clock gate override 0\n\nYou can [`read`](crate::Reg::read) this register and get [`clkgateoverride0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkgateoverride0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkgateoverride0`]
497module"]
498#[doc(alias = "CLKGATEOVERRIDE0")]
499pub type Clkgateoverride0 = crate::Reg<clkgateoverride0::Clkgateoverride0Spec>;
500#[doc = "Clock gate override 0"]
501pub mod clkgateoverride0;
502#[doc = "AHB_SRAM_ACCESS_DISABLE (rw) register accessor: AHB SRAM access disable\n\nYou can [`read`](crate::Reg::read) this register and get [`ahb_sram_access_disable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ahb_sram_access_disable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ahb_sram_access_disable`]
503module"]
504#[doc(alias = "AHB_SRAM_ACCESS_DISABLE")]
505pub type AhbSramAccessDisable = crate::Reg<ahb_sram_access_disable::AhbSramAccessDisableSpec>;
506#[doc = "AHB SRAM access disable"]
507pub mod ahb_sram_access_disable;
508#[doc = "DSP_SRAM_ACCESS_DISABLE (rw) register accessor: DSP SRAM access disable\n\nYou can [`read`](crate::Reg::read) this register and get [`dsp_sram_access_disable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dsp_sram_access_disable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsp_sram_access_disable`]
509module"]
510#[doc(alias = "DSP_SRAM_ACCESS_DISABLE")]
511pub type DspSramAccessDisable = crate::Reg<dsp_sram_access_disable::DspSramAccessDisableSpec>;
512#[doc = "DSP SRAM access disable"]
513pub mod dsp_sram_access_disable;
514#[doc = "AHB_FLEXSPI_ACCESS_DISABLE (rw) register accessor: AHB Flexspi access control\n\nYou can [`read`](crate::Reg::read) this register and get [`ahb_flexspi_access_disable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ahb_flexspi_access_disable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ahb_flexspi_access_disable`]
515module"]
516#[doc(alias = "AHB_FLEXSPI_ACCESS_DISABLE")]
517pub type AhbFlexspiAccessDisable =
518    crate::Reg<ahb_flexspi_access_disable::AhbFlexspiAccessDisableSpec>;
519#[doc = "AHB Flexspi access control"]
520pub mod ahb_flexspi_access_disable;
521#[doc = "DSP_FLEXSPI_ACCESS_DISABLE (rw) register accessor: DSP Flexspi access control\n\nYou can [`read`](crate::Reg::read) this register and get [`dsp_flexspi_access_disable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dsp_flexspi_access_disable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsp_flexspi_access_disable`]
522module"]
523#[doc(alias = "DSP_FLEXSPI_ACCESS_DISABLE")]
524pub type DspFlexspiAccessDisable =
525    crate::Reg<dsp_flexspi_access_disable::DspFlexspiAccessDisableSpec>;
526#[doc = "DSP Flexspi access control"]
527pub mod dsp_flexspi_access_disable;
528#[doc = "FLEXSPI_BOOTROM_SCRATCH0 (rw) register accessor: FLEXSPI NOR flash configure context register\n\nYou can [`read`](crate::Reg::read) this register and get [`flexspi_bootrom_scratch0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flexspi_bootrom_scratch0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flexspi_bootrom_scratch0`]
529module"]
530#[doc(alias = "FLEXSPI_BOOTROM_SCRATCH0")]
531pub type FlexspiBootromScratch0 = crate::Reg<flexspi_bootrom_scratch0::FlexspiBootromScratch0Spec>;
532#[doc = "FLEXSPI NOR flash configure context register"]
533pub mod flexspi_bootrom_scratch0;
534#[doc = "USBCLKCTRL (rw) register accessor: USB clock control\n\nYou can [`read`](crate::Reg::read) this register and get [`usbclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usbclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbclkctrl`]
535module"]
536#[doc(alias = "USBCLKCTRL")]
537pub type Usbclkctrl = crate::Reg<usbclkctrl::UsbclkctrlSpec>;
538#[doc = "USB clock control"]
539pub mod usbclkctrl;
540#[doc = "USBCLKSTAT (rw) register accessor: USB clock status\n\nYou can [`read`](crate::Reg::read) this register and get [`usbclkstat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usbclkstat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbclkstat`]
541module"]
542#[doc(alias = "USBCLKSTAT")]
543pub type Usbclkstat = crate::Reg<usbclkstat::UsbclkstatSpec>;
544#[doc = "USB clock status"]
545pub mod usbclkstat;
546#[doc = "USBPHYPLL0LOCKTIMEDIV2 (rw) register accessor: USB PHY PLL0 lock time division 2\n\nYou can [`read`](crate::Reg::read) this register and get [`usbphypll0locktimediv2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usbphypll0locktimediv2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbphypll0locktimediv2`]
547module"]
548#[doc(alias = "USBPHYPLL0LOCKTIMEDIV2")]
549pub type Usbphypll0locktimediv2 = crate::Reg<usbphypll0locktimediv2::Usbphypll0locktimediv2Spec>;
550#[doc = "USB PHY PLL0 lock time division 2"]
551pub mod usbphypll0locktimediv2;
552#[doc = "PDSLEEPCFG0 (rw) register accessor: Sleep configuration 0\n\nYou can [`read`](crate::Reg::read) this register and get [`pdsleepcfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdsleepcfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdsleepcfg0`]
553module"]
554#[doc(alias = "PDSLEEPCFG0")]
555pub type Pdsleepcfg0 = crate::Reg<pdsleepcfg0::Pdsleepcfg0Spec>;
556#[doc = "Sleep configuration 0"]
557pub mod pdsleepcfg0;
558#[doc = "PDSLEEPCFG1 (rw) register accessor: Sleep configuration 1\n\nYou can [`read`](crate::Reg::read) this register and get [`pdsleepcfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdsleepcfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdsleepcfg1`]
559module"]
560#[doc(alias = "PDSLEEPCFG1")]
561pub type Pdsleepcfg1 = crate::Reg<pdsleepcfg1::Pdsleepcfg1Spec>;
562#[doc = "Sleep configuration 1"]
563pub mod pdsleepcfg1;
564#[doc = "PDSLEEPCFG2 (rw) register accessor: Sleep configuration 2\n\nYou can [`read`](crate::Reg::read) this register and get [`pdsleepcfg2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdsleepcfg2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdsleepcfg2`]
565module"]
566#[doc(alias = "PDSLEEPCFG2")]
567pub type Pdsleepcfg2 = crate::Reg<pdsleepcfg2::Pdsleepcfg2Spec>;
568#[doc = "Sleep configuration 2"]
569pub mod pdsleepcfg2;
570#[doc = "PDSLEEPCFG3 (rw) register accessor: Sleep configuration 3\n\nYou can [`read`](crate::Reg::read) this register and get [`pdsleepcfg3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdsleepcfg3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdsleepcfg3`]
571module"]
572#[doc(alias = "PDSLEEPCFG3")]
573pub type Pdsleepcfg3 = crate::Reg<pdsleepcfg3::Pdsleepcfg3Spec>;
574#[doc = "Sleep configuration 3"]
575pub mod pdsleepcfg3;
576#[doc = "PDRUNCFG0 (rw) register accessor: Run configuration 0\n\nYou can [`read`](crate::Reg::read) this register and get [`pdruncfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdruncfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdruncfg0`]
577module"]
578#[doc(alias = "PDRUNCFG0")]
579pub type Pdruncfg0 = crate::Reg<pdruncfg0::Pdruncfg0Spec>;
580#[doc = "Run configuration 0"]
581pub mod pdruncfg0;
582#[doc = "PDRUNCFG1 (rw) register accessor: Run configuration 1\n\nYou can [`read`](crate::Reg::read) this register and get [`pdruncfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdruncfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdruncfg1`]
583module"]
584#[doc(alias = "PDRUNCFG1")]
585pub type Pdruncfg1 = crate::Reg<pdruncfg1::Pdruncfg1Spec>;
586#[doc = "Run configuration 1"]
587pub mod pdruncfg1;
588#[doc = "PDRUNCFG2 (rw) register accessor: Run configuration 2\n\nYou can [`read`](crate::Reg::read) this register and get [`pdruncfg2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdruncfg2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdruncfg2`]
589module"]
590#[doc(alias = "PDRUNCFG2")]
591pub type Pdruncfg2 = crate::Reg<pdruncfg2::Pdruncfg2Spec>;
592#[doc = "Run configuration 2"]
593pub mod pdruncfg2;
594#[doc = "PDRUNCFG3 (rw) register accessor: Run configuration 3\n\nYou can [`read`](crate::Reg::read) this register and get [`pdruncfg3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdruncfg3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdruncfg3`]
595module"]
596#[doc(alias = "PDRUNCFG3")]
597pub type Pdruncfg3 = crate::Reg<pdruncfg3::Pdruncfg3Spec>;
598#[doc = "Run configuration 3"]
599pub mod pdruncfg3;
600#[doc = "PDRUNCFG0_SET (w) register accessor: Run configuration 0 set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdruncfg0_set::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdruncfg0_set`]
601module"]
602#[doc(alias = "PDRUNCFG0_SET")]
603pub type Pdruncfg0Set = crate::Reg<pdruncfg0_set::Pdruncfg0SetSpec>;
604#[doc = "Run configuration 0 set"]
605pub mod pdruncfg0_set;
606#[doc = "PDRUNCFG1_SET (w) register accessor: Run configuration 1 set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdruncfg1_set::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdruncfg1_set`]
607module"]
608#[doc(alias = "PDRUNCFG1_SET")]
609pub type Pdruncfg1Set = crate::Reg<pdruncfg1_set::Pdruncfg1SetSpec>;
610#[doc = "Run configuration 1 set"]
611pub mod pdruncfg1_set;
612#[doc = "PDRUNCFG2_SET (w) register accessor: Run configuration 2 set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdruncfg2_set::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdruncfg2_set`]
613module"]
614#[doc(alias = "PDRUNCFG2_SET")]
615pub type Pdruncfg2Set = crate::Reg<pdruncfg2_set::Pdruncfg2SetSpec>;
616#[doc = "Run configuration 2 set"]
617pub mod pdruncfg2_set;
618#[doc = "PDRUNCFG3_SET (w) register accessor: Run configuration 3 set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdruncfg3_set::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdruncfg3_set`]
619module"]
620#[doc(alias = "PDRUNCFG3_SET")]
621pub type Pdruncfg3Set = crate::Reg<pdruncfg3_set::Pdruncfg3SetSpec>;
622#[doc = "Run configuration 3 set"]
623pub mod pdruncfg3_set;
624#[doc = "PDRUNCFG0_CLR (w) register accessor: Run configuration 0 clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdruncfg0_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdruncfg0_clr`]
625module"]
626#[doc(alias = "PDRUNCFG0_CLR")]
627pub type Pdruncfg0Clr = crate::Reg<pdruncfg0_clr::Pdruncfg0ClrSpec>;
628#[doc = "Run configuration 0 clear"]
629pub mod pdruncfg0_clr;
630#[doc = "PDRUNCFG1_CLR (w) register accessor: Run configuration 1 clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdruncfg1_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdruncfg1_clr`]
631module"]
632#[doc(alias = "PDRUNCFG1_CLR")]
633pub type Pdruncfg1Clr = crate::Reg<pdruncfg1_clr::Pdruncfg1ClrSpec>;
634#[doc = "Run configuration 1 clear"]
635pub mod pdruncfg1_clr;
636#[doc = "PDRUNCFG2_CLR (w) register accessor: Run configuration 2 clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdruncfg2_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdruncfg2_clr`]
637module"]
638#[doc(alias = "PDRUNCFG2_CLR")]
639pub type Pdruncfg2Clr = crate::Reg<pdruncfg2_clr::Pdruncfg2ClrSpec>;
640#[doc = "Run configuration 2 clear"]
641pub mod pdruncfg2_clr;
642#[doc = "PDRUNCFG3_CLR (w) register accessor: Run configuration 3 clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdruncfg3_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdruncfg3_clr`]
643module"]
644#[doc(alias = "PDRUNCFG3_CLR")]
645pub type Pdruncfg3Clr = crate::Reg<pdruncfg3_clr::Pdruncfg3ClrSpec>;
646#[doc = "Run configuration 3 clear"]
647pub mod pdruncfg3_clr;
648#[doc = "PDWAKECFG (rw) register accessor: PD Wake Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`pdwakecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdwakecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdwakecfg`]
649module"]
650#[doc(alias = "PDWAKECFG")]
651pub type Pdwakecfg = crate::Reg<pdwakecfg::PdwakecfgSpec>;
652#[doc = "PD Wake Configuration"]
653pub mod pdwakecfg;
654#[doc = "STARTEN0 (rw) register accessor: Start enable 0\n\nYou can [`read`](crate::Reg::read) this register and get [`starten0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`starten0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@starten0`]
655module"]
656#[doc(alias = "STARTEN0")]
657pub type Starten0 = crate::Reg<starten0::Starten0Spec>;
658#[doc = "Start enable 0"]
659pub mod starten0;
660#[doc = "STARTEN1 (rw) register accessor: Start enable 1\n\nYou can [`read`](crate::Reg::read) this register and get [`starten1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`starten1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@starten1`]
661module"]
662#[doc(alias = "STARTEN1")]
663pub type Starten1 = crate::Reg<starten1::Starten1Spec>;
664#[doc = "Start enable 1"]
665pub mod starten1;
666#[doc = "STARTEN0_SET (w) register accessor: Start enable 0 set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`starten0_set::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@starten0_set`]
667module"]
668#[doc(alias = "STARTEN0_SET")]
669pub type Starten0Set = crate::Reg<starten0_set::Starten0SetSpec>;
670#[doc = "Start enable 0 set"]
671pub mod starten0_set;
672#[doc = "STARTEN1_SET (w) register accessor: Start enable 1 set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`starten1_set::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@starten1_set`]
673module"]
674#[doc(alias = "STARTEN1_SET")]
675pub type Starten1Set = crate::Reg<starten1_set::Starten1SetSpec>;
676#[doc = "Start enable 1 set"]
677pub mod starten1_set;
678#[doc = "STARTEN0_CLR (w) register accessor: Start enable 0 clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`starten0_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@starten0_clr`]
679module"]
680#[doc(alias = "STARTEN0_CLR")]
681pub type Starten0Clr = crate::Reg<starten0_clr::Starten0ClrSpec>;
682#[doc = "Start enable 0 clear"]
683pub mod starten0_clr;
684#[doc = "STARTEN1_CLR (w) register accessor: Start enable 1 clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`starten1_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@starten1_clr`]
685module"]
686#[doc(alias = "STARTEN1_CLR")]
687pub type Starten1Clr = crate::Reg<starten1_clr::Starten1ClrSpec>;
688#[doc = "Start enable 1 clear"]
689pub mod starten1_clr;
690#[doc = "MAINCLKSAFETY (rw) register accessor: Main Clock Safety\n\nYou can [`read`](crate::Reg::read) this register and get [`mainclksafety::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mainclksafety::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mainclksafety`]
691module"]
692#[doc(alias = "MAINCLKSAFETY")]
693pub type Mainclksafety = crate::Reg<mainclksafety::MainclksafetySpec>;
694#[doc = "Main Clock Safety"]
695pub mod mainclksafety;
696#[doc = "HWWAKE (rw) register accessor: Hardware Wake-up control\n\nYou can [`read`](crate::Reg::read) this register and get [`hwwake::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwwake::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwwake`]
697module"]
698#[doc(alias = "HWWAKE")]
699pub type Hwwake = crate::Reg<hwwake::HwwakeSpec>;
700#[doc = "Hardware Wake-up control"]
701pub mod hwwake;
702#[doc = "TEMPSENSORCTL (rw) register accessor: tempsensor ctrl\n\nYou can [`read`](crate::Reg::read) this register and get [`tempsensorctl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tempsensorctl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tempsensorctl`]
703module"]
704#[doc(alias = "TEMPSENSORCTL")]
705pub type Tempsensorctl = crate::Reg<tempsensorctl::TempsensorctlSpec>;
706#[doc = "tempsensor ctrl"]
707pub mod tempsensorctl;
708#[doc = "BOOTSTATESEED (rw) register accessor: boot state seed register\n\nYou can [`read`](crate::Reg::read) this register and get [`bootstateseed::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bootstateseed::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bootstateseed`]
709module"]
710#[doc(alias = "BOOTSTATESEED")]
711pub type Bootstateseed = crate::Reg<bootstateseed::BootstateseedSpec>;
712#[doc = "boot state seed register"]
713pub mod bootstateseed;
714#[doc = "BOOTSTATEHMAC (rw) register accessor: boot state hmac register\n\nYou can [`read`](crate::Reg::read) this register and get [`bootstatehmac::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bootstatehmac::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bootstatehmac`]
715module"]
716#[doc(alias = "BOOTSTATEHMAC")]
717pub type Bootstatehmac = crate::Reg<bootstatehmac::BootstatehmacSpec>;
718#[doc = "boot state hmac register"]
719pub mod bootstatehmac;
720#[doc = "FLEXSPIPADCTRL (rw) register accessor: FLEXSPI IO pads ctrl register\n\nYou can [`read`](crate::Reg::read) this register and get [`flexspipadctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flexspipadctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flexspipadctrl`]
721module"]
722#[doc(alias = "FLEXSPIPADCTRL")]
723pub type Flexspipadctrl = crate::Reg<flexspipadctrl::FlexspipadctrlSpec>;
724#[doc = "FLEXSPI IO pads ctrl register"]
725pub mod flexspipadctrl;
726#[doc = "SDIOPADCTL (rw) register accessor: sdio pad ctrl\n\nYou can [`read`](crate::Reg::read) this register and get [`sdiopadctl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdiopadctl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdiopadctl`]
727module"]
728#[doc(alias = "SDIOPADCTL")]
729pub type Sdiopadctl = crate::Reg<sdiopadctl::SdiopadctlSpec>;
730#[doc = "sdio pad ctrl"]
731pub mod sdiopadctl;
732#[doc = "DICEHWREG (rw) register accessor: DICE General Purpose 32-Bit Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dicehwreg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dicehwreg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dicehwreg`]
733module"]
734#[doc(alias = "DICEHWREG")]
735pub type Dicehwreg = crate::Reg<dicehwreg::DicehwregSpec>;
736#[doc = "DICE General Purpose 32-Bit Data Register"]
737pub mod dicehwreg;
738#[doc = "UUID (r) register accessor: UUIDn 32-Bit Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`uuid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@uuid`]
739module"]
740#[doc(alias = "UUID")]
741pub type Uuid = crate::Reg<uuid::UuidSpec>;
742#[doc = "UUIDn 32-Bit Data Register"]
743pub mod uuid;
744#[doc = "AESKEY_SRCSEL (rw) register accessor: AES key source selection\n\nYou can [`read`](crate::Reg::read) this register and get [`aeskey_srcsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aeskey_srcsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aeskey_srcsel`]
745module"]
746#[doc(alias = "AESKEY_SRCSEL")]
747pub type AeskeySrcsel = crate::Reg<aeskey_srcsel::AeskeySrcselSpec>;
748#[doc = "AES key source selection"]
749pub mod aeskey_srcsel;
750#[doc = "HASHHWKEYDISABLE (rw) register accessor: Hash hardware key disable\n\nYou can [`read`](crate::Reg::read) this register and get [`hashhwkeydisable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hashhwkeydisable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hashhwkeydisable`]
751module"]
752#[doc(alias = "HASHHWKEYDISABLE")]
753pub type Hashhwkeydisable = crate::Reg<hashhwkeydisable::HashhwkeydisableSpec>;
754#[doc = "Hash hardware key disable"]
755pub mod hashhwkeydisable;
756#[doc = "DBG_LOCKEN (rw) register accessor: Debug Write Lock registers\n\nYou can [`read`](crate::Reg::read) this register and get [`dbg_locken::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbg_locken::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbg_locken`]
757module"]
758#[doc(alias = "DBG_LOCKEN")]
759pub type DbgLocken = crate::Reg<dbg_locken::DbgLockenSpec>;
760#[doc = "Debug Write Lock registers"]
761pub mod dbg_locken;
762#[doc = "DBG_FEATURES (rw) register accessor: Debug features control for the CM33\n\nYou can [`read`](crate::Reg::read) this register and get [`dbg_features::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbg_features::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbg_features`]
763module"]
764#[doc(alias = "DBG_FEATURES")]
765pub type DbgFeatures = crate::Reg<dbg_features::DbgFeaturesSpec>;
766#[doc = "Debug features control for the CM33"]
767pub mod dbg_features;
768#[doc = "DBG_FEATURES_DP (rw) register accessor: Debug features duplicate\n\nYou can [`read`](crate::Reg::read) this register and get [`dbg_features_dp::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbg_features_dp::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbg_features_dp`]
769module"]
770#[doc(alias = "DBG_FEATURES_DP")]
771pub type DbgFeaturesDp = crate::Reg<dbg_features_dp::DbgFeaturesDpSpec>;
772#[doc = "Debug features duplicate"]
773pub mod dbg_features_dp;
774#[doc = "HWUNLOCK_DISABLE (rw) register accessor: HW unlock disable\n\nYou can [`read`](crate::Reg::read) this register and get [`hwunlock_disable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwunlock_disable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwunlock_disable`]
775module"]
776#[doc(alias = "HWUNLOCK_DISABLE")]
777pub type HwunlockDisable = crate::Reg<hwunlock_disable::HwunlockDisableSpec>;
778#[doc = "HW unlock disable"]
779pub mod hwunlock_disable;
780#[doc = "CS_PROTCPU0 (rw) register accessor: Code Security for CPU0\n\nYou can [`read`](crate::Reg::read) this register and get [`cs_protcpu0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cs_protcpu0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cs_protcpu0`]
781module"]
782#[doc(alias = "CS_PROTCPU0")]
783pub type CsProtcpu0 = crate::Reg<cs_protcpu0::CsProtcpu0Spec>;
784#[doc = "Code Security for CPU0"]
785pub mod cs_protcpu0;
786#[doc = "CS_PROTCPU1 (rw) register accessor: Code Security for CPU1\n\nYou can [`read`](crate::Reg::read) this register and get [`cs_protcpu1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cs_protcpu1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cs_protcpu1`]
787module"]
788#[doc(alias = "CS_PROTCPU1")]
789pub type CsProtcpu1 = crate::Reg<cs_protcpu1::CsProtcpu1Spec>;
790#[doc = "Code Security for CPU1"]
791pub mod cs_protcpu1;
792#[doc = "DBG_AUTH_SCRATCH (rw) register accessor: Debug authorization scratch\n\nYou can [`read`](crate::Reg::read) this register and get [`dbg_auth_scratch::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbg_auth_scratch::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbg_auth_scratch`]
793module"]
794#[doc(alias = "DBG_AUTH_SCRATCH")]
795pub type DbgAuthScratch = crate::Reg<dbg_auth_scratch::DbgAuthScratchSpec>;
796#[doc = "Debug authorization scratch"]
797pub mod dbg_auth_scratch;
798#[doc = "KEY_BLOCK (rw) register accessor: Key block\n\nYou can [`read`](crate::Reg::read) this register and get [`key_block::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`key_block::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@key_block`]
799module"]
800#[doc(alias = "KEY_BLOCK")]
801pub type KeyBlock = crate::Reg<key_block::KeyBlockSpec>;
802#[doc = "Key block"]
803pub mod key_block;
mimxrt685s_pac/sysctl0.rs

mimxrt685s_pac/
sysctl0.rs
