mimxrt595s/usdhc0/
vend_spec.rs

1#[doc = "Register `VEND_SPEC` reader"]
2pub struct R(crate::R<VEND_SPEC_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<VEND_SPEC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<VEND_SPEC_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<VEND_SPEC_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `VEND_SPEC` writer"]
17pub struct W(crate::W<VEND_SPEC_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<VEND_SPEC_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<VEND_SPEC_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<VEND_SPEC_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `VSELECT` reader - Voltage selection"]
38pub type VSELECT_R = crate::BitReader<VSELECT_A>;
39#[doc = "Voltage selection\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum VSELECT_A {
42    #[doc = "0: Change the voltage to high voltage range, around 3.0 V"]
43    VSELECT_0 = 0,
44    #[doc = "1: Change the voltage to low voltage range, around 1.8 V"]
45    VSELECT_1 = 1,
46}
47impl From<VSELECT_A> for bool {
48    #[inline(always)]
49    fn from(variant: VSELECT_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl VSELECT_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> VSELECT_A {
57        match self.bits {
58            false => VSELECT_A::VSELECT_0,
59            true => VSELECT_A::VSELECT_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `VSELECT_0`"]
63    #[inline(always)]
64    pub fn is_vselect_0(&self) -> bool {
65        *self == VSELECT_A::VSELECT_0
66    }
67    #[doc = "Checks if the value of the field is `VSELECT_1`"]
68    #[inline(always)]
69    pub fn is_vselect_1(&self) -> bool {
70        *self == VSELECT_A::VSELECT_1
71    }
72}
73#[doc = "Field `VSELECT` writer - Voltage selection"]
74pub type VSELECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, VEND_SPEC_SPEC, VSELECT_A, O>;
75impl<'a, const O: u8> VSELECT_W<'a, O> {
76    #[doc = "Change the voltage to high voltage range, around 3.0 V"]
77    #[inline(always)]
78    pub fn vselect_0(self) -> &'a mut W {
79        self.variant(VSELECT_A::VSELECT_0)
80    }
81    #[doc = "Change the voltage to low voltage range, around 1.8 V"]
82    #[inline(always)]
83    pub fn vselect_1(self) -> &'a mut W {
84        self.variant(VSELECT_A::VSELECT_1)
85    }
86}
87#[doc = "Field `CONFLICT_CHK_EN` reader - Conflict check enable"]
88pub type CONFLICT_CHK_EN_R = crate::BitReader<CONFLICT_CHK_EN_A>;
89#[doc = "Conflict check enable\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum CONFLICT_CHK_EN_A {
92    #[doc = "0: Conflict check disable"]
93    CONFLICT_CHK_EN_0 = 0,
94    #[doc = "1: Conflict check enable"]
95    CONFLICT_CHK_EN_1 = 1,
96}
97impl From<CONFLICT_CHK_EN_A> for bool {
98    #[inline(always)]
99    fn from(variant: CONFLICT_CHK_EN_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl CONFLICT_CHK_EN_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> CONFLICT_CHK_EN_A {
107        match self.bits {
108            false => CONFLICT_CHK_EN_A::CONFLICT_CHK_EN_0,
109            true => CONFLICT_CHK_EN_A::CONFLICT_CHK_EN_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `CONFLICT_CHK_EN_0`"]
113    #[inline(always)]
114    pub fn is_conflict_chk_en_0(&self) -> bool {
115        *self == CONFLICT_CHK_EN_A::CONFLICT_CHK_EN_0
116    }
117    #[doc = "Checks if the value of the field is `CONFLICT_CHK_EN_1`"]
118    #[inline(always)]
119    pub fn is_conflict_chk_en_1(&self) -> bool {
120        *self == CONFLICT_CHK_EN_A::CONFLICT_CHK_EN_1
121    }
122}
123#[doc = "Field `CONFLICT_CHK_EN` writer - Conflict check enable"]
124pub type CONFLICT_CHK_EN_W<'a, const O: u8> =
125    crate::BitWriter<'a, u32, VEND_SPEC_SPEC, CONFLICT_CHK_EN_A, O>;
126impl<'a, const O: u8> CONFLICT_CHK_EN_W<'a, O> {
127    #[doc = "Conflict check disable"]
128    #[inline(always)]
129    pub fn conflict_chk_en_0(self) -> &'a mut W {
130        self.variant(CONFLICT_CHK_EN_A::CONFLICT_CHK_EN_0)
131    }
132    #[doc = "Conflict check enable"]
133    #[inline(always)]
134    pub fn conflict_chk_en_1(self) -> &'a mut W {
135        self.variant(CONFLICT_CHK_EN_A::CONFLICT_CHK_EN_1)
136    }
137}
138#[doc = "Field `AC12_WR_CHKBUSY_EN` reader - Check busy enable"]
139pub type AC12_WR_CHKBUSY_EN_R = crate::BitReader<AC12_WR_CHKBUSY_EN_A>;
140#[doc = "Check busy enable\n\nValue on reset: 1"]
141#[derive(Clone, Copy, Debug, PartialEq, Eq)]
142pub enum AC12_WR_CHKBUSY_EN_A {
143    #[doc = "0: Do not check busy after auto CMD12 for write data packet"]
144    AC12_WR_CHKBUSY_EN_0 = 0,
145    #[doc = "1: Check busy after auto CMD12 for write data packet"]
146    AC12_WR_CHKBUSY_EN_1 = 1,
147}
148impl From<AC12_WR_CHKBUSY_EN_A> for bool {
149    #[inline(always)]
150    fn from(variant: AC12_WR_CHKBUSY_EN_A) -> Self {
151        variant as u8 != 0
152    }
153}
154impl AC12_WR_CHKBUSY_EN_R {
155    #[doc = "Get enumerated values variant"]
156    #[inline(always)]
157    pub fn variant(&self) -> AC12_WR_CHKBUSY_EN_A {
158        match self.bits {
159            false => AC12_WR_CHKBUSY_EN_A::AC12_WR_CHKBUSY_EN_0,
160            true => AC12_WR_CHKBUSY_EN_A::AC12_WR_CHKBUSY_EN_1,
161        }
162    }
163    #[doc = "Checks if the value of the field is `AC12_WR_CHKBUSY_EN_0`"]
164    #[inline(always)]
165    pub fn is_ac12_wr_chkbusy_en_0(&self) -> bool {
166        *self == AC12_WR_CHKBUSY_EN_A::AC12_WR_CHKBUSY_EN_0
167    }
168    #[doc = "Checks if the value of the field is `AC12_WR_CHKBUSY_EN_1`"]
169    #[inline(always)]
170    pub fn is_ac12_wr_chkbusy_en_1(&self) -> bool {
171        *self == AC12_WR_CHKBUSY_EN_A::AC12_WR_CHKBUSY_EN_1
172    }
173}
174#[doc = "Field `AC12_WR_CHKBUSY_EN` writer - Check busy enable"]
175pub type AC12_WR_CHKBUSY_EN_W<'a, const O: u8> =
176    crate::BitWriter<'a, u32, VEND_SPEC_SPEC, AC12_WR_CHKBUSY_EN_A, O>;
177impl<'a, const O: u8> AC12_WR_CHKBUSY_EN_W<'a, O> {
178    #[doc = "Do not check busy after auto CMD12 for write data packet"]
179    #[inline(always)]
180    pub fn ac12_wr_chkbusy_en_0(self) -> &'a mut W {
181        self.variant(AC12_WR_CHKBUSY_EN_A::AC12_WR_CHKBUSY_EN_0)
182    }
183    #[doc = "Check busy after auto CMD12 for write data packet"]
184    #[inline(always)]
185    pub fn ac12_wr_chkbusy_en_1(self) -> &'a mut W {
186        self.variant(AC12_WR_CHKBUSY_EN_A::AC12_WR_CHKBUSY_EN_1)
187    }
188}
189#[doc = "Field `FRC_SDCLK_ON` reader - Force CLK"]
190pub type FRC_SDCLK_ON_R = crate::BitReader<FRC_SDCLK_ON_A>;
191#[doc = "Force CLK\n\nValue on reset: 0"]
192#[derive(Clone, Copy, Debug, PartialEq, Eq)]
193pub enum FRC_SDCLK_ON_A {
194    #[doc = "0: CLK active or inactive is fully controlled by the hardware."]
195    FRC_SDCLK_ON_0 = 0,
196    #[doc = "1: Force CLK active"]
197    FRC_SDCLK_ON_1 = 1,
198}
199impl From<FRC_SDCLK_ON_A> for bool {
200    #[inline(always)]
201    fn from(variant: FRC_SDCLK_ON_A) -> Self {
202        variant as u8 != 0
203    }
204}
205impl FRC_SDCLK_ON_R {
206    #[doc = "Get enumerated values variant"]
207    #[inline(always)]
208    pub fn variant(&self) -> FRC_SDCLK_ON_A {
209        match self.bits {
210            false => FRC_SDCLK_ON_A::FRC_SDCLK_ON_0,
211            true => FRC_SDCLK_ON_A::FRC_SDCLK_ON_1,
212        }
213    }
214    #[doc = "Checks if the value of the field is `FRC_SDCLK_ON_0`"]
215    #[inline(always)]
216    pub fn is_frc_sdclk_on_0(&self) -> bool {
217        *self == FRC_SDCLK_ON_A::FRC_SDCLK_ON_0
218    }
219    #[doc = "Checks if the value of the field is `FRC_SDCLK_ON_1`"]
220    #[inline(always)]
221    pub fn is_frc_sdclk_on_1(&self) -> bool {
222        *self == FRC_SDCLK_ON_A::FRC_SDCLK_ON_1
223    }
224}
225#[doc = "Field `FRC_SDCLK_ON` writer - Force CLK"]
226pub type FRC_SDCLK_ON_W<'a, const O: u8> =
227    crate::BitWriter<'a, u32, VEND_SPEC_SPEC, FRC_SDCLK_ON_A, O>;
228impl<'a, const O: u8> FRC_SDCLK_ON_W<'a, O> {
229    #[doc = "CLK active or inactive is fully controlled by the hardware."]
230    #[inline(always)]
231    pub fn frc_sdclk_on_0(self) -> &'a mut W {
232        self.variant(FRC_SDCLK_ON_A::FRC_SDCLK_ON_0)
233    }
234    #[doc = "Force CLK active"]
235    #[inline(always)]
236    pub fn frc_sdclk_on_1(self) -> &'a mut W {
237        self.variant(FRC_SDCLK_ON_A::FRC_SDCLK_ON_1)
238    }
239}
240#[doc = "Field `CRC_CHK_DIS` reader - CRC Check Disable"]
241pub type CRC_CHK_DIS_R = crate::BitReader<CRC_CHK_DIS_A>;
242#[doc = "CRC Check Disable\n\nValue on reset: 0"]
243#[derive(Clone, Copy, Debug, PartialEq, Eq)]
244pub enum CRC_CHK_DIS_A {
245    #[doc = "0: Check CRC16 for every read data packet and check CRC fields for every write data packet"]
246    CRC_CHK_DIS_0 = 0,
247    #[doc = "1: Ignore CRC16 check for every read data packet and ignore CRC fields check for every write data packet"]
248    CRC_CHK_DIS_1 = 1,
249}
250impl From<CRC_CHK_DIS_A> for bool {
251    #[inline(always)]
252    fn from(variant: CRC_CHK_DIS_A) -> Self {
253        variant as u8 != 0
254    }
255}
256impl CRC_CHK_DIS_R {
257    #[doc = "Get enumerated values variant"]
258    #[inline(always)]
259    pub fn variant(&self) -> CRC_CHK_DIS_A {
260        match self.bits {
261            false => CRC_CHK_DIS_A::CRC_CHK_DIS_0,
262            true => CRC_CHK_DIS_A::CRC_CHK_DIS_1,
263        }
264    }
265    #[doc = "Checks if the value of the field is `CRC_CHK_DIS_0`"]
266    #[inline(always)]
267    pub fn is_crc_chk_dis_0(&self) -> bool {
268        *self == CRC_CHK_DIS_A::CRC_CHK_DIS_0
269    }
270    #[doc = "Checks if the value of the field is `CRC_CHK_DIS_1`"]
271    #[inline(always)]
272    pub fn is_crc_chk_dis_1(&self) -> bool {
273        *self == CRC_CHK_DIS_A::CRC_CHK_DIS_1
274    }
275}
276#[doc = "Field `CRC_CHK_DIS` writer - CRC Check Disable"]
277pub type CRC_CHK_DIS_W<'a, const O: u8> =
278    crate::BitWriter<'a, u32, VEND_SPEC_SPEC, CRC_CHK_DIS_A, O>;
279impl<'a, const O: u8> CRC_CHK_DIS_W<'a, O> {
280    #[doc = "Check CRC16 for every read data packet and check CRC fields for every write data packet"]
281    #[inline(always)]
282    pub fn crc_chk_dis_0(self) -> &'a mut W {
283        self.variant(CRC_CHK_DIS_A::CRC_CHK_DIS_0)
284    }
285    #[doc = "Ignore CRC16 check for every read data packet and ignore CRC fields check for every write data packet"]
286    #[inline(always)]
287    pub fn crc_chk_dis_1(self) -> &'a mut W {
288        self.variant(CRC_CHK_DIS_A::CRC_CHK_DIS_1)
289    }
290}
291#[doc = "Field `CMD_BYTE_EN` reader - Byte access"]
292pub type CMD_BYTE_EN_R = crate::BitReader<CMD_BYTE_EN_A>;
293#[doc = "Byte access\n\nValue on reset: 0"]
294#[derive(Clone, Copy, Debug, PartialEq, Eq)]
295pub enum CMD_BYTE_EN_A {
296    #[doc = "0: Disable"]
297    CMD_BYTE_EN_0 = 0,
298    #[doc = "1: Enable"]
299    CMD_BYTE_EN_1 = 1,
300}
301impl From<CMD_BYTE_EN_A> for bool {
302    #[inline(always)]
303    fn from(variant: CMD_BYTE_EN_A) -> Self {
304        variant as u8 != 0
305    }
306}
307impl CMD_BYTE_EN_R {
308    #[doc = "Get enumerated values variant"]
309    #[inline(always)]
310    pub fn variant(&self) -> CMD_BYTE_EN_A {
311        match self.bits {
312            false => CMD_BYTE_EN_A::CMD_BYTE_EN_0,
313            true => CMD_BYTE_EN_A::CMD_BYTE_EN_1,
314        }
315    }
316    #[doc = "Checks if the value of the field is `CMD_BYTE_EN_0`"]
317    #[inline(always)]
318    pub fn is_cmd_byte_en_0(&self) -> bool {
319        *self == CMD_BYTE_EN_A::CMD_BYTE_EN_0
320    }
321    #[doc = "Checks if the value of the field is `CMD_BYTE_EN_1`"]
322    #[inline(always)]
323    pub fn is_cmd_byte_en_1(&self) -> bool {
324        *self == CMD_BYTE_EN_A::CMD_BYTE_EN_1
325    }
326}
327#[doc = "Field `CMD_BYTE_EN` writer - Byte access"]
328pub type CMD_BYTE_EN_W<'a, const O: u8> =
329    crate::BitWriter<'a, u32, VEND_SPEC_SPEC, CMD_BYTE_EN_A, O>;
330impl<'a, const O: u8> CMD_BYTE_EN_W<'a, O> {
331    #[doc = "Disable"]
332    #[inline(always)]
333    pub fn cmd_byte_en_0(self) -> &'a mut W {
334        self.variant(CMD_BYTE_EN_A::CMD_BYTE_EN_0)
335    }
336    #[doc = "Enable"]
337    #[inline(always)]
338    pub fn cmd_byte_en_1(self) -> &'a mut W {
339        self.variant(CMD_BYTE_EN_A::CMD_BYTE_EN_1)
340    }
341}
342impl R {
343    #[doc = "Bit 1 - Voltage selection"]
344    #[inline(always)]
345    pub fn vselect(&self) -> VSELECT_R {
346        VSELECT_R::new(((self.bits >> 1) & 1) != 0)
347    }
348    #[doc = "Bit 2 - Conflict check enable"]
349    #[inline(always)]
350    pub fn conflict_chk_en(&self) -> CONFLICT_CHK_EN_R {
351        CONFLICT_CHK_EN_R::new(((self.bits >> 2) & 1) != 0)
352    }
353    #[doc = "Bit 3 - Check busy enable"]
354    #[inline(always)]
355    pub fn ac12_wr_chkbusy_en(&self) -> AC12_WR_CHKBUSY_EN_R {
356        AC12_WR_CHKBUSY_EN_R::new(((self.bits >> 3) & 1) != 0)
357    }
358    #[doc = "Bit 8 - Force CLK"]
359    #[inline(always)]
360    pub fn frc_sdclk_on(&self) -> FRC_SDCLK_ON_R {
361        FRC_SDCLK_ON_R::new(((self.bits >> 8) & 1) != 0)
362    }
363    #[doc = "Bit 15 - CRC Check Disable"]
364    #[inline(always)]
365    pub fn crc_chk_dis(&self) -> CRC_CHK_DIS_R {
366        CRC_CHK_DIS_R::new(((self.bits >> 15) & 1) != 0)
367    }
368    #[doc = "Bit 31 - Byte access"]
369    #[inline(always)]
370    pub fn cmd_byte_en(&self) -> CMD_BYTE_EN_R {
371        CMD_BYTE_EN_R::new(((self.bits >> 31) & 1) != 0)
372    }
373}
374impl W {
375    #[doc = "Bit 1 - Voltage selection"]
376    #[inline(always)]
377    #[must_use]
378    pub fn vselect(&mut self) -> VSELECT_W<1> {
379        VSELECT_W::new(self)
380    }
381    #[doc = "Bit 2 - Conflict check enable"]
382    #[inline(always)]
383    #[must_use]
384    pub fn conflict_chk_en(&mut self) -> CONFLICT_CHK_EN_W<2> {
385        CONFLICT_CHK_EN_W::new(self)
386    }
387    #[doc = "Bit 3 - Check busy enable"]
388    #[inline(always)]
389    #[must_use]
390    pub fn ac12_wr_chkbusy_en(&mut self) -> AC12_WR_CHKBUSY_EN_W<3> {
391        AC12_WR_CHKBUSY_EN_W::new(self)
392    }
393    #[doc = "Bit 8 - Force CLK"]
394    #[inline(always)]
395    #[must_use]
396    pub fn frc_sdclk_on(&mut self) -> FRC_SDCLK_ON_W<8> {
397        FRC_SDCLK_ON_W::new(self)
398    }
399    #[doc = "Bit 15 - CRC Check Disable"]
400    #[inline(always)]
401    #[must_use]
402    pub fn crc_chk_dis(&mut self) -> CRC_CHK_DIS_W<15> {
403        CRC_CHK_DIS_W::new(self)
404    }
405    #[doc = "Bit 31 - Byte access"]
406    #[inline(always)]
407    #[must_use]
408    pub fn cmd_byte_en(&mut self) -> CMD_BYTE_EN_W<31> {
409        CMD_BYTE_EN_W::new(self)
410    }
411    #[doc = "Writes raw bits to the register."]
412    #[inline(always)]
413    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
414        self.0.bits(bits);
415        self
416    }
417}
418#[doc = "Vendor Specific Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vend_spec](index.html) module"]
419pub struct VEND_SPEC_SPEC;
420impl crate::RegisterSpec for VEND_SPEC_SPEC {
421    type Ux = u32;
422}
423#[doc = "`read()` method returns [vend_spec::R](R) reader structure"]
424impl crate::Readable for VEND_SPEC_SPEC {
425    type Reader = R;
426}
427#[doc = "`write(|w| ..)` method takes [vend_spec::W](W) writer structure"]
428impl crate::Writable for VEND_SPEC_SPEC {
429    type Writer = W;
430    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
431    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
432}
433#[doc = "`reset()` method sets VEND_SPEC to value 0x2000_7809"]
434impl crate::Resettable for VEND_SPEC_SPEC {
435    const RESET_VALUE: Self::Ux = 0x2000_7809;
436}
mimxrt595s/usdhc0/vend_spec.rs

mimxrt595s/usdhc0/
vend_spec.rs
