mimxrt595s/rstctl0/
prstctl1.rs

1#[doc = "Register `PRSTCTL1` reader"]
2pub struct R(crate::R<PRSTCTL1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PRSTCTL1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PRSTCTL1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PRSTCTL1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PRSTCTL1` writer"]
17pub struct W(crate::W<PRSTCTL1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PRSTCTL1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PRSTCTL1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PRSTCTL1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SDIO0` reader - SDIO0 reset control"]
38pub type SDIO0_R = crate::BitReader<SDIO0_A>;
39#[doc = "SDIO0 reset control\n\nValue on reset: 1"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum SDIO0_A {
42    #[doc = "0: Clear Reset"]
43    SDIO0_CLR = 0,
44    #[doc = "1: Set Reset"]
45    SDIO0_SET = 1,
46}
47impl From<SDIO0_A> for bool {
48    #[inline(always)]
49    fn from(variant: SDIO0_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl SDIO0_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> SDIO0_A {
57        match self.bits {
58            false => SDIO0_A::SDIO0_CLR,
59            true => SDIO0_A::SDIO0_SET,
60        }
61    }
62    #[doc = "Checks if the value of the field is `SDIO0_CLR`"]
63    #[inline(always)]
64    pub fn is_sdio0_clr(&self) -> bool {
65        *self == SDIO0_A::SDIO0_CLR
66    }
67    #[doc = "Checks if the value of the field is `SDIO0_SET`"]
68    #[inline(always)]
69    pub fn is_sdio0_set(&self) -> bool {
70        *self == SDIO0_A::SDIO0_SET
71    }
72}
73#[doc = "Field `SDIO0` writer - SDIO0 reset control"]
74pub type SDIO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRSTCTL1_SPEC, SDIO0_A, O>;
75impl<'a, const O: u8> SDIO0_W<'a, O> {
76    #[doc = "Clear Reset"]
77    #[inline(always)]
78    pub fn sdio0_clr(self) -> &'a mut W {
79        self.variant(SDIO0_A::SDIO0_CLR)
80    }
81    #[doc = "Set Reset"]
82    #[inline(always)]
83    pub fn sdio0_set(self) -> &'a mut W {
84        self.variant(SDIO0_A::SDIO0_SET)
85    }
86}
87#[doc = "Field `SDIO1` reader - SDIO1 reset control"]
88pub type SDIO1_R = crate::BitReader<SDIO1_A>;
89#[doc = "SDIO1 reset control\n\nValue on reset: 1"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum SDIO1_A {
92    #[doc = "0: Clear Reset"]
93    SDIO1_CLR = 0,
94    #[doc = "1: Set Reset"]
95    SDIO1_SET = 1,
96}
97impl From<SDIO1_A> for bool {
98    #[inline(always)]
99    fn from(variant: SDIO1_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl SDIO1_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> SDIO1_A {
107        match self.bits {
108            false => SDIO1_A::SDIO1_CLR,
109            true => SDIO1_A::SDIO1_SET,
110        }
111    }
112    #[doc = "Checks if the value of the field is `SDIO1_CLR`"]
113    #[inline(always)]
114    pub fn is_sdio1_clr(&self) -> bool {
115        *self == SDIO1_A::SDIO1_CLR
116    }
117    #[doc = "Checks if the value of the field is `SDIO1_SET`"]
118    #[inline(always)]
119    pub fn is_sdio1_set(&self) -> bool {
120        *self == SDIO1_A::SDIO1_SET
121    }
122}
123#[doc = "Field `SDIO1` writer - SDIO1 reset control"]
124pub type SDIO1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRSTCTL1_SPEC, SDIO1_A, O>;
125impl<'a, const O: u8> SDIO1_W<'a, O> {
126    #[doc = "Clear Reset"]
127    #[inline(always)]
128    pub fn sdio1_clr(self) -> &'a mut W {
129        self.variant(SDIO1_A::SDIO1_CLR)
130    }
131    #[doc = "Set Reset"]
132    #[inline(always)]
133    pub fn sdio1_set(self) -> &'a mut W {
134        self.variant(SDIO1_A::SDIO1_SET)
135    }
136}
137#[doc = "Field `ACMP0` reader - Analog comparator reset control"]
138pub type ACMP0_R = crate::BitReader<ACMP0_A>;
139#[doc = "Analog comparator reset control\n\nValue on reset: 1"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum ACMP0_A {
142    #[doc = "0: Clear Reset"]
143    ACMP0_CLR = 0,
144    #[doc = "1: Set Reset"]
145    ACMP0_SET = 1,
146}
147impl From<ACMP0_A> for bool {
148    #[inline(always)]
149    fn from(variant: ACMP0_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl ACMP0_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> ACMP0_A {
157        match self.bits {
158            false => ACMP0_A::ACMP0_CLR,
159            true => ACMP0_A::ACMP0_SET,
160        }
161    }
162    #[doc = "Checks if the value of the field is `ACMP0_CLR`"]
163    #[inline(always)]
164    pub fn is_acmp0_clr(&self) -> bool {
165        *self == ACMP0_A::ACMP0_CLR
166    }
167    #[doc = "Checks if the value of the field is `ACMP0_SET`"]
168    #[inline(always)]
169    pub fn is_acmp0_set(&self) -> bool {
170        *self == ACMP0_A::ACMP0_SET
171    }
172}
173#[doc = "Field `ACMP0` writer - Analog comparator reset control"]
174pub type ACMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRSTCTL1_SPEC, ACMP0_A, O>;
175impl<'a, const O: u8> ACMP0_W<'a, O> {
176    #[doc = "Clear Reset"]
177    #[inline(always)]
178    pub fn acmp0_clr(self) -> &'a mut W {
179        self.variant(ACMP0_A::ACMP0_CLR)
180    }
181    #[doc = "Set Reset"]
182    #[inline(always)]
183    pub fn acmp0_set(self) -> &'a mut W {
184        self.variant(ACMP0_A::ACMP0_SET)
185    }
186}
187#[doc = "Field `ADC0` reader - Analog-to-Digital converter reset control"]
188pub type ADC0_R = crate::BitReader<ADC0_A>;
189#[doc = "Analog-to-Digital converter reset control\n\nValue on reset: 1"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum ADC0_A {
192    #[doc = "0: Clear Reset"]
193    ADC0_CLR = 0,
194    #[doc = "1: Set Reset"]
195    ADC0_SET = 1,
196}
197impl From<ADC0_A> for bool {
198    #[inline(always)]
199    fn from(variant: ADC0_A) -> Self {
200        variant as u8 != 0
201    }
202}
203impl ADC0_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> ADC0_A {
207        match self.bits {
208            false => ADC0_A::ADC0_CLR,
209            true => ADC0_A::ADC0_SET,
210        }
211    }
212    #[doc = "Checks if the value of the field is `ADC0_CLR`"]
213    #[inline(always)]
214    pub fn is_adc0_clr(&self) -> bool {
215        *self == ADC0_A::ADC0_CLR
216    }
217    #[doc = "Checks if the value of the field is `ADC0_SET`"]
218    #[inline(always)]
219    pub fn is_adc0_set(&self) -> bool {
220        *self == ADC0_A::ADC0_SET
221    }
222}
223#[doc = "Field `ADC0` writer - Analog-to-Digital converter reset control"]
224pub type ADC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRSTCTL1_SPEC, ADC0_A, O>;
225impl<'a, const O: u8> ADC0_W<'a, O> {
226    #[doc = "Clear Reset"]
227    #[inline(always)]
228    pub fn adc0_clr(self) -> &'a mut W {
229        self.variant(ADC0_A::ADC0_CLR)
230    }
231    #[doc = "Set Reset"]
232    #[inline(always)]
233    pub fn adc0_set(self) -> &'a mut W {
234        self.variant(ADC0_A::ADC0_SET)
235    }
236}
237#[doc = "Field `SHSGPIO0` reader - Secure GPIO 0 reset control"]
238pub type SHSGPIO0_R = crate::BitReader<SHSGPIO0_A>;
239#[doc = "Secure GPIO 0 reset control\n\nValue on reset: 1"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum SHSGPIO0_A {
242    #[doc = "0: Clear Reset"]
243    SHSGPIO0_CLR = 0,
244    #[doc = "1: Set Reset"]
245    SHSGPIO0_SET = 1,
246}
247impl From<SHSGPIO0_A> for bool {
248    #[inline(always)]
249    fn from(variant: SHSGPIO0_A) -> Self {
250        variant as u8 != 0
251    }
252}
253impl SHSGPIO0_R {
254    #[doc = "Get enumerated values variant"]
255    #[inline(always)]
256    pub fn variant(&self) -> SHSGPIO0_A {
257        match self.bits {
258            false => SHSGPIO0_A::SHSGPIO0_CLR,
259            true => SHSGPIO0_A::SHSGPIO0_SET,
260        }
261    }
262    #[doc = "Checks if the value of the field is `SHSGPIO0_CLR`"]
263    #[inline(always)]
264    pub fn is_shsgpio0_clr(&self) -> bool {
265        *self == SHSGPIO0_A::SHSGPIO0_CLR
266    }
267    #[doc = "Checks if the value of the field is `SHSGPIO0_SET`"]
268    #[inline(always)]
269    pub fn is_shsgpio0_set(&self) -> bool {
270        *self == SHSGPIO0_A::SHSGPIO0_SET
271    }
272}
273#[doc = "Field `SHSGPIO0` writer - Secure GPIO 0 reset control"]
274pub type SHSGPIO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRSTCTL1_SPEC, SHSGPIO0_A, O>;
275impl<'a, const O: u8> SHSGPIO0_W<'a, O> {
276    #[doc = "Clear Reset"]
277    #[inline(always)]
278    pub fn shsgpio0_clr(self) -> &'a mut W {
279        self.variant(SHSGPIO0_A::SHSGPIO0_CLR)
280    }
281    #[doc = "Set Reset"]
282    #[inline(always)]
283    pub fn shsgpio0_set(self) -> &'a mut W {
284        self.variant(SHSGPIO0_A::SHSGPIO0_SET)
285    }
286}
287impl R {
288    #[doc = "Bit 2 - SDIO0 reset control"]
289    #[inline(always)]
290    pub fn sdio0(&self) -> SDIO0_R {
291        SDIO0_R::new(((self.bits >> 2) & 1) != 0)
292    }
293    #[doc = "Bit 3 - SDIO1 reset control"]
294    #[inline(always)]
295    pub fn sdio1(&self) -> SDIO1_R {
296        SDIO1_R::new(((self.bits >> 3) & 1) != 0)
297    }
298    #[doc = "Bit 15 - Analog comparator reset control"]
299    #[inline(always)]
300    pub fn acmp0(&self) -> ACMP0_R {
301        ACMP0_R::new(((self.bits >> 15) & 1) != 0)
302    }
303    #[doc = "Bit 16 - Analog-to-Digital converter reset control"]
304    #[inline(always)]
305    pub fn adc0(&self) -> ADC0_R {
306        ADC0_R::new(((self.bits >> 16) & 1) != 0)
307    }
308    #[doc = "Bit 24 - Secure GPIO 0 reset control"]
309    #[inline(always)]
310    pub fn shsgpio0(&self) -> SHSGPIO0_R {
311        SHSGPIO0_R::new(((self.bits >> 24) & 1) != 0)
312    }
313}
314impl W {
315    #[doc = "Bit 2 - SDIO0 reset control"]
316    #[inline(always)]
317    #[must_use]
318    pub fn sdio0(&mut self) -> SDIO0_W<2> {
319        SDIO0_W::new(self)
320    }
321    #[doc = "Bit 3 - SDIO1 reset control"]
322    #[inline(always)]
323    #[must_use]
324    pub fn sdio1(&mut self) -> SDIO1_W<3> {
325        SDIO1_W::new(self)
326    }
327    #[doc = "Bit 15 - Analog comparator reset control"]
328    #[inline(always)]
329    #[must_use]
330    pub fn acmp0(&mut self) -> ACMP0_W<15> {
331        ACMP0_W::new(self)
332    }
333    #[doc = "Bit 16 - Analog-to-Digital converter reset control"]
334    #[inline(always)]
335    #[must_use]
336    pub fn adc0(&mut self) -> ADC0_W<16> {
337        ADC0_W::new(self)
338    }
339    #[doc = "Bit 24 - Secure GPIO 0 reset control"]
340    #[inline(always)]
341    #[must_use]
342    pub fn shsgpio0(&mut self) -> SHSGPIO0_W<24> {
343        SHSGPIO0_W::new(self)
344    }
345    #[doc = "Writes raw bits to the register."]
346    #[inline(always)]
347    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
348        self.0.bits(bits);
349        self
350    }
351}
352#[doc = "Peripheral Reset Control Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prstctl1](index.html) module"]
353pub struct PRSTCTL1_SPEC;
354impl crate::RegisterSpec for PRSTCTL1_SPEC {
355    type Ux = u32;
356}
357#[doc = "`read()` method returns [prstctl1::R](R) reader structure"]
358impl crate::Readable for PRSTCTL1_SPEC {
359    type Reader = R;
360}
361#[doc = "`write(|w| ..)` method takes [prstctl1::W](W) writer structure"]
362impl crate::Writable for PRSTCTL1_SPEC {
363    type Writer = W;
364    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
365    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
366}
367#[doc = "`reset()` method sets PRSTCTL1 to value 0x0101_800c"]
368impl crate::Resettable for PRSTCTL1_SPEC {
369    const RESET_VALUE: Self::Ux = 0x0101_800c;
370}
mimxrt595s/rstctl0/prstctl1.rs

mimxrt595s/rstctl0/
prstctl1.rs
