1#[doc = "Register `DIRSET[%s]` writer"]
2pub struct W(crate::W<DIRSET_SPEC>);
3impl core::ops::Deref for W {
4 type Target = crate::W<DIRSET_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl core::ops::DerefMut for W {
11 #[inline(always)]
12 fn deref_mut(&mut self) -> &mut Self::Target {
13 &mut self.0
14 }
15}
16impl From<crate::W<DIRSET_SPEC>> for W {
17 #[inline(always)]
18 fn from(writer: crate::W<DIRSET_SPEC>) -> Self {
19 W(writer)
20 }
21}
22#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
23#[derive(Clone, Copy, Debug, PartialEq, Eq)]
24pub enum DIRSETP0_AW {
25 #[doc = "0: No operation"]
26 DIRSETP_0 = 0,
27 #[doc = "1: Sets direction bit"]
28 DIRSETP_1 = 1,
29}
30impl From<DIRSETP0_AW> for bool {
31 #[inline(always)]
32 fn from(variant: DIRSETP0_AW) -> Self {
33 variant as u8 != 0
34 }
35}
36#[doc = "Field `DIRSETP0` writer - Direction set bits for Port pins"]
37pub type DIRSETP0_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP0_AW, O>;
38impl<'a, const O: u8> DIRSETP0_W<'a, O> {
39 #[doc = "No operation"]
40 #[inline(always)]
41 pub fn dirsetp_0(self) -> &'a mut W {
42 self.variant(DIRSETP0_AW::DIRSETP_0)
43 }
44 #[doc = "Sets direction bit"]
45 #[inline(always)]
46 pub fn dirsetp_1(self) -> &'a mut W {
47 self.variant(DIRSETP0_AW::DIRSETP_1)
48 }
49}
50#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
51#[derive(Clone, Copy, Debug, PartialEq, Eq)]
52pub enum DIRSETP1_AW {
53 #[doc = "0: No operation"]
54 DIRSETP_0 = 0,
55 #[doc = "1: Sets direction bit"]
56 DIRSETP_1 = 1,
57}
58impl From<DIRSETP1_AW> for bool {
59 #[inline(always)]
60 fn from(variant: DIRSETP1_AW) -> Self {
61 variant as u8 != 0
62 }
63}
64#[doc = "Field `DIRSETP1` writer - Direction set bits for Port pins"]
65pub type DIRSETP1_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP1_AW, O>;
66impl<'a, const O: u8> DIRSETP1_W<'a, O> {
67 #[doc = "No operation"]
68 #[inline(always)]
69 pub fn dirsetp_0(self) -> &'a mut W {
70 self.variant(DIRSETP1_AW::DIRSETP_0)
71 }
72 #[doc = "Sets direction bit"]
73 #[inline(always)]
74 pub fn dirsetp_1(self) -> &'a mut W {
75 self.variant(DIRSETP1_AW::DIRSETP_1)
76 }
77}
78#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
79#[derive(Clone, Copy, Debug, PartialEq, Eq)]
80pub enum DIRSETP2_AW {
81 #[doc = "0: No operation"]
82 DIRSETP_0 = 0,
83 #[doc = "1: Sets direction bit"]
84 DIRSETP_1 = 1,
85}
86impl From<DIRSETP2_AW> for bool {
87 #[inline(always)]
88 fn from(variant: DIRSETP2_AW) -> Self {
89 variant as u8 != 0
90 }
91}
92#[doc = "Field `DIRSETP2` writer - Direction set bits for Port pins"]
93pub type DIRSETP2_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP2_AW, O>;
94impl<'a, const O: u8> DIRSETP2_W<'a, O> {
95 #[doc = "No operation"]
96 #[inline(always)]
97 pub fn dirsetp_0(self) -> &'a mut W {
98 self.variant(DIRSETP2_AW::DIRSETP_0)
99 }
100 #[doc = "Sets direction bit"]
101 #[inline(always)]
102 pub fn dirsetp_1(self) -> &'a mut W {
103 self.variant(DIRSETP2_AW::DIRSETP_1)
104 }
105}
106#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
107#[derive(Clone, Copy, Debug, PartialEq, Eq)]
108pub enum DIRSETP3_AW {
109 #[doc = "0: No operation"]
110 DIRSETP_0 = 0,
111 #[doc = "1: Sets direction bit"]
112 DIRSETP_1 = 1,
113}
114impl From<DIRSETP3_AW> for bool {
115 #[inline(always)]
116 fn from(variant: DIRSETP3_AW) -> Self {
117 variant as u8 != 0
118 }
119}
120#[doc = "Field `DIRSETP3` writer - Direction set bits for Port pins"]
121pub type DIRSETP3_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP3_AW, O>;
122impl<'a, const O: u8> DIRSETP3_W<'a, O> {
123 #[doc = "No operation"]
124 #[inline(always)]
125 pub fn dirsetp_0(self) -> &'a mut W {
126 self.variant(DIRSETP3_AW::DIRSETP_0)
127 }
128 #[doc = "Sets direction bit"]
129 #[inline(always)]
130 pub fn dirsetp_1(self) -> &'a mut W {
131 self.variant(DIRSETP3_AW::DIRSETP_1)
132 }
133}
134#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
135#[derive(Clone, Copy, Debug, PartialEq, Eq)]
136pub enum DIRSETP4_AW {
137 #[doc = "0: No operation"]
138 DIRSETP_0 = 0,
139 #[doc = "1: Sets direction bit"]
140 DIRSETP_1 = 1,
141}
142impl From<DIRSETP4_AW> for bool {
143 #[inline(always)]
144 fn from(variant: DIRSETP4_AW) -> Self {
145 variant as u8 != 0
146 }
147}
148#[doc = "Field `DIRSETP4` writer - Direction set bits for Port pins"]
149pub type DIRSETP4_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP4_AW, O>;
150impl<'a, const O: u8> DIRSETP4_W<'a, O> {
151 #[doc = "No operation"]
152 #[inline(always)]
153 pub fn dirsetp_0(self) -> &'a mut W {
154 self.variant(DIRSETP4_AW::DIRSETP_0)
155 }
156 #[doc = "Sets direction bit"]
157 #[inline(always)]
158 pub fn dirsetp_1(self) -> &'a mut W {
159 self.variant(DIRSETP4_AW::DIRSETP_1)
160 }
161}
162#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
163#[derive(Clone, Copy, Debug, PartialEq, Eq)]
164pub enum DIRSETP5_AW {
165 #[doc = "0: No operation"]
166 DIRSETP_0 = 0,
167 #[doc = "1: Sets direction bit"]
168 DIRSETP_1 = 1,
169}
170impl From<DIRSETP5_AW> for bool {
171 #[inline(always)]
172 fn from(variant: DIRSETP5_AW) -> Self {
173 variant as u8 != 0
174 }
175}
176#[doc = "Field `DIRSETP5` writer - Direction set bits for Port pins"]
177pub type DIRSETP5_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP5_AW, O>;
178impl<'a, const O: u8> DIRSETP5_W<'a, O> {
179 #[doc = "No operation"]
180 #[inline(always)]
181 pub fn dirsetp_0(self) -> &'a mut W {
182 self.variant(DIRSETP5_AW::DIRSETP_0)
183 }
184 #[doc = "Sets direction bit"]
185 #[inline(always)]
186 pub fn dirsetp_1(self) -> &'a mut W {
187 self.variant(DIRSETP5_AW::DIRSETP_1)
188 }
189}
190#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
191#[derive(Clone, Copy, Debug, PartialEq, Eq)]
192pub enum DIRSETP6_AW {
193 #[doc = "0: No operation"]
194 DIRSETP_0 = 0,
195 #[doc = "1: Sets direction bit"]
196 DIRSETP_1 = 1,
197}
198impl From<DIRSETP6_AW> for bool {
199 #[inline(always)]
200 fn from(variant: DIRSETP6_AW) -> Self {
201 variant as u8 != 0
202 }
203}
204#[doc = "Field `DIRSETP6` writer - Direction set bits for Port pins"]
205pub type DIRSETP6_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP6_AW, O>;
206impl<'a, const O: u8> DIRSETP6_W<'a, O> {
207 #[doc = "No operation"]
208 #[inline(always)]
209 pub fn dirsetp_0(self) -> &'a mut W {
210 self.variant(DIRSETP6_AW::DIRSETP_0)
211 }
212 #[doc = "Sets direction bit"]
213 #[inline(always)]
214 pub fn dirsetp_1(self) -> &'a mut W {
215 self.variant(DIRSETP6_AW::DIRSETP_1)
216 }
217}
218#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
219#[derive(Clone, Copy, Debug, PartialEq, Eq)]
220pub enum DIRSETP7_AW {
221 #[doc = "0: No operation"]
222 DIRSETP_0 = 0,
223 #[doc = "1: Sets direction bit"]
224 DIRSETP_1 = 1,
225}
226impl From<DIRSETP7_AW> for bool {
227 #[inline(always)]
228 fn from(variant: DIRSETP7_AW) -> Self {
229 variant as u8 != 0
230 }
231}
232#[doc = "Field `DIRSETP7` writer - Direction set bits for Port pins"]
233pub type DIRSETP7_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP7_AW, O>;
234impl<'a, const O: u8> DIRSETP7_W<'a, O> {
235 #[doc = "No operation"]
236 #[inline(always)]
237 pub fn dirsetp_0(self) -> &'a mut W {
238 self.variant(DIRSETP7_AW::DIRSETP_0)
239 }
240 #[doc = "Sets direction bit"]
241 #[inline(always)]
242 pub fn dirsetp_1(self) -> &'a mut W {
243 self.variant(DIRSETP7_AW::DIRSETP_1)
244 }
245}
246#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
247#[derive(Clone, Copy, Debug, PartialEq, Eq)]
248pub enum DIRSETP8_AW {
249 #[doc = "0: No operation"]
250 DIRSETP_0 = 0,
251 #[doc = "1: Sets direction bit"]
252 DIRSETP_1 = 1,
253}
254impl From<DIRSETP8_AW> for bool {
255 #[inline(always)]
256 fn from(variant: DIRSETP8_AW) -> Self {
257 variant as u8 != 0
258 }
259}
260#[doc = "Field `DIRSETP8` writer - Direction set bits for Port pins"]
261pub type DIRSETP8_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP8_AW, O>;
262impl<'a, const O: u8> DIRSETP8_W<'a, O> {
263 #[doc = "No operation"]
264 #[inline(always)]
265 pub fn dirsetp_0(self) -> &'a mut W {
266 self.variant(DIRSETP8_AW::DIRSETP_0)
267 }
268 #[doc = "Sets direction bit"]
269 #[inline(always)]
270 pub fn dirsetp_1(self) -> &'a mut W {
271 self.variant(DIRSETP8_AW::DIRSETP_1)
272 }
273}
274#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
275#[derive(Clone, Copy, Debug, PartialEq, Eq)]
276pub enum DIRSETP9_AW {
277 #[doc = "0: No operation"]
278 DIRSETP_0 = 0,
279 #[doc = "1: Sets direction bit"]
280 DIRSETP_1 = 1,
281}
282impl From<DIRSETP9_AW> for bool {
283 #[inline(always)]
284 fn from(variant: DIRSETP9_AW) -> Self {
285 variant as u8 != 0
286 }
287}
288#[doc = "Field `DIRSETP9` writer - Direction set bits for Port pins"]
289pub type DIRSETP9_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP9_AW, O>;
290impl<'a, const O: u8> DIRSETP9_W<'a, O> {
291 #[doc = "No operation"]
292 #[inline(always)]
293 pub fn dirsetp_0(self) -> &'a mut W {
294 self.variant(DIRSETP9_AW::DIRSETP_0)
295 }
296 #[doc = "Sets direction bit"]
297 #[inline(always)]
298 pub fn dirsetp_1(self) -> &'a mut W {
299 self.variant(DIRSETP9_AW::DIRSETP_1)
300 }
301}
302#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
303#[derive(Clone, Copy, Debug, PartialEq, Eq)]
304pub enum DIRSETP10_AW {
305 #[doc = "0: No operation"]
306 DIRSETP_0 = 0,
307 #[doc = "1: Sets direction bit"]
308 DIRSETP_1 = 1,
309}
310impl From<DIRSETP10_AW> for bool {
311 #[inline(always)]
312 fn from(variant: DIRSETP10_AW) -> Self {
313 variant as u8 != 0
314 }
315}
316#[doc = "Field `DIRSETP10` writer - Direction set bits for Port pins"]
317pub type DIRSETP10_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP10_AW, O>;
318impl<'a, const O: u8> DIRSETP10_W<'a, O> {
319 #[doc = "No operation"]
320 #[inline(always)]
321 pub fn dirsetp_0(self) -> &'a mut W {
322 self.variant(DIRSETP10_AW::DIRSETP_0)
323 }
324 #[doc = "Sets direction bit"]
325 #[inline(always)]
326 pub fn dirsetp_1(self) -> &'a mut W {
327 self.variant(DIRSETP10_AW::DIRSETP_1)
328 }
329}
330#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum DIRSETP11_AW {
333 #[doc = "0: No operation"]
334 DIRSETP_0 = 0,
335 #[doc = "1: Sets direction bit"]
336 DIRSETP_1 = 1,
337}
338impl From<DIRSETP11_AW> for bool {
339 #[inline(always)]
340 fn from(variant: DIRSETP11_AW) -> Self {
341 variant as u8 != 0
342 }
343}
344#[doc = "Field `DIRSETP11` writer - Direction set bits for Port pins"]
345pub type DIRSETP11_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP11_AW, O>;
346impl<'a, const O: u8> DIRSETP11_W<'a, O> {
347 #[doc = "No operation"]
348 #[inline(always)]
349 pub fn dirsetp_0(self) -> &'a mut W {
350 self.variant(DIRSETP11_AW::DIRSETP_0)
351 }
352 #[doc = "Sets direction bit"]
353 #[inline(always)]
354 pub fn dirsetp_1(self) -> &'a mut W {
355 self.variant(DIRSETP11_AW::DIRSETP_1)
356 }
357}
358#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
359#[derive(Clone, Copy, Debug, PartialEq, Eq)]
360pub enum DIRSETP12_AW {
361 #[doc = "0: No operation"]
362 DIRSETP_0 = 0,
363 #[doc = "1: Sets direction bit"]
364 DIRSETP_1 = 1,
365}
366impl From<DIRSETP12_AW> for bool {
367 #[inline(always)]
368 fn from(variant: DIRSETP12_AW) -> Self {
369 variant as u8 != 0
370 }
371}
372#[doc = "Field `DIRSETP12` writer - Direction set bits for Port pins"]
373pub type DIRSETP12_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP12_AW, O>;
374impl<'a, const O: u8> DIRSETP12_W<'a, O> {
375 #[doc = "No operation"]
376 #[inline(always)]
377 pub fn dirsetp_0(self) -> &'a mut W {
378 self.variant(DIRSETP12_AW::DIRSETP_0)
379 }
380 #[doc = "Sets direction bit"]
381 #[inline(always)]
382 pub fn dirsetp_1(self) -> &'a mut W {
383 self.variant(DIRSETP12_AW::DIRSETP_1)
384 }
385}
386#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
387#[derive(Clone, Copy, Debug, PartialEq, Eq)]
388pub enum DIRSETP13_AW {
389 #[doc = "0: No operation"]
390 DIRSETP_0 = 0,
391 #[doc = "1: Sets direction bit"]
392 DIRSETP_1 = 1,
393}
394impl From<DIRSETP13_AW> for bool {
395 #[inline(always)]
396 fn from(variant: DIRSETP13_AW) -> Self {
397 variant as u8 != 0
398 }
399}
400#[doc = "Field `DIRSETP13` writer - Direction set bits for Port pins"]
401pub type DIRSETP13_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP13_AW, O>;
402impl<'a, const O: u8> DIRSETP13_W<'a, O> {
403 #[doc = "No operation"]
404 #[inline(always)]
405 pub fn dirsetp_0(self) -> &'a mut W {
406 self.variant(DIRSETP13_AW::DIRSETP_0)
407 }
408 #[doc = "Sets direction bit"]
409 #[inline(always)]
410 pub fn dirsetp_1(self) -> &'a mut W {
411 self.variant(DIRSETP13_AW::DIRSETP_1)
412 }
413}
414#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
415#[derive(Clone, Copy, Debug, PartialEq, Eq)]
416pub enum DIRSETP14_AW {
417 #[doc = "0: No operation"]
418 DIRSETP_0 = 0,
419 #[doc = "1: Sets direction bit"]
420 DIRSETP_1 = 1,
421}
422impl From<DIRSETP14_AW> for bool {
423 #[inline(always)]
424 fn from(variant: DIRSETP14_AW) -> Self {
425 variant as u8 != 0
426 }
427}
428#[doc = "Field `DIRSETP14` writer - Direction set bits for Port pins"]
429pub type DIRSETP14_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP14_AW, O>;
430impl<'a, const O: u8> DIRSETP14_W<'a, O> {
431 #[doc = "No operation"]
432 #[inline(always)]
433 pub fn dirsetp_0(self) -> &'a mut W {
434 self.variant(DIRSETP14_AW::DIRSETP_0)
435 }
436 #[doc = "Sets direction bit"]
437 #[inline(always)]
438 pub fn dirsetp_1(self) -> &'a mut W {
439 self.variant(DIRSETP14_AW::DIRSETP_1)
440 }
441}
442#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
443#[derive(Clone, Copy, Debug, PartialEq, Eq)]
444pub enum DIRSETP15_AW {
445 #[doc = "0: No operation"]
446 DIRSETP_0 = 0,
447 #[doc = "1: Sets direction bit"]
448 DIRSETP_1 = 1,
449}
450impl From<DIRSETP15_AW> for bool {
451 #[inline(always)]
452 fn from(variant: DIRSETP15_AW) -> Self {
453 variant as u8 != 0
454 }
455}
456#[doc = "Field `DIRSETP15` writer - Direction set bits for Port pins"]
457pub type DIRSETP15_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP15_AW, O>;
458impl<'a, const O: u8> DIRSETP15_W<'a, O> {
459 #[doc = "No operation"]
460 #[inline(always)]
461 pub fn dirsetp_0(self) -> &'a mut W {
462 self.variant(DIRSETP15_AW::DIRSETP_0)
463 }
464 #[doc = "Sets direction bit"]
465 #[inline(always)]
466 pub fn dirsetp_1(self) -> &'a mut W {
467 self.variant(DIRSETP15_AW::DIRSETP_1)
468 }
469}
470#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
471#[derive(Clone, Copy, Debug, PartialEq, Eq)]
472pub enum DIRSETP16_AW {
473 #[doc = "0: No operation"]
474 DIRSETP_0 = 0,
475 #[doc = "1: Sets direction bit"]
476 DIRSETP_1 = 1,
477}
478impl From<DIRSETP16_AW> for bool {
479 #[inline(always)]
480 fn from(variant: DIRSETP16_AW) -> Self {
481 variant as u8 != 0
482 }
483}
484#[doc = "Field `DIRSETP16` writer - Direction set bits for Port pins"]
485pub type DIRSETP16_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP16_AW, O>;
486impl<'a, const O: u8> DIRSETP16_W<'a, O> {
487 #[doc = "No operation"]
488 #[inline(always)]
489 pub fn dirsetp_0(self) -> &'a mut W {
490 self.variant(DIRSETP16_AW::DIRSETP_0)
491 }
492 #[doc = "Sets direction bit"]
493 #[inline(always)]
494 pub fn dirsetp_1(self) -> &'a mut W {
495 self.variant(DIRSETP16_AW::DIRSETP_1)
496 }
497}
498#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
499#[derive(Clone, Copy, Debug, PartialEq, Eq)]
500pub enum DIRSETP17_AW {
501 #[doc = "0: No operation"]
502 DIRSETP_0 = 0,
503 #[doc = "1: Sets direction bit"]
504 DIRSETP_1 = 1,
505}
506impl From<DIRSETP17_AW> for bool {
507 #[inline(always)]
508 fn from(variant: DIRSETP17_AW) -> Self {
509 variant as u8 != 0
510 }
511}
512#[doc = "Field `DIRSETP17` writer - Direction set bits for Port pins"]
513pub type DIRSETP17_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP17_AW, O>;
514impl<'a, const O: u8> DIRSETP17_W<'a, O> {
515 #[doc = "No operation"]
516 #[inline(always)]
517 pub fn dirsetp_0(self) -> &'a mut W {
518 self.variant(DIRSETP17_AW::DIRSETP_0)
519 }
520 #[doc = "Sets direction bit"]
521 #[inline(always)]
522 pub fn dirsetp_1(self) -> &'a mut W {
523 self.variant(DIRSETP17_AW::DIRSETP_1)
524 }
525}
526#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
527#[derive(Clone, Copy, Debug, PartialEq, Eq)]
528pub enum DIRSETP18_AW {
529 #[doc = "0: No operation"]
530 DIRSETP_0 = 0,
531 #[doc = "1: Sets direction bit"]
532 DIRSETP_1 = 1,
533}
534impl From<DIRSETP18_AW> for bool {
535 #[inline(always)]
536 fn from(variant: DIRSETP18_AW) -> Self {
537 variant as u8 != 0
538 }
539}
540#[doc = "Field `DIRSETP18` writer - Direction set bits for Port pins"]
541pub type DIRSETP18_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP18_AW, O>;
542impl<'a, const O: u8> DIRSETP18_W<'a, O> {
543 #[doc = "No operation"]
544 #[inline(always)]
545 pub fn dirsetp_0(self) -> &'a mut W {
546 self.variant(DIRSETP18_AW::DIRSETP_0)
547 }
548 #[doc = "Sets direction bit"]
549 #[inline(always)]
550 pub fn dirsetp_1(self) -> &'a mut W {
551 self.variant(DIRSETP18_AW::DIRSETP_1)
552 }
553}
554#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
555#[derive(Clone, Copy, Debug, PartialEq, Eq)]
556pub enum DIRSETP19_AW {
557 #[doc = "0: No operation"]
558 DIRSETP_0 = 0,
559 #[doc = "1: Sets direction bit"]
560 DIRSETP_1 = 1,
561}
562impl From<DIRSETP19_AW> for bool {
563 #[inline(always)]
564 fn from(variant: DIRSETP19_AW) -> Self {
565 variant as u8 != 0
566 }
567}
568#[doc = "Field `DIRSETP19` writer - Direction set bits for Port pins"]
569pub type DIRSETP19_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP19_AW, O>;
570impl<'a, const O: u8> DIRSETP19_W<'a, O> {
571 #[doc = "No operation"]
572 #[inline(always)]
573 pub fn dirsetp_0(self) -> &'a mut W {
574 self.variant(DIRSETP19_AW::DIRSETP_0)
575 }
576 #[doc = "Sets direction bit"]
577 #[inline(always)]
578 pub fn dirsetp_1(self) -> &'a mut W {
579 self.variant(DIRSETP19_AW::DIRSETP_1)
580 }
581}
582#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
583#[derive(Clone, Copy, Debug, PartialEq, Eq)]
584pub enum DIRSETP20_AW {
585 #[doc = "0: No operation"]
586 DIRSETP_0 = 0,
587 #[doc = "1: Sets direction bit"]
588 DIRSETP_1 = 1,
589}
590impl From<DIRSETP20_AW> for bool {
591 #[inline(always)]
592 fn from(variant: DIRSETP20_AW) -> Self {
593 variant as u8 != 0
594 }
595}
596#[doc = "Field `DIRSETP20` writer - Direction set bits for Port pins"]
597pub type DIRSETP20_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP20_AW, O>;
598impl<'a, const O: u8> DIRSETP20_W<'a, O> {
599 #[doc = "No operation"]
600 #[inline(always)]
601 pub fn dirsetp_0(self) -> &'a mut W {
602 self.variant(DIRSETP20_AW::DIRSETP_0)
603 }
604 #[doc = "Sets direction bit"]
605 #[inline(always)]
606 pub fn dirsetp_1(self) -> &'a mut W {
607 self.variant(DIRSETP20_AW::DIRSETP_1)
608 }
609}
610#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
611#[derive(Clone, Copy, Debug, PartialEq, Eq)]
612pub enum DIRSETP21_AW {
613 #[doc = "0: No operation"]
614 DIRSETP_0 = 0,
615 #[doc = "1: Sets direction bit"]
616 DIRSETP_1 = 1,
617}
618impl From<DIRSETP21_AW> for bool {
619 #[inline(always)]
620 fn from(variant: DIRSETP21_AW) -> Self {
621 variant as u8 != 0
622 }
623}
624#[doc = "Field `DIRSETP21` writer - Direction set bits for Port pins"]
625pub type DIRSETP21_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP21_AW, O>;
626impl<'a, const O: u8> DIRSETP21_W<'a, O> {
627 #[doc = "No operation"]
628 #[inline(always)]
629 pub fn dirsetp_0(self) -> &'a mut W {
630 self.variant(DIRSETP21_AW::DIRSETP_0)
631 }
632 #[doc = "Sets direction bit"]
633 #[inline(always)]
634 pub fn dirsetp_1(self) -> &'a mut W {
635 self.variant(DIRSETP21_AW::DIRSETP_1)
636 }
637}
638#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
639#[derive(Clone, Copy, Debug, PartialEq, Eq)]
640pub enum DIRSETP22_AW {
641 #[doc = "0: No operation"]
642 DIRSETP_0 = 0,
643 #[doc = "1: Sets direction bit"]
644 DIRSETP_1 = 1,
645}
646impl From<DIRSETP22_AW> for bool {
647 #[inline(always)]
648 fn from(variant: DIRSETP22_AW) -> Self {
649 variant as u8 != 0
650 }
651}
652#[doc = "Field `DIRSETP22` writer - Direction set bits for Port pins"]
653pub type DIRSETP22_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP22_AW, O>;
654impl<'a, const O: u8> DIRSETP22_W<'a, O> {
655 #[doc = "No operation"]
656 #[inline(always)]
657 pub fn dirsetp_0(self) -> &'a mut W {
658 self.variant(DIRSETP22_AW::DIRSETP_0)
659 }
660 #[doc = "Sets direction bit"]
661 #[inline(always)]
662 pub fn dirsetp_1(self) -> &'a mut W {
663 self.variant(DIRSETP22_AW::DIRSETP_1)
664 }
665}
666#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
667#[derive(Clone, Copy, Debug, PartialEq, Eq)]
668pub enum DIRSETP23_AW {
669 #[doc = "0: No operation"]
670 DIRSETP_0 = 0,
671 #[doc = "1: Sets direction bit"]
672 DIRSETP_1 = 1,
673}
674impl From<DIRSETP23_AW> for bool {
675 #[inline(always)]
676 fn from(variant: DIRSETP23_AW) -> Self {
677 variant as u8 != 0
678 }
679}
680#[doc = "Field `DIRSETP23` writer - Direction set bits for Port pins"]
681pub type DIRSETP23_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP23_AW, O>;
682impl<'a, const O: u8> DIRSETP23_W<'a, O> {
683 #[doc = "No operation"]
684 #[inline(always)]
685 pub fn dirsetp_0(self) -> &'a mut W {
686 self.variant(DIRSETP23_AW::DIRSETP_0)
687 }
688 #[doc = "Sets direction bit"]
689 #[inline(always)]
690 pub fn dirsetp_1(self) -> &'a mut W {
691 self.variant(DIRSETP23_AW::DIRSETP_1)
692 }
693}
694#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
695#[derive(Clone, Copy, Debug, PartialEq, Eq)]
696pub enum DIRSETP24_AW {
697 #[doc = "0: No operation"]
698 DIRSETP_0 = 0,
699 #[doc = "1: Sets direction bit"]
700 DIRSETP_1 = 1,
701}
702impl From<DIRSETP24_AW> for bool {
703 #[inline(always)]
704 fn from(variant: DIRSETP24_AW) -> Self {
705 variant as u8 != 0
706 }
707}
708#[doc = "Field `DIRSETP24` writer - Direction set bits for Port pins"]
709pub type DIRSETP24_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP24_AW, O>;
710impl<'a, const O: u8> DIRSETP24_W<'a, O> {
711 #[doc = "No operation"]
712 #[inline(always)]
713 pub fn dirsetp_0(self) -> &'a mut W {
714 self.variant(DIRSETP24_AW::DIRSETP_0)
715 }
716 #[doc = "Sets direction bit"]
717 #[inline(always)]
718 pub fn dirsetp_1(self) -> &'a mut W {
719 self.variant(DIRSETP24_AW::DIRSETP_1)
720 }
721}
722#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
723#[derive(Clone, Copy, Debug, PartialEq, Eq)]
724pub enum DIRSETP25_AW {
725 #[doc = "0: No operation"]
726 DIRSETP_0 = 0,
727 #[doc = "1: Sets direction bit"]
728 DIRSETP_1 = 1,
729}
730impl From<DIRSETP25_AW> for bool {
731 #[inline(always)]
732 fn from(variant: DIRSETP25_AW) -> Self {
733 variant as u8 != 0
734 }
735}
736#[doc = "Field `DIRSETP25` writer - Direction set bits for Port pins"]
737pub type DIRSETP25_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP25_AW, O>;
738impl<'a, const O: u8> DIRSETP25_W<'a, O> {
739 #[doc = "No operation"]
740 #[inline(always)]
741 pub fn dirsetp_0(self) -> &'a mut W {
742 self.variant(DIRSETP25_AW::DIRSETP_0)
743 }
744 #[doc = "Sets direction bit"]
745 #[inline(always)]
746 pub fn dirsetp_1(self) -> &'a mut W {
747 self.variant(DIRSETP25_AW::DIRSETP_1)
748 }
749}
750#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
751#[derive(Clone, Copy, Debug, PartialEq, Eq)]
752pub enum DIRSETP26_AW {
753 #[doc = "0: No operation"]
754 DIRSETP_0 = 0,
755 #[doc = "1: Sets direction bit"]
756 DIRSETP_1 = 1,
757}
758impl From<DIRSETP26_AW> for bool {
759 #[inline(always)]
760 fn from(variant: DIRSETP26_AW) -> Self {
761 variant as u8 != 0
762 }
763}
764#[doc = "Field `DIRSETP26` writer - Direction set bits for Port pins"]
765pub type DIRSETP26_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP26_AW, O>;
766impl<'a, const O: u8> DIRSETP26_W<'a, O> {
767 #[doc = "No operation"]
768 #[inline(always)]
769 pub fn dirsetp_0(self) -> &'a mut W {
770 self.variant(DIRSETP26_AW::DIRSETP_0)
771 }
772 #[doc = "Sets direction bit"]
773 #[inline(always)]
774 pub fn dirsetp_1(self) -> &'a mut W {
775 self.variant(DIRSETP26_AW::DIRSETP_1)
776 }
777}
778#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
779#[derive(Clone, Copy, Debug, PartialEq, Eq)]
780pub enum DIRSETP27_AW {
781 #[doc = "0: No operation"]
782 DIRSETP_0 = 0,
783 #[doc = "1: Sets direction bit"]
784 DIRSETP_1 = 1,
785}
786impl From<DIRSETP27_AW> for bool {
787 #[inline(always)]
788 fn from(variant: DIRSETP27_AW) -> Self {
789 variant as u8 != 0
790 }
791}
792#[doc = "Field `DIRSETP27` writer - Direction set bits for Port pins"]
793pub type DIRSETP27_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP27_AW, O>;
794impl<'a, const O: u8> DIRSETP27_W<'a, O> {
795 #[doc = "No operation"]
796 #[inline(always)]
797 pub fn dirsetp_0(self) -> &'a mut W {
798 self.variant(DIRSETP27_AW::DIRSETP_0)
799 }
800 #[doc = "Sets direction bit"]
801 #[inline(always)]
802 pub fn dirsetp_1(self) -> &'a mut W {
803 self.variant(DIRSETP27_AW::DIRSETP_1)
804 }
805}
806#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
807#[derive(Clone, Copy, Debug, PartialEq, Eq)]
808pub enum DIRSETP28_AW {
809 #[doc = "0: No operation"]
810 DIRSETP_0 = 0,
811 #[doc = "1: Sets direction bit"]
812 DIRSETP_1 = 1,
813}
814impl From<DIRSETP28_AW> for bool {
815 #[inline(always)]
816 fn from(variant: DIRSETP28_AW) -> Self {
817 variant as u8 != 0
818 }
819}
820#[doc = "Field `DIRSETP28` writer - Direction set bits for Port pins"]
821pub type DIRSETP28_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP28_AW, O>;
822impl<'a, const O: u8> DIRSETP28_W<'a, O> {
823 #[doc = "No operation"]
824 #[inline(always)]
825 pub fn dirsetp_0(self) -> &'a mut W {
826 self.variant(DIRSETP28_AW::DIRSETP_0)
827 }
828 #[doc = "Sets direction bit"]
829 #[inline(always)]
830 pub fn dirsetp_1(self) -> &'a mut W {
831 self.variant(DIRSETP28_AW::DIRSETP_1)
832 }
833}
834#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
835#[derive(Clone, Copy, Debug, PartialEq, Eq)]
836pub enum DIRSETP29_AW {
837 #[doc = "0: No operation"]
838 DIRSETP_0 = 0,
839 #[doc = "1: Sets direction bit"]
840 DIRSETP_1 = 1,
841}
842impl From<DIRSETP29_AW> for bool {
843 #[inline(always)]
844 fn from(variant: DIRSETP29_AW) -> Self {
845 variant as u8 != 0
846 }
847}
848#[doc = "Field `DIRSETP29` writer - Direction set bits for Port pins"]
849pub type DIRSETP29_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP29_AW, O>;
850impl<'a, const O: u8> DIRSETP29_W<'a, O> {
851 #[doc = "No operation"]
852 #[inline(always)]
853 pub fn dirsetp_0(self) -> &'a mut W {
854 self.variant(DIRSETP29_AW::DIRSETP_0)
855 }
856 #[doc = "Sets direction bit"]
857 #[inline(always)]
858 pub fn dirsetp_1(self) -> &'a mut W {
859 self.variant(DIRSETP29_AW::DIRSETP_1)
860 }
861}
862#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
863#[derive(Clone, Copy, Debug, PartialEq, Eq)]
864pub enum DIRSETP30_AW {
865 #[doc = "0: No operation"]
866 DIRSETP_0 = 0,
867 #[doc = "1: Sets direction bit"]
868 DIRSETP_1 = 1,
869}
870impl From<DIRSETP30_AW> for bool {
871 #[inline(always)]
872 fn from(variant: DIRSETP30_AW) -> Self {
873 variant as u8 != 0
874 }
875}
876#[doc = "Field `DIRSETP30` writer - Direction set bits for Port pins"]
877pub type DIRSETP30_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP30_AW, O>;
878impl<'a, const O: u8> DIRSETP30_W<'a, O> {
879 #[doc = "No operation"]
880 #[inline(always)]
881 pub fn dirsetp_0(self) -> &'a mut W {
882 self.variant(DIRSETP30_AW::DIRSETP_0)
883 }
884 #[doc = "Sets direction bit"]
885 #[inline(always)]
886 pub fn dirsetp_1(self) -> &'a mut W {
887 self.variant(DIRSETP30_AW::DIRSETP_1)
888 }
889}
890#[doc = "Direction set bits for Port pins\n\nValue on reset: 0"]
891#[derive(Clone, Copy, Debug, PartialEq, Eq)]
892pub enum DIRSETP31_AW {
893 #[doc = "0: No operation"]
894 DIRSETP_0 = 0,
895 #[doc = "1: Sets direction bit"]
896 DIRSETP_1 = 1,
897}
898impl From<DIRSETP31_AW> for bool {
899 #[inline(always)]
900 fn from(variant: DIRSETP31_AW) -> Self {
901 variant as u8 != 0
902 }
903}
904#[doc = "Field `DIRSETP31` writer - Direction set bits for Port pins"]
905pub type DIRSETP31_W<'a, const O: u8> = crate::BitWriter1S<'a, u32, DIRSET_SPEC, DIRSETP31_AW, O>;
906impl<'a, const O: u8> DIRSETP31_W<'a, O> {
907 #[doc = "No operation"]
908 #[inline(always)]
909 pub fn dirsetp_0(self) -> &'a mut W {
910 self.variant(DIRSETP31_AW::DIRSETP_0)
911 }
912 #[doc = "Sets direction bit"]
913 #[inline(always)]
914 pub fn dirsetp_1(self) -> &'a mut W {
915 self.variant(DIRSETP31_AW::DIRSETP_1)
916 }
917}
918impl W {
919 #[doc = "Bit 0 - Direction set bits for Port pins"]
920 #[inline(always)]
921 #[must_use]
922 pub fn dirsetp0(&mut self) -> DIRSETP0_W<0> {
923 DIRSETP0_W::new(self)
924 }
925 #[doc = "Bit 1 - Direction set bits for Port pins"]
926 #[inline(always)]
927 #[must_use]
928 pub fn dirsetp1(&mut self) -> DIRSETP1_W<1> {
929 DIRSETP1_W::new(self)
930 }
931 #[doc = "Bit 2 - Direction set bits for Port pins"]
932 #[inline(always)]
933 #[must_use]
934 pub fn dirsetp2(&mut self) -> DIRSETP2_W<2> {
935 DIRSETP2_W::new(self)
936 }
937 #[doc = "Bit 3 - Direction set bits for Port pins"]
938 #[inline(always)]
939 #[must_use]
940 pub fn dirsetp3(&mut self) -> DIRSETP3_W<3> {
941 DIRSETP3_W::new(self)
942 }
943 #[doc = "Bit 4 - Direction set bits for Port pins"]
944 #[inline(always)]
945 #[must_use]
946 pub fn dirsetp4(&mut self) -> DIRSETP4_W<4> {
947 DIRSETP4_W::new(self)
948 }
949 #[doc = "Bit 5 - Direction set bits for Port pins"]
950 #[inline(always)]
951 #[must_use]
952 pub fn dirsetp5(&mut self) -> DIRSETP5_W<5> {
953 DIRSETP5_W::new(self)
954 }
955 #[doc = "Bit 6 - Direction set bits for Port pins"]
956 #[inline(always)]
957 #[must_use]
958 pub fn dirsetp6(&mut self) -> DIRSETP6_W<6> {
959 DIRSETP6_W::new(self)
960 }
961 #[doc = "Bit 7 - Direction set bits for Port pins"]
962 #[inline(always)]
963 #[must_use]
964 pub fn dirsetp7(&mut self) -> DIRSETP7_W<7> {
965 DIRSETP7_W::new(self)
966 }
967 #[doc = "Bit 8 - Direction set bits for Port pins"]
968 #[inline(always)]
969 #[must_use]
970 pub fn dirsetp8(&mut self) -> DIRSETP8_W<8> {
971 DIRSETP8_W::new(self)
972 }
973 #[doc = "Bit 9 - Direction set bits for Port pins"]
974 #[inline(always)]
975 #[must_use]
976 pub fn dirsetp9(&mut self) -> DIRSETP9_W<9> {
977 DIRSETP9_W::new(self)
978 }
979 #[doc = "Bit 10 - Direction set bits for Port pins"]
980 #[inline(always)]
981 #[must_use]
982 pub fn dirsetp10(&mut self) -> DIRSETP10_W<10> {
983 DIRSETP10_W::new(self)
984 }
985 #[doc = "Bit 11 - Direction set bits for Port pins"]
986 #[inline(always)]
987 #[must_use]
988 pub fn dirsetp11(&mut self) -> DIRSETP11_W<11> {
989 DIRSETP11_W::new(self)
990 }
991 #[doc = "Bit 12 - Direction set bits for Port pins"]
992 #[inline(always)]
993 #[must_use]
994 pub fn dirsetp12(&mut self) -> DIRSETP12_W<12> {
995 DIRSETP12_W::new(self)
996 }
997 #[doc = "Bit 13 - Direction set bits for Port pins"]
998 #[inline(always)]
999 #[must_use]
1000 pub fn dirsetp13(&mut self) -> DIRSETP13_W<13> {
1001 DIRSETP13_W::new(self)
1002 }
1003 #[doc = "Bit 14 - Direction set bits for Port pins"]
1004 #[inline(always)]
1005 #[must_use]
1006 pub fn dirsetp14(&mut self) -> DIRSETP14_W<14> {
1007 DIRSETP14_W::new(self)
1008 }
1009 #[doc = "Bit 15 - Direction set bits for Port pins"]
1010 #[inline(always)]
1011 #[must_use]
1012 pub fn dirsetp15(&mut self) -> DIRSETP15_W<15> {
1013 DIRSETP15_W::new(self)
1014 }
1015 #[doc = "Bit 16 - Direction set bits for Port pins"]
1016 #[inline(always)]
1017 #[must_use]
1018 pub fn dirsetp16(&mut self) -> DIRSETP16_W<16> {
1019 DIRSETP16_W::new(self)
1020 }
1021 #[doc = "Bit 17 - Direction set bits for Port pins"]
1022 #[inline(always)]
1023 #[must_use]
1024 pub fn dirsetp17(&mut self) -> DIRSETP17_W<17> {
1025 DIRSETP17_W::new(self)
1026 }
1027 #[doc = "Bit 18 - Direction set bits for Port pins"]
1028 #[inline(always)]
1029 #[must_use]
1030 pub fn dirsetp18(&mut self) -> DIRSETP18_W<18> {
1031 DIRSETP18_W::new(self)
1032 }
1033 #[doc = "Bit 19 - Direction set bits for Port pins"]
1034 #[inline(always)]
1035 #[must_use]
1036 pub fn dirsetp19(&mut self) -> DIRSETP19_W<19> {
1037 DIRSETP19_W::new(self)
1038 }
1039 #[doc = "Bit 20 - Direction set bits for Port pins"]
1040 #[inline(always)]
1041 #[must_use]
1042 pub fn dirsetp20(&mut self) -> DIRSETP20_W<20> {
1043 DIRSETP20_W::new(self)
1044 }
1045 #[doc = "Bit 21 - Direction set bits for Port pins"]
1046 #[inline(always)]
1047 #[must_use]
1048 pub fn dirsetp21(&mut self) -> DIRSETP21_W<21> {
1049 DIRSETP21_W::new(self)
1050 }
1051 #[doc = "Bit 22 - Direction set bits for Port pins"]
1052 #[inline(always)]
1053 #[must_use]
1054 pub fn dirsetp22(&mut self) -> DIRSETP22_W<22> {
1055 DIRSETP22_W::new(self)
1056 }
1057 #[doc = "Bit 23 - Direction set bits for Port pins"]
1058 #[inline(always)]
1059 #[must_use]
1060 pub fn dirsetp23(&mut self) -> DIRSETP23_W<23> {
1061 DIRSETP23_W::new(self)
1062 }
1063 #[doc = "Bit 24 - Direction set bits for Port pins"]
1064 #[inline(always)]
1065 #[must_use]
1066 pub fn dirsetp24(&mut self) -> DIRSETP24_W<24> {
1067 DIRSETP24_W::new(self)
1068 }
1069 #[doc = "Bit 25 - Direction set bits for Port pins"]
1070 #[inline(always)]
1071 #[must_use]
1072 pub fn dirsetp25(&mut self) -> DIRSETP25_W<25> {
1073 DIRSETP25_W::new(self)
1074 }
1075 #[doc = "Bit 26 - Direction set bits for Port pins"]
1076 #[inline(always)]
1077 #[must_use]
1078 pub fn dirsetp26(&mut self) -> DIRSETP26_W<26> {
1079 DIRSETP26_W::new(self)
1080 }
1081 #[doc = "Bit 27 - Direction set bits for Port pins"]
1082 #[inline(always)]
1083 #[must_use]
1084 pub fn dirsetp27(&mut self) -> DIRSETP27_W<27> {
1085 DIRSETP27_W::new(self)
1086 }
1087 #[doc = "Bit 28 - Direction set bits for Port pins"]
1088 #[inline(always)]
1089 #[must_use]
1090 pub fn dirsetp28(&mut self) -> DIRSETP28_W<28> {
1091 DIRSETP28_W::new(self)
1092 }
1093 #[doc = "Bit 29 - Direction set bits for Port pins"]
1094 #[inline(always)]
1095 #[must_use]
1096 pub fn dirsetp29(&mut self) -> DIRSETP29_W<29> {
1097 DIRSETP29_W::new(self)
1098 }
1099 #[doc = "Bit 30 - Direction set bits for Port pins"]
1100 #[inline(always)]
1101 #[must_use]
1102 pub fn dirsetp30(&mut self) -> DIRSETP30_W<30> {
1103 DIRSETP30_W::new(self)
1104 }
1105 #[doc = "Bit 31 - Direction set bits for Port pins"]
1106 #[inline(always)]
1107 #[must_use]
1108 pub fn dirsetp31(&mut self) -> DIRSETP31_W<31> {
1109 DIRSETP31_W::new(self)
1110 }
1111 #[doc = "Writes raw bits to the register."]
1112 #[inline(always)]
1113 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1114 self.0.bits(bits);
1115 self
1116 }
1117}
1118#[doc = "Port direction set\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dirset](index.html) module"]
1119pub struct DIRSET_SPEC;
1120impl crate::RegisterSpec for DIRSET_SPEC {
1121 type Ux = u32;
1122}
1123#[doc = "`write(|w| ..)` method takes [dirset::W](W) writer structure"]
1124impl crate::Writable for DIRSET_SPEC {
1125 type Writer = W;
1126 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
1127 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0xffff_ffff;
1128}
1129#[doc = "`reset()` method sets DIRSET[%s]
1130to value 0"]
1131impl crate::Resettable for DIRSET_SPEC {
1132 const RESET_VALUE: Self::Ux = 0;
1133}