mimxrt595s/trng/
int_ctrl.rs

1#[doc = "Register `INT_CTRL` reader"]
2pub struct R(crate::R<INT_CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INT_CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INT_CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INT_CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `INT_CTRL` writer"]
17pub struct W(crate::W<INT_CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<INT_CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<INT_CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<INT_CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `HW_ERR` reader - Bit position that can be cleared if corresponding bit of INT_STATUS register has been asserted."]
38pub type HW_ERR_R = crate::BitReader<HW_ERR_A>;
39#[doc = "Bit position that can be cleared if corresponding bit of INT_STATUS register has been asserted.\n\nValue on reset: 1"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum HW_ERR_A {
42    #[doc = "0: Corresponding bit of INT_STATUS register cleared."]
43    HW_ERR_CLEAR = 0,
44    #[doc = "1: Corresponding bit of INT_STATUS register active."]
45    HW_ERR_ON = 1,
46}
47impl From<HW_ERR_A> for bool {
48    #[inline(always)]
49    fn from(variant: HW_ERR_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl HW_ERR_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> HW_ERR_A {
57        match self.bits {
58            false => HW_ERR_A::HW_ERR_CLEAR,
59            true => HW_ERR_A::HW_ERR_ON,
60        }
61    }
62    #[doc = "Checks if the value of the field is `HW_ERR_CLEAR`"]
63    #[inline(always)]
64    pub fn is_hw_err_clear(&self) -> bool {
65        *self == HW_ERR_A::HW_ERR_CLEAR
66    }
67    #[doc = "Checks if the value of the field is `HW_ERR_ON`"]
68    #[inline(always)]
69    pub fn is_hw_err_on(&self) -> bool {
70        *self == HW_ERR_A::HW_ERR_ON
71    }
72}
73#[doc = "Field `HW_ERR` writer - Bit position that can be cleared if corresponding bit of INT_STATUS register has been asserted."]
74pub type HW_ERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_CTRL_SPEC, HW_ERR_A, O>;
75impl<'a, const O: u8> HW_ERR_W<'a, O> {
76    #[doc = "Corresponding bit of INT_STATUS register cleared."]
77    #[inline(always)]
78    pub fn hw_err_clear(self) -> &'a mut W {
79        self.variant(HW_ERR_A::HW_ERR_CLEAR)
80    }
81    #[doc = "Corresponding bit of INT_STATUS register active."]
82    #[inline(always)]
83    pub fn hw_err_on(self) -> &'a mut W {
84        self.variant(HW_ERR_A::HW_ERR_ON)
85    }
86}
87#[doc = "Field `ENT_VAL` reader - Same behavior as bit 0 of this register."]
88pub type ENT_VAL_R = crate::BitReader<ENT_VAL_A>;
89#[doc = "Same behavior as bit 0 of this register.\n\nValue on reset: 1"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum ENT_VAL_A {
92    #[doc = "0: Same behavior as bit 0 of this register."]
93    ENT_VAL_CLEAR = 0,
94    #[doc = "1: Same behavior as bit 0 of this register."]
95    ENT_VAL_ON = 1,
96}
97impl From<ENT_VAL_A> for bool {
98    #[inline(always)]
99    fn from(variant: ENT_VAL_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl ENT_VAL_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> ENT_VAL_A {
107        match self.bits {
108            false => ENT_VAL_A::ENT_VAL_CLEAR,
109            true => ENT_VAL_A::ENT_VAL_ON,
110        }
111    }
112    #[doc = "Checks if the value of the field is `ENT_VAL_CLEAR`"]
113    #[inline(always)]
114    pub fn is_ent_val_clear(&self) -> bool {
115        *self == ENT_VAL_A::ENT_VAL_CLEAR
116    }
117    #[doc = "Checks if the value of the field is `ENT_VAL_ON`"]
118    #[inline(always)]
119    pub fn is_ent_val_on(&self) -> bool {
120        *self == ENT_VAL_A::ENT_VAL_ON
121    }
122}
123#[doc = "Field `ENT_VAL` writer - Same behavior as bit 0 of this register."]
124pub type ENT_VAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_CTRL_SPEC, ENT_VAL_A, O>;
125impl<'a, const O: u8> ENT_VAL_W<'a, O> {
126    #[doc = "Same behavior as bit 0 of this register."]
127    #[inline(always)]
128    pub fn ent_val_clear(self) -> &'a mut W {
129        self.variant(ENT_VAL_A::ENT_VAL_CLEAR)
130    }
131    #[doc = "Same behavior as bit 0 of this register."]
132    #[inline(always)]
133    pub fn ent_val_on(self) -> &'a mut W {
134        self.variant(ENT_VAL_A::ENT_VAL_ON)
135    }
136}
137#[doc = "Field `FRQ_CT_FAIL` reader - Same behavior as bit 0 of this register."]
138pub type FRQ_CT_FAIL_R = crate::BitReader<FRQ_CT_FAIL_A>;
139#[doc = "Same behavior as bit 0 of this register.\n\nValue on reset: 1"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum FRQ_CT_FAIL_A {
142    #[doc = "0: Same behavior as bit 0 of this register."]
143    FRQ_CT_FAIL_CLEAR = 0,
144    #[doc = "1: Same behavior as bit 0 of this register."]
145    FRQ_CT_FAIL_ON = 1,
146}
147impl From<FRQ_CT_FAIL_A> for bool {
148    #[inline(always)]
149    fn from(variant: FRQ_CT_FAIL_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl FRQ_CT_FAIL_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> FRQ_CT_FAIL_A {
157        match self.bits {
158            false => FRQ_CT_FAIL_A::FRQ_CT_FAIL_CLEAR,
159            true => FRQ_CT_FAIL_A::FRQ_CT_FAIL_ON,
160        }
161    }
162    #[doc = "Checks if the value of the field is `FRQ_CT_FAIL_CLEAR`"]
163    #[inline(always)]
164    pub fn is_frq_ct_fail_clear(&self) -> bool {
165        *self == FRQ_CT_FAIL_A::FRQ_CT_FAIL_CLEAR
166    }
167    #[doc = "Checks if the value of the field is `FRQ_CT_FAIL_ON`"]
168    #[inline(always)]
169    pub fn is_frq_ct_fail_on(&self) -> bool {
170        *self == FRQ_CT_FAIL_A::FRQ_CT_FAIL_ON
171    }
172}
173#[doc = "Field `FRQ_CT_FAIL` writer - Same behavior as bit 0 of this register."]
174pub type FRQ_CT_FAIL_W<'a, const O: u8> =
175    crate::BitWriter<'a, u32, INT_CTRL_SPEC, FRQ_CT_FAIL_A, O>;
176impl<'a, const O: u8> FRQ_CT_FAIL_W<'a, O> {
177    #[doc = "Same behavior as bit 0 of this register."]
178    #[inline(always)]
179    pub fn frq_ct_fail_clear(self) -> &'a mut W {
180        self.variant(FRQ_CT_FAIL_A::FRQ_CT_FAIL_CLEAR)
181    }
182    #[doc = "Same behavior as bit 0 of this register."]
183    #[inline(always)]
184    pub fn frq_ct_fail_on(self) -> &'a mut W {
185        self.variant(FRQ_CT_FAIL_A::FRQ_CT_FAIL_ON)
186    }
187}
188#[doc = "Field `UNUSED` reader - Reserved but writeable."]
189pub type UNUSED_R = crate::FieldReader<u32, u32>;
190#[doc = "Field `UNUSED` writer - Reserved but writeable."]
191pub type UNUSED_W<'a, const O: u8> = crate::FieldWriter<'a, u32, INT_CTRL_SPEC, u32, u32, 29, O>;
192impl R {
193    #[doc = "Bit 0 - Bit position that can be cleared if corresponding bit of INT_STATUS register has been asserted."]
194    #[inline(always)]
195    pub fn hw_err(&self) -> HW_ERR_R {
196        HW_ERR_R::new((self.bits & 1) != 0)
197    }
198    #[doc = "Bit 1 - Same behavior as bit 0 of this register."]
199    #[inline(always)]
200    pub fn ent_val(&self) -> ENT_VAL_R {
201        ENT_VAL_R::new(((self.bits >> 1) & 1) != 0)
202    }
203    #[doc = "Bit 2 - Same behavior as bit 0 of this register."]
204    #[inline(always)]
205    pub fn frq_ct_fail(&self) -> FRQ_CT_FAIL_R {
206        FRQ_CT_FAIL_R::new(((self.bits >> 2) & 1) != 0)
207    }
208    #[doc = "Bits 3:31 - Reserved but writeable."]
209    #[inline(always)]
210    pub fn unused(&self) -> UNUSED_R {
211        UNUSED_R::new((self.bits >> 3) & 0x1fff_ffff)
212    }
213}
214impl W {
215    #[doc = "Bit 0 - Bit position that can be cleared if corresponding bit of INT_STATUS register has been asserted."]
216    #[inline(always)]
217    #[must_use]
218    pub fn hw_err(&mut self) -> HW_ERR_W<0> {
219        HW_ERR_W::new(self)
220    }
221    #[doc = "Bit 1 - Same behavior as bit 0 of this register."]
222    #[inline(always)]
223    #[must_use]
224    pub fn ent_val(&mut self) -> ENT_VAL_W<1> {
225        ENT_VAL_W::new(self)
226    }
227    #[doc = "Bit 2 - Same behavior as bit 0 of this register."]
228    #[inline(always)]
229    #[must_use]
230    pub fn frq_ct_fail(&mut self) -> FRQ_CT_FAIL_W<2> {
231        FRQ_CT_FAIL_W::new(self)
232    }
233    #[doc = "Bits 3:31 - Reserved but writeable."]
234    #[inline(always)]
235    #[must_use]
236    pub fn unused(&mut self) -> UNUSED_W<3> {
237        UNUSED_W::new(self)
238    }
239    #[doc = "Writes raw bits to the register."]
240    #[inline(always)]
241    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
242        self.0.bits(bits);
243        self
244    }
245}
246#[doc = "Interrupt Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_ctrl](index.html) module"]
247pub struct INT_CTRL_SPEC;
248impl crate::RegisterSpec for INT_CTRL_SPEC {
249    type Ux = u32;
250}
251#[doc = "`read()` method returns [int_ctrl::R](R) reader structure"]
252impl crate::Readable for INT_CTRL_SPEC {
253    type Reader = R;
254}
255#[doc = "`write(|w| ..)` method takes [int_ctrl::W](W) writer structure"]
256impl crate::Writable for INT_CTRL_SPEC {
257    type Writer = W;
258    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
259    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
260}
261#[doc = "`reset()` method sets INT_CTRL to value 0xffff_ffff"]
262impl crate::Resettable for INT_CTRL_SPEC {
263    const RESET_VALUE: Self::Ux = 0xffff_ffff;
264}
mimxrt595s/trng/int_ctrl.rs

mimxrt595s/trng/
int_ctrl.rs
