mimxrt595s/hashcrypt/
memctrl.rs

1#[doc = "Register `MEMCTRL` reader"]
2pub struct R(crate::R<MEMCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<MEMCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<MEMCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<MEMCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `MEMCTRL` writer"]
17pub struct W(crate::W<MEMCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<MEMCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<MEMCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<MEMCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `MASTER` reader - Master"]
38pub type MASTER_R = crate::BitReader<MASTER_A>;
39#[doc = "Master\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum MASTER_A {
42    #[doc = "0: Mastering is not used and the normal DMA or Interrupt based model is used with INDATA."]
43    NOT_USED = 0,
44    #[doc = "1: Mastering is enabled and DMA and INDATA should not be used."]
45    ENABLED = 1,
46}
47impl From<MASTER_A> for bool {
48    #[inline(always)]
49    fn from(variant: MASTER_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl MASTER_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> MASTER_A {
57        match self.bits {
58            false => MASTER_A::NOT_USED,
59            true => MASTER_A::ENABLED,
60        }
61    }
62    #[doc = "Checks if the value of the field is `NOT_USED`"]
63    #[inline(always)]
64    pub fn is_not_used(&self) -> bool {
65        *self == MASTER_A::NOT_USED
66    }
67    #[doc = "Checks if the value of the field is `ENABLED`"]
68    #[inline(always)]
69    pub fn is_enabled(&self) -> bool {
70        *self == MASTER_A::ENABLED
71    }
72}
73#[doc = "Field `MASTER` writer - Master"]
74pub type MASTER_W<'a, const O: u8> = crate::BitWriter<'a, u32, MEMCTRL_SPEC, MASTER_A, O>;
75impl<'a, const O: u8> MASTER_W<'a, O> {
76    #[doc = "Mastering is not used and the normal DMA or Interrupt based model is used with INDATA."]
77    #[inline(always)]
78    pub fn not_used(self) -> &'a mut W {
79        self.variant(MASTER_A::NOT_USED)
80    }
81    #[doc = "Mastering is enabled and DMA and INDATA should not be used."]
82    #[inline(always)]
83    pub fn enabled(self) -> &'a mut W {
84        self.variant(MASTER_A::ENABLED)
85    }
86}
87#[doc = "Field `COUNT` reader - Count"]
88pub type COUNT_R = crate::FieldReader<u16, COUNT_A>;
89#[doc = "Count\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91#[repr(u16)]
92pub enum COUNT_A {
93    #[doc = "0: Done. Nothing to process"]
94    COUNT_0 = 0,
95    #[doc = "1: One 512-bit block to hash"]
96    COUNT_1 = 1,
97    #[doc = "2: Two 512-bit block to hash"]
98    COUNT_2 = 2,
99    #[doc = "3: Three 512-bit block to hash"]
100    COUNT_3 = 3,
101}
102impl From<COUNT_A> for u16 {
103    #[inline(always)]
104    fn from(variant: COUNT_A) -> Self {
105        variant as _
106    }
107}
108impl COUNT_R {
109    #[doc = "Get enumerated values variant"]
110    #[inline(always)]
111    pub fn variant(&self) -> Option<COUNT_A> {
112        match self.bits {
113            0 => Some(COUNT_A::COUNT_0),
114            1 => Some(COUNT_A::COUNT_1),
115            2 => Some(COUNT_A::COUNT_2),
116            3 => Some(COUNT_A::COUNT_3),
117            _ => None,
118        }
119    }
120    #[doc = "Checks if the value of the field is `COUNT_0`"]
121    #[inline(always)]
122    pub fn is_count_0(&self) -> bool {
123        *self == COUNT_A::COUNT_0
124    }
125    #[doc = "Checks if the value of the field is `COUNT_1`"]
126    #[inline(always)]
127    pub fn is_count_1(&self) -> bool {
128        *self == COUNT_A::COUNT_1
129    }
130    #[doc = "Checks if the value of the field is `COUNT_2`"]
131    #[inline(always)]
132    pub fn is_count_2(&self) -> bool {
133        *self == COUNT_A::COUNT_2
134    }
135    #[doc = "Checks if the value of the field is `COUNT_3`"]
136    #[inline(always)]
137    pub fn is_count_3(&self) -> bool {
138        *self == COUNT_A::COUNT_3
139    }
140}
141#[doc = "Field `COUNT` writer - Count"]
142pub type COUNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MEMCTRL_SPEC, u16, COUNT_A, 11, O>;
143impl<'a, const O: u8> COUNT_W<'a, O> {
144    #[doc = "Done. Nothing to process"]
145    #[inline(always)]
146    pub fn count_0(self) -> &'a mut W {
147        self.variant(COUNT_A::COUNT_0)
148    }
149    #[doc = "One 512-bit block to hash"]
150    #[inline(always)]
151    pub fn count_1(self) -> &'a mut W {
152        self.variant(COUNT_A::COUNT_1)
153    }
154    #[doc = "Two 512-bit block to hash"]
155    #[inline(always)]
156    pub fn count_2(self) -> &'a mut W {
157        self.variant(COUNT_A::COUNT_2)
158    }
159    #[doc = "Three 512-bit block to hash"]
160    #[inline(always)]
161    pub fn count_3(self) -> &'a mut W {
162        self.variant(COUNT_A::COUNT_3)
163    }
164}
165impl R {
166    #[doc = "Bit 0 - Master"]
167    #[inline(always)]
168    pub fn master(&self) -> MASTER_R {
169        MASTER_R::new((self.bits & 1) != 0)
170    }
171    #[doc = "Bits 16:26 - Count"]
172    #[inline(always)]
173    pub fn count(&self) -> COUNT_R {
174        COUNT_R::new(((self.bits >> 16) & 0x07ff) as u16)
175    }
176}
177impl W {
178    #[doc = "Bit 0 - Master"]
179    #[inline(always)]
180    #[must_use]
181    pub fn master(&mut self) -> MASTER_W<0> {
182        MASTER_W::new(self)
183    }
184    #[doc = "Bits 16:26 - Count"]
185    #[inline(always)]
186    #[must_use]
187    pub fn count(&mut self) -> COUNT_W<16> {
188        COUNT_W::new(self)
189    }
190    #[doc = "Writes raw bits to the register."]
191    #[inline(always)]
192    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
193        self.0.bits(bits);
194        self
195    }
196}
197#[doc = "Memory Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [memctrl](index.html) module"]
198pub struct MEMCTRL_SPEC;
199impl crate::RegisterSpec for MEMCTRL_SPEC {
200    type Ux = u32;
201}
202#[doc = "`read()` method returns [memctrl::R](R) reader structure"]
203impl crate::Readable for MEMCTRL_SPEC {
204    type Reader = R;
205}
206#[doc = "`write(|w| ..)` method takes [memctrl::W](W) writer structure"]
207impl crate::Writable for MEMCTRL_SPEC {
208    type Writer = W;
209    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
210    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
211}
212#[doc = "`reset()` method sets MEMCTRL to value 0"]
213impl crate::Resettable for MEMCTRL_SPEC {
214    const RESET_VALUE: Self::Ux = 0;
215}
mimxrt595s/hashcrypt/memctrl.rs

mimxrt595s/hashcrypt/
memctrl.rs
