mimxrt595s/flexspi0/
haddrstart.rs

1#[doc = "Register `HADDRSTART` reader"]
2pub struct R(crate::R<HADDRSTART_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<HADDRSTART_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<HADDRSTART_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<HADDRSTART_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `HADDRSTART` writer"]
17pub struct W(crate::W<HADDRSTART_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<HADDRSTART_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<HADDRSTART_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<HADDRSTART_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `REMAPEN` reader - AHB Bus address remap function enable"]
38pub type REMAPEN_R = crate::BitReader<REMAPEN_A>;
39#[doc = "AHB Bus address remap function enable\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum REMAPEN_A {
42    #[doc = "0: HADDR REMAP Disabled"]
43    VAL0 = 0,
44    #[doc = "1: HADDR REMAP Enabled"]
45    VAL1 = 1,
46}
47impl From<REMAPEN_A> for bool {
48    #[inline(always)]
49    fn from(variant: REMAPEN_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl REMAPEN_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> REMAPEN_A {
57        match self.bits {
58            false => REMAPEN_A::VAL0,
59            true => REMAPEN_A::VAL1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `VAL0`"]
63    #[inline(always)]
64    pub fn is_val0(&self) -> bool {
65        *self == REMAPEN_A::VAL0
66    }
67    #[doc = "Checks if the value of the field is `VAL1`"]
68    #[inline(always)]
69    pub fn is_val1(&self) -> bool {
70        *self == REMAPEN_A::VAL1
71    }
72}
73#[doc = "Field `REMAPEN` writer - AHB Bus address remap function enable"]
74pub type REMAPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, HADDRSTART_SPEC, REMAPEN_A, O>;
75impl<'a, const O: u8> REMAPEN_W<'a, O> {
76    #[doc = "HADDR REMAP Disabled"]
77    #[inline(always)]
78    pub fn val0(self) -> &'a mut W {
79        self.variant(REMAPEN_A::VAL0)
80    }
81    #[doc = "HADDR REMAP Enabled"]
82    #[inline(always)]
83    pub fn val1(self) -> &'a mut W {
84        self.variant(REMAPEN_A::VAL1)
85    }
86}
87#[doc = "Field `ADDRSTART` reader - HADDR start address"]
88pub type ADDRSTART_R = crate::FieldReader<u32, u32>;
89#[doc = "Field `ADDRSTART` writer - HADDR start address"]
90pub type ADDRSTART_W<'a, const O: u8> =
91    crate::FieldWriter<'a, u32, HADDRSTART_SPEC, u32, u32, 20, O>;
92impl R {
93    #[doc = "Bit 0 - AHB Bus address remap function enable"]
94    #[inline(always)]
95    pub fn remapen(&self) -> REMAPEN_R {
96        REMAPEN_R::new((self.bits & 1) != 0)
97    }
98    #[doc = "Bits 12:31 - HADDR start address"]
99    #[inline(always)]
100    pub fn addrstart(&self) -> ADDRSTART_R {
101        ADDRSTART_R::new((self.bits >> 12) & 0x000f_ffff)
102    }
103}
104impl W {
105    #[doc = "Bit 0 - AHB Bus address remap function enable"]
106    #[inline(always)]
107    #[must_use]
108    pub fn remapen(&mut self) -> REMAPEN_W<0> {
109        REMAPEN_W::new(self)
110    }
111    #[doc = "Bits 12:31 - HADDR start address"]
112    #[inline(always)]
113    #[must_use]
114    pub fn addrstart(&mut self) -> ADDRSTART_W<12> {
115        ADDRSTART_W::new(self)
116    }
117    #[doc = "Writes raw bits to the register."]
118    #[inline(always)]
119    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
120        self.0.bits(bits);
121        self
122    }
123}
124#[doc = "HADDR REMAP START ADDR\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [haddrstart](index.html) module"]
125pub struct HADDRSTART_SPEC;
126impl crate::RegisterSpec for HADDRSTART_SPEC {
127    type Ux = u32;
128}
129#[doc = "`read()` method returns [haddrstart::R](R) reader structure"]
130impl crate::Readable for HADDRSTART_SPEC {
131    type Reader = R;
132}
133#[doc = "`write(|w| ..)` method takes [haddrstart::W](W) writer structure"]
134impl crate::Writable for HADDRSTART_SPEC {
135    type Writer = W;
136    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
137    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
138}
139#[doc = "`reset()` method sets HADDRSTART to value 0"]
140impl crate::Resettable for HADDRSTART_SPEC {
141    const RESET_VALUE: Self::Ux = 0;
142}
mimxrt595s/flexspi0/haddrstart.rs

mimxrt595s/flexspi0/
haddrstart.rs
