1#[doc = "Register `STARTEN1_CLR` reader"]
2pub struct R(crate::R<STARTEN1_CLR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<STARTEN1_CLR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<STARTEN1_CLR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<STARTEN1_CLR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `STARTEN1_CLR` writer"]
17pub struct W(crate::W<STARTEN1_CLR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<STARTEN1_CLR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<STARTEN1_CLR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<STARTEN1_CLR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `RTC_LITE0_WAKEUP` reader - RTC wake-up."]
38pub type RTC_LITE0_WAKEUP_R = crate::BitReader<RTC_LITE0_WAKEUP_A>;
39#[doc = "RTC wake-up.\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum RTC_LITE0_WAKEUP_A {
42 #[doc = "0: No Effect"]
43 DISABLE = 0,
44 #[doc = "1: Clears the STARTEN1 Bit"]
45 ENABLE = 1,
46}
47impl From<RTC_LITE0_WAKEUP_A> for bool {
48 #[inline(always)]
49 fn from(variant: RTC_LITE0_WAKEUP_A) -> Self {
50 variant as u8 != 0
51 }
52}
53impl RTC_LITE0_WAKEUP_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> RTC_LITE0_WAKEUP_A {
57 match self.bits {
58 false => RTC_LITE0_WAKEUP_A::DISABLE,
59 true => RTC_LITE0_WAKEUP_A::ENABLE,
60 }
61 }
62 #[doc = "Checks if the value of the field is `DISABLE`"]
63 #[inline(always)]
64 pub fn is_disable(&self) -> bool {
65 *self == RTC_LITE0_WAKEUP_A::DISABLE
66 }
67 #[doc = "Checks if the value of the field is `ENABLE`"]
68 #[inline(always)]
69 pub fn is_enable(&self) -> bool {
70 *self == RTC_LITE0_WAKEUP_A::ENABLE
71 }
72}
73#[doc = "Field `RTC_LITE0_WAKEUP` writer - RTC wake-up."]
74pub type RTC_LITE0_WAKEUP_W<'a, const O: u8> =
75 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, RTC_LITE0_WAKEUP_A, O>;
76impl<'a, const O: u8> RTC_LITE0_WAKEUP_W<'a, O> {
77 #[doc = "No Effect"]
78 #[inline(always)]
79 pub fn disable(self) -> &'a mut W {
80 self.variant(RTC_LITE0_WAKEUP_A::DISABLE)
81 }
82 #[doc = "Clears the STARTEN1 Bit"]
83 #[inline(always)]
84 pub fn enable(self) -> &'a mut W {
85 self.variant(RTC_LITE0_WAKEUP_A::ENABLE)
86 }
87}
88#[doc = "Field `MU` reader - Message Unit wake-up."]
89pub type MU_R = crate::BitReader<MU_A>;
90#[doc = "Message Unit wake-up.\n\nValue on reset: 0"]
91#[derive(Clone, Copy, Debug, PartialEq, Eq)]
92pub enum MU_A {
93 #[doc = "0: No Effect"]
94 DISABLE = 0,
95 #[doc = "1: Clears the STARTEN1 Bit"]
96 ENABLE = 1,
97}
98impl From<MU_A> for bool {
99 #[inline(always)]
100 fn from(variant: MU_A) -> Self {
101 variant as u8 != 0
102 }
103}
104impl MU_R {
105 #[doc = "Get enumerated values variant"]
106 #[inline(always)]
107 pub fn variant(&self) -> MU_A {
108 match self.bits {
109 false => MU_A::DISABLE,
110 true => MU_A::ENABLE,
111 }
112 }
113 #[doc = "Checks if the value of the field is `DISABLE`"]
114 #[inline(always)]
115 pub fn is_disable(&self) -> bool {
116 *self == MU_A::DISABLE
117 }
118 #[doc = "Checks if the value of the field is `ENABLE`"]
119 #[inline(always)]
120 pub fn is_enable(&self) -> bool {
121 *self == MU_A::ENABLE
122 }
123}
124#[doc = "Field `MU` writer - Message Unit wake-up."]
125pub type MU_W<'a, const O: u8> = crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, MU_A, O>;
126impl<'a, const O: u8> MU_W<'a, O> {
127 #[doc = "No Effect"]
128 #[inline(always)]
129 pub fn disable(self) -> &'a mut W {
130 self.variant(MU_A::DISABLE)
131 }
132 #[doc = "Clears the STARTEN1 Bit"]
133 #[inline(always)]
134 pub fn enable(self) -> &'a mut W {
135 self.variant(MU_A::ENABLE)
136 }
137}
138#[doc = "Field `GPIO_INT0_IRQ4` reader - Message Unit wake-up."]
139pub type GPIO_INT0_IRQ4_R = crate::BitReader<GPIO_INT0_IRQ4_A>;
140#[doc = "Message Unit wake-up.\n\nValue on reset: 0"]
141#[derive(Clone, Copy, Debug, PartialEq, Eq)]
142pub enum GPIO_INT0_IRQ4_A {
143 #[doc = "0: No Effect"]
144 DISABLE = 0,
145 #[doc = "1: Clears the STARTEN1 Bit"]
146 ENABLE = 1,
147}
148impl From<GPIO_INT0_IRQ4_A> for bool {
149 #[inline(always)]
150 fn from(variant: GPIO_INT0_IRQ4_A) -> Self {
151 variant as u8 != 0
152 }
153}
154impl GPIO_INT0_IRQ4_R {
155 #[doc = "Get enumerated values variant"]
156 #[inline(always)]
157 pub fn variant(&self) -> GPIO_INT0_IRQ4_A {
158 match self.bits {
159 false => GPIO_INT0_IRQ4_A::DISABLE,
160 true => GPIO_INT0_IRQ4_A::ENABLE,
161 }
162 }
163 #[doc = "Checks if the value of the field is `DISABLE`"]
164 #[inline(always)]
165 pub fn is_disable(&self) -> bool {
166 *self == GPIO_INT0_IRQ4_A::DISABLE
167 }
168 #[doc = "Checks if the value of the field is `ENABLE`"]
169 #[inline(always)]
170 pub fn is_enable(&self) -> bool {
171 *self == GPIO_INT0_IRQ4_A::ENABLE
172 }
173}
174#[doc = "Field `GPIO_INT0_IRQ4` writer - Message Unit wake-up."]
175pub type GPIO_INT0_IRQ4_W<'a, const O: u8> =
176 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, GPIO_INT0_IRQ4_A, O>;
177impl<'a, const O: u8> GPIO_INT0_IRQ4_W<'a, O> {
178 #[doc = "No Effect"]
179 #[inline(always)]
180 pub fn disable(self) -> &'a mut W {
181 self.variant(GPIO_INT0_IRQ4_A::DISABLE)
182 }
183 #[doc = "Clears the STARTEN1 Bit"]
184 #[inline(always)]
185 pub fn enable(self) -> &'a mut W {
186 self.variant(GPIO_INT0_IRQ4_A::ENABLE)
187 }
188}
189#[doc = "Field `GPIO_INT0_IRQ5` reader - GPIO pin interrupt 5 wake-up."]
190pub type GPIO_INT0_IRQ5_R = crate::BitReader<GPIO_INT0_IRQ5_A>;
191#[doc = "GPIO pin interrupt 5 wake-up.\n\nValue on reset: 0"]
192#[derive(Clone, Copy, Debug, PartialEq, Eq)]
193pub enum GPIO_INT0_IRQ5_A {
194 #[doc = "0: No Effect"]
195 DISABLE = 0,
196 #[doc = "1: Clears the STARTEN1 Bit"]
197 ENABLE = 1,
198}
199impl From<GPIO_INT0_IRQ5_A> for bool {
200 #[inline(always)]
201 fn from(variant: GPIO_INT0_IRQ5_A) -> Self {
202 variant as u8 != 0
203 }
204}
205impl GPIO_INT0_IRQ5_R {
206 #[doc = "Get enumerated values variant"]
207 #[inline(always)]
208 pub fn variant(&self) -> GPIO_INT0_IRQ5_A {
209 match self.bits {
210 false => GPIO_INT0_IRQ5_A::DISABLE,
211 true => GPIO_INT0_IRQ5_A::ENABLE,
212 }
213 }
214 #[doc = "Checks if the value of the field is `DISABLE`"]
215 #[inline(always)]
216 pub fn is_disable(&self) -> bool {
217 *self == GPIO_INT0_IRQ5_A::DISABLE
218 }
219 #[doc = "Checks if the value of the field is `ENABLE`"]
220 #[inline(always)]
221 pub fn is_enable(&self) -> bool {
222 *self == GPIO_INT0_IRQ5_A::ENABLE
223 }
224}
225#[doc = "Field `GPIO_INT0_IRQ5` writer - GPIO pin interrupt 5 wake-up."]
226pub type GPIO_INT0_IRQ5_W<'a, const O: u8> =
227 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, GPIO_INT0_IRQ5_A, O>;
228impl<'a, const O: u8> GPIO_INT0_IRQ5_W<'a, O> {
229 #[doc = "No Effect"]
230 #[inline(always)]
231 pub fn disable(self) -> &'a mut W {
232 self.variant(GPIO_INT0_IRQ5_A::DISABLE)
233 }
234 #[doc = "Clears the STARTEN1 Bit"]
235 #[inline(always)]
236 pub fn enable(self) -> &'a mut W {
237 self.variant(GPIO_INT0_IRQ5_A::ENABLE)
238 }
239}
240#[doc = "Field `GPIO_INT0_IRQ6` reader - GPIO pin interrupt 6 wake-up."]
241pub type GPIO_INT0_IRQ6_R = crate::BitReader<GPIO_INT0_IRQ6_A>;
242#[doc = "GPIO pin interrupt 6 wake-up.\n\nValue on reset: 0"]
243#[derive(Clone, Copy, Debug, PartialEq, Eq)]
244pub enum GPIO_INT0_IRQ6_A {
245 #[doc = "0: No Effect"]
246 DISABLE = 0,
247 #[doc = "1: Clears the STARTEN1 Bit"]
248 ENABLE = 1,
249}
250impl From<GPIO_INT0_IRQ6_A> for bool {
251 #[inline(always)]
252 fn from(variant: GPIO_INT0_IRQ6_A) -> Self {
253 variant as u8 != 0
254 }
255}
256impl GPIO_INT0_IRQ6_R {
257 #[doc = "Get enumerated values variant"]
258 #[inline(always)]
259 pub fn variant(&self) -> GPIO_INT0_IRQ6_A {
260 match self.bits {
261 false => GPIO_INT0_IRQ6_A::DISABLE,
262 true => GPIO_INT0_IRQ6_A::ENABLE,
263 }
264 }
265 #[doc = "Checks if the value of the field is `DISABLE`"]
266 #[inline(always)]
267 pub fn is_disable(&self) -> bool {
268 *self == GPIO_INT0_IRQ6_A::DISABLE
269 }
270 #[doc = "Checks if the value of the field is `ENABLE`"]
271 #[inline(always)]
272 pub fn is_enable(&self) -> bool {
273 *self == GPIO_INT0_IRQ6_A::ENABLE
274 }
275}
276#[doc = "Field `GPIO_INT0_IRQ6` writer - GPIO pin interrupt 6 wake-up."]
277pub type GPIO_INT0_IRQ6_W<'a, const O: u8> =
278 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, GPIO_INT0_IRQ6_A, O>;
279impl<'a, const O: u8> GPIO_INT0_IRQ6_W<'a, O> {
280 #[doc = "No Effect"]
281 #[inline(always)]
282 pub fn disable(self) -> &'a mut W {
283 self.variant(GPIO_INT0_IRQ6_A::DISABLE)
284 }
285 #[doc = "Clears the STARTEN1 Bit"]
286 #[inline(always)]
287 pub fn enable(self) -> &'a mut W {
288 self.variant(GPIO_INT0_IRQ6_A::ENABLE)
289 }
290}
291#[doc = "Field `GPIO_INT0_IRQ7` reader - GPIO pin interrupt 7 wake-up."]
292pub type GPIO_INT0_IRQ7_R = crate::BitReader<GPIO_INT0_IRQ7_A>;
293#[doc = "GPIO pin interrupt 7 wake-up.\n\nValue on reset: 0"]
294#[derive(Clone, Copy, Debug, PartialEq, Eq)]
295pub enum GPIO_INT0_IRQ7_A {
296 #[doc = "0: No Effect"]
297 DISABLE = 0,
298 #[doc = "1: Clears the STARTEN1 Bit"]
299 ENABLE = 1,
300}
301impl From<GPIO_INT0_IRQ7_A> for bool {
302 #[inline(always)]
303 fn from(variant: GPIO_INT0_IRQ7_A) -> Self {
304 variant as u8 != 0
305 }
306}
307impl GPIO_INT0_IRQ7_R {
308 #[doc = "Get enumerated values variant"]
309 #[inline(always)]
310 pub fn variant(&self) -> GPIO_INT0_IRQ7_A {
311 match self.bits {
312 false => GPIO_INT0_IRQ7_A::DISABLE,
313 true => GPIO_INT0_IRQ7_A::ENABLE,
314 }
315 }
316 #[doc = "Checks if the value of the field is `DISABLE`"]
317 #[inline(always)]
318 pub fn is_disable(&self) -> bool {
319 *self == GPIO_INT0_IRQ7_A::DISABLE
320 }
321 #[doc = "Checks if the value of the field is `ENABLE`"]
322 #[inline(always)]
323 pub fn is_enable(&self) -> bool {
324 *self == GPIO_INT0_IRQ7_A::ENABLE
325 }
326}
327#[doc = "Field `GPIO_INT0_IRQ7` writer - GPIO pin interrupt 7 wake-up."]
328pub type GPIO_INT0_IRQ7_W<'a, const O: u8> =
329 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, GPIO_INT0_IRQ7_A, O>;
330impl<'a, const O: u8> GPIO_INT0_IRQ7_W<'a, O> {
331 #[doc = "No Effect"]
332 #[inline(always)]
333 pub fn disable(self) -> &'a mut W {
334 self.variant(GPIO_INT0_IRQ7_A::DISABLE)
335 }
336 #[doc = "Clears the STARTEN1 Bit"]
337 #[inline(always)]
338 pub fn enable(self) -> &'a mut W {
339 self.variant(GPIO_INT0_IRQ7_A::ENABLE)
340 }
341}
342#[doc = "Field `CT32BIT2` reader - CTIMER 2 wake-up"]
343pub type CT32BIT2_R = crate::BitReader<CT32BIT2_A>;
344#[doc = "CTIMER 2 wake-up\n\nValue on reset: 0"]
345#[derive(Clone, Copy, Debug, PartialEq, Eq)]
346pub enum CT32BIT2_A {
347 #[doc = "0: No Effect"]
348 DISABLE = 0,
349 #[doc = "1: Clears the STARTEN1 Bit"]
350 ENABLE = 1,
351}
352impl From<CT32BIT2_A> for bool {
353 #[inline(always)]
354 fn from(variant: CT32BIT2_A) -> Self {
355 variant as u8 != 0
356 }
357}
358impl CT32BIT2_R {
359 #[doc = "Get enumerated values variant"]
360 #[inline(always)]
361 pub fn variant(&self) -> CT32BIT2_A {
362 match self.bits {
363 false => CT32BIT2_A::DISABLE,
364 true => CT32BIT2_A::ENABLE,
365 }
366 }
367 #[doc = "Checks if the value of the field is `DISABLE`"]
368 #[inline(always)]
369 pub fn is_disable(&self) -> bool {
370 *self == CT32BIT2_A::DISABLE
371 }
372 #[doc = "Checks if the value of the field is `ENABLE`"]
373 #[inline(always)]
374 pub fn is_enable(&self) -> bool {
375 *self == CT32BIT2_A::ENABLE
376 }
377}
378#[doc = "Field `CT32BIT2` writer - CTIMER 2 wake-up"]
379pub type CT32BIT2_W<'a, const O: u8> =
380 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, CT32BIT2_A, O>;
381impl<'a, const O: u8> CT32BIT2_W<'a, O> {
382 #[doc = "No Effect"]
383 #[inline(always)]
384 pub fn disable(self) -> &'a mut W {
385 self.variant(CT32BIT2_A::DISABLE)
386 }
387 #[doc = "Clears the STARTEN1 Bit"]
388 #[inline(always)]
389 pub fn enable(self) -> &'a mut W {
390 self.variant(CT32BIT2_A::ENABLE)
391 }
392}
393#[doc = "Field `CT32BIT4` reader - CTIMER 4 wake-up"]
394pub type CT32BIT4_R = crate::BitReader<CT32BIT4_A>;
395#[doc = "CTIMER 4 wake-up\n\nValue on reset: 0"]
396#[derive(Clone, Copy, Debug, PartialEq, Eq)]
397pub enum CT32BIT4_A {
398 #[doc = "0: No Effect"]
399 DISABLE = 0,
400 #[doc = "1: Clears the STARTEN1 Bit"]
401 ENABLE = 1,
402}
403impl From<CT32BIT4_A> for bool {
404 #[inline(always)]
405 fn from(variant: CT32BIT4_A) -> Self {
406 variant as u8 != 0
407 }
408}
409impl CT32BIT4_R {
410 #[doc = "Get enumerated values variant"]
411 #[inline(always)]
412 pub fn variant(&self) -> CT32BIT4_A {
413 match self.bits {
414 false => CT32BIT4_A::DISABLE,
415 true => CT32BIT4_A::ENABLE,
416 }
417 }
418 #[doc = "Checks if the value of the field is `DISABLE`"]
419 #[inline(always)]
420 pub fn is_disable(&self) -> bool {
421 *self == CT32BIT4_A::DISABLE
422 }
423 #[doc = "Checks if the value of the field is `ENABLE`"]
424 #[inline(always)]
425 pub fn is_enable(&self) -> bool {
426 *self == CT32BIT4_A::ENABLE
427 }
428}
429#[doc = "Field `CT32BIT4` writer - CTIMER 4 wake-up"]
430pub type CT32BIT4_W<'a, const O: u8> =
431 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, CT32BIT4_A, O>;
432impl<'a, const O: u8> CT32BIT4_W<'a, O> {
433 #[doc = "No Effect"]
434 #[inline(always)]
435 pub fn disable(self) -> &'a mut W {
436 self.variant(CT32BIT4_A::DISABLE)
437 }
438 #[doc = "Clears the STARTEN1 Bit"]
439 #[inline(always)]
440 pub fn enable(self) -> &'a mut W {
441 self.variant(CT32BIT4_A::ENABLE)
442 }
443}
444#[doc = "Field `OS_EVENT_TIMER_WU` reader - OS Event Timer wake-up."]
445pub type OS_EVENT_TIMER_WU_R = crate::BitReader<OS_EVENT_TIMER_WU_A>;
446#[doc = "OS Event Timer wake-up.\n\nValue on reset: 0"]
447#[derive(Clone, Copy, Debug, PartialEq, Eq)]
448pub enum OS_EVENT_TIMER_WU_A {
449 #[doc = "0: No Effect"]
450 DISABLE = 0,
451 #[doc = "1: Clears the STARTEN1 Bit"]
452 ENABLE = 1,
453}
454impl From<OS_EVENT_TIMER_WU_A> for bool {
455 #[inline(always)]
456 fn from(variant: OS_EVENT_TIMER_WU_A) -> Self {
457 variant as u8 != 0
458 }
459}
460impl OS_EVENT_TIMER_WU_R {
461 #[doc = "Get enumerated values variant"]
462 #[inline(always)]
463 pub fn variant(&self) -> OS_EVENT_TIMER_WU_A {
464 match self.bits {
465 false => OS_EVENT_TIMER_WU_A::DISABLE,
466 true => OS_EVENT_TIMER_WU_A::ENABLE,
467 }
468 }
469 #[doc = "Checks if the value of the field is `DISABLE`"]
470 #[inline(always)]
471 pub fn is_disable(&self) -> bool {
472 *self == OS_EVENT_TIMER_WU_A::DISABLE
473 }
474 #[doc = "Checks if the value of the field is `ENABLE`"]
475 #[inline(always)]
476 pub fn is_enable(&self) -> bool {
477 *self == OS_EVENT_TIMER_WU_A::ENABLE
478 }
479}
480#[doc = "Field `OS_EVENT_TIMER_WU` writer - OS Event Timer wake-up."]
481pub type OS_EVENT_TIMER_WU_W<'a, const O: u8> =
482 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, OS_EVENT_TIMER_WU_A, O>;
483impl<'a, const O: u8> OS_EVENT_TIMER_WU_W<'a, O> {
484 #[doc = "No Effect"]
485 #[inline(always)]
486 pub fn disable(self) -> &'a mut W {
487 self.variant(OS_EVENT_TIMER_WU_A::DISABLE)
488 }
489 #[doc = "Clears the STARTEN1 Bit"]
490 #[inline(always)]
491 pub fn enable(self) -> &'a mut W {
492 self.variant(OS_EVENT_TIMER_WU_A::ENABLE)
493 }
494}
495#[doc = "Field `FLEXSPI` reader - Quad/octal SPI wake-up."]
496pub type FLEXSPI_R = crate::BitReader<FLEXSPI_A>;
497#[doc = "Quad/octal SPI wake-up.\n\nValue on reset: 0"]
498#[derive(Clone, Copy, Debug, PartialEq, Eq)]
499pub enum FLEXSPI_A {
500 #[doc = "0: No Effect"]
501 DISABLE = 0,
502 #[doc = "1: Clears the STARTEN1 Bit"]
503 ENABLE = 1,
504}
505impl From<FLEXSPI_A> for bool {
506 #[inline(always)]
507 fn from(variant: FLEXSPI_A) -> Self {
508 variant as u8 != 0
509 }
510}
511impl FLEXSPI_R {
512 #[doc = "Get enumerated values variant"]
513 #[inline(always)]
514 pub fn variant(&self) -> FLEXSPI_A {
515 match self.bits {
516 false => FLEXSPI_A::DISABLE,
517 true => FLEXSPI_A::ENABLE,
518 }
519 }
520 #[doc = "Checks if the value of the field is `DISABLE`"]
521 #[inline(always)]
522 pub fn is_disable(&self) -> bool {
523 *self == FLEXSPI_A::DISABLE
524 }
525 #[doc = "Checks if the value of the field is `ENABLE`"]
526 #[inline(always)]
527 pub fn is_enable(&self) -> bool {
528 *self == FLEXSPI_A::ENABLE
529 }
530}
531#[doc = "Field `FLEXSPI` writer - Quad/octal SPI wake-up."]
532pub type FLEXSPI_W<'a, const O: u8> = crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, FLEXSPI_A, O>;
533impl<'a, const O: u8> FLEXSPI_W<'a, O> {
534 #[doc = "No Effect"]
535 #[inline(always)]
536 pub fn disable(self) -> &'a mut W {
537 self.variant(FLEXSPI_A::DISABLE)
538 }
539 #[doc = "Clears the STARTEN1 Bit"]
540 #[inline(always)]
541 pub fn enable(self) -> &'a mut W {
542 self.variant(FLEXSPI_A::ENABLE)
543 }
544}
545#[doc = "Field `FLEXCOMM6` reader - FLEXCOMM6 wake-up."]
546pub type FLEXCOMM6_R = crate::BitReader<FLEXCOMM6_A>;
547#[doc = "FLEXCOMM6 wake-up.\n\nValue on reset: 0"]
548#[derive(Clone, Copy, Debug, PartialEq, Eq)]
549pub enum FLEXCOMM6_A {
550 #[doc = "0: No Effect"]
551 DISABLE = 0,
552 #[doc = "1: Clears the STARTEN1 Bit"]
553 ENABLE = 1,
554}
555impl From<FLEXCOMM6_A> for bool {
556 #[inline(always)]
557 fn from(variant: FLEXCOMM6_A) -> Self {
558 variant as u8 != 0
559 }
560}
561impl FLEXCOMM6_R {
562 #[doc = "Get enumerated values variant"]
563 #[inline(always)]
564 pub fn variant(&self) -> FLEXCOMM6_A {
565 match self.bits {
566 false => FLEXCOMM6_A::DISABLE,
567 true => FLEXCOMM6_A::ENABLE,
568 }
569 }
570 #[doc = "Checks if the value of the field is `DISABLE`"]
571 #[inline(always)]
572 pub fn is_disable(&self) -> bool {
573 *self == FLEXCOMM6_A::DISABLE
574 }
575 #[doc = "Checks if the value of the field is `ENABLE`"]
576 #[inline(always)]
577 pub fn is_enable(&self) -> bool {
578 *self == FLEXCOMM6_A::ENABLE
579 }
580}
581#[doc = "Field `FLEXCOMM6` writer - FLEXCOMM6 wake-up."]
582pub type FLEXCOMM6_W<'a, const O: u8> =
583 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, FLEXCOMM6_A, O>;
584impl<'a, const O: u8> FLEXCOMM6_W<'a, O> {
585 #[doc = "No Effect"]
586 #[inline(always)]
587 pub fn disable(self) -> &'a mut W {
588 self.variant(FLEXCOMM6_A::DISABLE)
589 }
590 #[doc = "Clears the STARTEN1 Bit"]
591 #[inline(always)]
592 pub fn enable(self) -> &'a mut W {
593 self.variant(FLEXCOMM6_A::ENABLE)
594 }
595}
596#[doc = "Field `FLEXCOMM7` reader - FLEXCOMM7 wake-up."]
597pub type FLEXCOMM7_R = crate::BitReader<FLEXCOMM7_A>;
598#[doc = "FLEXCOMM7 wake-up.\n\nValue on reset: 0"]
599#[derive(Clone, Copy, Debug, PartialEq, Eq)]
600pub enum FLEXCOMM7_A {
601 #[doc = "0: No Effect"]
602 DISABLE = 0,
603 #[doc = "1: Clears the STARTEN1 Bit"]
604 ENABLE = 1,
605}
606impl From<FLEXCOMM7_A> for bool {
607 #[inline(always)]
608 fn from(variant: FLEXCOMM7_A) -> Self {
609 variant as u8 != 0
610 }
611}
612impl FLEXCOMM7_R {
613 #[doc = "Get enumerated values variant"]
614 #[inline(always)]
615 pub fn variant(&self) -> FLEXCOMM7_A {
616 match self.bits {
617 false => FLEXCOMM7_A::DISABLE,
618 true => FLEXCOMM7_A::ENABLE,
619 }
620 }
621 #[doc = "Checks if the value of the field is `DISABLE`"]
622 #[inline(always)]
623 pub fn is_disable(&self) -> bool {
624 *self == FLEXCOMM7_A::DISABLE
625 }
626 #[doc = "Checks if the value of the field is `ENABLE`"]
627 #[inline(always)]
628 pub fn is_enable(&self) -> bool {
629 *self == FLEXCOMM7_A::ENABLE
630 }
631}
632#[doc = "Field `FLEXCOMM7` writer - FLEXCOMM7 wake-up."]
633pub type FLEXCOMM7_W<'a, const O: u8> =
634 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, FLEXCOMM7_A, O>;
635impl<'a, const O: u8> FLEXCOMM7_W<'a, O> {
636 #[doc = "No Effect"]
637 #[inline(always)]
638 pub fn disable(self) -> &'a mut W {
639 self.variant(FLEXCOMM7_A::DISABLE)
640 }
641 #[doc = "Clears the STARTEN1 Bit"]
642 #[inline(always)]
643 pub fn enable(self) -> &'a mut W {
644 self.variant(FLEXCOMM7_A::ENABLE)
645 }
646}
647#[doc = "Field `SDIO0` reader - SDIO0 wake-up."]
648pub type SDIO0_R = crate::BitReader<SDIO0_A>;
649#[doc = "SDIO0 wake-up.\n\nValue on reset: 0"]
650#[derive(Clone, Copy, Debug, PartialEq, Eq)]
651pub enum SDIO0_A {
652 #[doc = "0: No Effect"]
653 DISABLE = 0,
654 #[doc = "1: Clears the STARTEN1 Bit"]
655 ENABLE = 1,
656}
657impl From<SDIO0_A> for bool {
658 #[inline(always)]
659 fn from(variant: SDIO0_A) -> Self {
660 variant as u8 != 0
661 }
662}
663impl SDIO0_R {
664 #[doc = "Get enumerated values variant"]
665 #[inline(always)]
666 pub fn variant(&self) -> SDIO0_A {
667 match self.bits {
668 false => SDIO0_A::DISABLE,
669 true => SDIO0_A::ENABLE,
670 }
671 }
672 #[doc = "Checks if the value of the field is `DISABLE`"]
673 #[inline(always)]
674 pub fn is_disable(&self) -> bool {
675 *self == SDIO0_A::DISABLE
676 }
677 #[doc = "Checks if the value of the field is `ENABLE`"]
678 #[inline(always)]
679 pub fn is_enable(&self) -> bool {
680 *self == SDIO0_A::ENABLE
681 }
682}
683#[doc = "Field `SDIO0` writer - SDIO0 wake-up."]
684pub type SDIO0_W<'a, const O: u8> = crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, SDIO0_A, O>;
685impl<'a, const O: u8> SDIO0_W<'a, O> {
686 #[doc = "No Effect"]
687 #[inline(always)]
688 pub fn disable(self) -> &'a mut W {
689 self.variant(SDIO0_A::DISABLE)
690 }
691 #[doc = "Clears the STARTEN1 Bit"]
692 #[inline(always)]
693 pub fn enable(self) -> &'a mut W {
694 self.variant(SDIO0_A::ENABLE)
695 }
696}
697#[doc = "Field `SDIO1` reader - SDIO01 wake-up."]
698pub type SDIO1_R = crate::BitReader<SDIO1_A>;
699#[doc = "SDIO01 wake-up.\n\nValue on reset: 0"]
700#[derive(Clone, Copy, Debug, PartialEq, Eq)]
701pub enum SDIO1_A {
702 #[doc = "0: No Effect"]
703 DISABLE = 0,
704 #[doc = "1: Clears the STARTEN1 Bit"]
705 ENABLE = 1,
706}
707impl From<SDIO1_A> for bool {
708 #[inline(always)]
709 fn from(variant: SDIO1_A) -> Self {
710 variant as u8 != 0
711 }
712}
713impl SDIO1_R {
714 #[doc = "Get enumerated values variant"]
715 #[inline(always)]
716 pub fn variant(&self) -> SDIO1_A {
717 match self.bits {
718 false => SDIO1_A::DISABLE,
719 true => SDIO1_A::ENABLE,
720 }
721 }
722 #[doc = "Checks if the value of the field is `DISABLE`"]
723 #[inline(always)]
724 pub fn is_disable(&self) -> bool {
725 *self == SDIO1_A::DISABLE
726 }
727 #[doc = "Checks if the value of the field is `ENABLE`"]
728 #[inline(always)]
729 pub fn is_enable(&self) -> bool {
730 *self == SDIO1_A::ENABLE
731 }
732}
733#[doc = "Field `SDIO1` writer - SDIO01 wake-up."]
734pub type SDIO1_W<'a, const O: u8> = crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, SDIO1_A, O>;
735impl<'a, const O: u8> SDIO1_W<'a, O> {
736 #[doc = "No Effect"]
737 #[inline(always)]
738 pub fn disable(self) -> &'a mut W {
739 self.variant(SDIO1_A::DISABLE)
740 }
741 #[doc = "Clears the STARTEN1 Bit"]
742 #[inline(always)]
743 pub fn enable(self) -> &'a mut W {
744 self.variant(SDIO1_A::ENABLE)
745 }
746}
747#[doc = "Field `SGPIO_INTA` reader - Secure GPIO interrupt A wake-up."]
748pub type SGPIO_INTA_R = crate::BitReader<SGPIO_INTA_A>;
749#[doc = "Secure GPIO interrupt A wake-up.\n\nValue on reset: 0"]
750#[derive(Clone, Copy, Debug, PartialEq, Eq)]
751pub enum SGPIO_INTA_A {
752 #[doc = "0: No Effect"]
753 DISABLE = 0,
754 #[doc = "1: Clears the STARTEN1 Bit"]
755 ENABLE = 1,
756}
757impl From<SGPIO_INTA_A> for bool {
758 #[inline(always)]
759 fn from(variant: SGPIO_INTA_A) -> Self {
760 variant as u8 != 0
761 }
762}
763impl SGPIO_INTA_R {
764 #[doc = "Get enumerated values variant"]
765 #[inline(always)]
766 pub fn variant(&self) -> SGPIO_INTA_A {
767 match self.bits {
768 false => SGPIO_INTA_A::DISABLE,
769 true => SGPIO_INTA_A::ENABLE,
770 }
771 }
772 #[doc = "Checks if the value of the field is `DISABLE`"]
773 #[inline(always)]
774 pub fn is_disable(&self) -> bool {
775 *self == SGPIO_INTA_A::DISABLE
776 }
777 #[doc = "Checks if the value of the field is `ENABLE`"]
778 #[inline(always)]
779 pub fn is_enable(&self) -> bool {
780 *self == SGPIO_INTA_A::ENABLE
781 }
782}
783#[doc = "Field `SGPIO_INTA` writer - Secure GPIO interrupt A wake-up."]
784pub type SGPIO_INTA_W<'a, const O: u8> =
785 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, SGPIO_INTA_A, O>;
786impl<'a, const O: u8> SGPIO_INTA_W<'a, O> {
787 #[doc = "No Effect"]
788 #[inline(always)]
789 pub fn disable(self) -> &'a mut W {
790 self.variant(SGPIO_INTA_A::DISABLE)
791 }
792 #[doc = "Clears the STARTEN1 Bit"]
793 #[inline(always)]
794 pub fn enable(self) -> &'a mut W {
795 self.variant(SGPIO_INTA_A::ENABLE)
796 }
797}
798#[doc = "Field `SGPIO_INTB` reader - Secure GPIO interrupt B wake-up."]
799pub type SGPIO_INTB_R = crate::BitReader<SGPIO_INTB_A>;
800#[doc = "Secure GPIO interrupt B wake-up.\n\nValue on reset: 0"]
801#[derive(Clone, Copy, Debug, PartialEq, Eq)]
802pub enum SGPIO_INTB_A {
803 #[doc = "0: No Effect"]
804 DISABLE = 0,
805 #[doc = "1: Clears the STARTEN1 Bit"]
806 ENABLE = 1,
807}
808impl From<SGPIO_INTB_A> for bool {
809 #[inline(always)]
810 fn from(variant: SGPIO_INTB_A) -> Self {
811 variant as u8 != 0
812 }
813}
814impl SGPIO_INTB_R {
815 #[doc = "Get enumerated values variant"]
816 #[inline(always)]
817 pub fn variant(&self) -> SGPIO_INTB_A {
818 match self.bits {
819 false => SGPIO_INTB_A::DISABLE,
820 true => SGPIO_INTB_A::ENABLE,
821 }
822 }
823 #[doc = "Checks if the value of the field is `DISABLE`"]
824 #[inline(always)]
825 pub fn is_disable(&self) -> bool {
826 *self == SGPIO_INTB_A::DISABLE
827 }
828 #[doc = "Checks if the value of the field is `ENABLE`"]
829 #[inline(always)]
830 pub fn is_enable(&self) -> bool {
831 *self == SGPIO_INTB_A::ENABLE
832 }
833}
834#[doc = "Field `SGPIO_INTB` writer - Secure GPIO interrupt B wake-up."]
835pub type SGPIO_INTB_W<'a, const O: u8> =
836 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, SGPIO_INTB_A, O>;
837impl<'a, const O: u8> SGPIO_INTB_W<'a, O> {
838 #[doc = "No Effect"]
839 #[inline(always)]
840 pub fn disable(self) -> &'a mut W {
841 self.variant(SGPIO_INTB_A::DISABLE)
842 }
843 #[doc = "Clears the STARTEN1 Bit"]
844 #[inline(always)]
845 pub fn enable(self) -> &'a mut W {
846 self.variant(SGPIO_INTB_A::ENABLE)
847 }
848}
849#[doc = "Field `USB0_NEEDCLK` reader - USB activity wake-up."]
850pub type USB0_NEEDCLK_R = crate::BitReader<USB0_NEEDCLK_A>;
851#[doc = "USB activity wake-up.\n\nValue on reset: 0"]
852#[derive(Clone, Copy, Debug, PartialEq, Eq)]
853pub enum USB0_NEEDCLK_A {
854 #[doc = "0: No Effect"]
855 DISABLE = 0,
856 #[doc = "1: Clears the STARTEN1 Bit"]
857 ENABLE = 1,
858}
859impl From<USB0_NEEDCLK_A> for bool {
860 #[inline(always)]
861 fn from(variant: USB0_NEEDCLK_A) -> Self {
862 variant as u8 != 0
863 }
864}
865impl USB0_NEEDCLK_R {
866 #[doc = "Get enumerated values variant"]
867 #[inline(always)]
868 pub fn variant(&self) -> USB0_NEEDCLK_A {
869 match self.bits {
870 false => USB0_NEEDCLK_A::DISABLE,
871 true => USB0_NEEDCLK_A::ENABLE,
872 }
873 }
874 #[doc = "Checks if the value of the field is `DISABLE`"]
875 #[inline(always)]
876 pub fn is_disable(&self) -> bool {
877 *self == USB0_NEEDCLK_A::DISABLE
878 }
879 #[doc = "Checks if the value of the field is `ENABLE`"]
880 #[inline(always)]
881 pub fn is_enable(&self) -> bool {
882 *self == USB0_NEEDCLK_A::ENABLE
883 }
884}
885#[doc = "Field `USB0_NEEDCLK` writer - USB activity wake-up."]
886pub type USB0_NEEDCLK_W<'a, const O: u8> =
887 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, USB0_NEEDCLK_A, O>;
888impl<'a, const O: u8> USB0_NEEDCLK_W<'a, O> {
889 #[doc = "No Effect"]
890 #[inline(always)]
891 pub fn disable(self) -> &'a mut W {
892 self.variant(USB0_NEEDCLK_A::DISABLE)
893 }
894 #[doc = "Clears the STARTEN1 Bit"]
895 #[inline(always)]
896 pub fn enable(self) -> &'a mut W {
897 self.variant(USB0_NEEDCLK_A::ENABLE)
898 }
899}
900#[doc = "Field `USB_PHYDCD` reader - USB PHY DCD interrupt wake-up"]
901pub type USB_PHYDCD_R = crate::BitReader<USB_PHYDCD_A>;
902#[doc = "USB PHY DCD interrupt wake-up\n\nValue on reset: 0"]
903#[derive(Clone, Copy, Debug, PartialEq, Eq)]
904pub enum USB_PHYDCD_A {
905 #[doc = "0: No Effect"]
906 DISABLE = 0,
907 #[doc = "1: Clears the STARTEN1 Bit"]
908 ENABLE = 1,
909}
910impl From<USB_PHYDCD_A> for bool {
911 #[inline(always)]
912 fn from(variant: USB_PHYDCD_A) -> Self {
913 variant as u8 != 0
914 }
915}
916impl USB_PHYDCD_R {
917 #[doc = "Get enumerated values variant"]
918 #[inline(always)]
919 pub fn variant(&self) -> USB_PHYDCD_A {
920 match self.bits {
921 false => USB_PHYDCD_A::DISABLE,
922 true => USB_PHYDCD_A::ENABLE,
923 }
924 }
925 #[doc = "Checks if the value of the field is `DISABLE`"]
926 #[inline(always)]
927 pub fn is_disable(&self) -> bool {
928 *self == USB_PHYDCD_A::DISABLE
929 }
930 #[doc = "Checks if the value of the field is `ENABLE`"]
931 #[inline(always)]
932 pub fn is_enable(&self) -> bool {
933 *self == USB_PHYDCD_A::ENABLE
934 }
935}
936#[doc = "Field `USB_PHYDCD` writer - USB PHY DCD interrupt wake-up"]
937pub type USB_PHYDCD_W<'a, const O: u8> =
938 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, USB_PHYDCD_A, O>;
939impl<'a, const O: u8> USB_PHYDCD_W<'a, O> {
940 #[doc = "No Effect"]
941 #[inline(always)]
942 pub fn disable(self) -> &'a mut W {
943 self.variant(USB_PHYDCD_A::DISABLE)
944 }
945 #[doc = "Clears the STARTEN1 Bit"]
946 #[inline(always)]
947 pub fn enable(self) -> &'a mut W {
948 self.variant(USB_PHYDCD_A::ENABLE)
949 }
950}
951#[doc = "Field `DMAC1` reader - DMA controller 1 wake-up."]
952pub type DMAC1_R = crate::BitReader<DMAC1_A>;
953#[doc = "DMA controller 1 wake-up.\n\nValue on reset: 0"]
954#[derive(Clone, Copy, Debug, PartialEq, Eq)]
955pub enum DMAC1_A {
956 #[doc = "0: No Effect"]
957 DISABLE = 0,
958 #[doc = "1: Clears the STARTEN1 Bit"]
959 ENABLE = 1,
960}
961impl From<DMAC1_A> for bool {
962 #[inline(always)]
963 fn from(variant: DMAC1_A) -> Self {
964 variant as u8 != 0
965 }
966}
967impl DMAC1_R {
968 #[doc = "Get enumerated values variant"]
969 #[inline(always)]
970 pub fn variant(&self) -> DMAC1_A {
971 match self.bits {
972 false => DMAC1_A::DISABLE,
973 true => DMAC1_A::ENABLE,
974 }
975 }
976 #[doc = "Checks if the value of the field is `DISABLE`"]
977 #[inline(always)]
978 pub fn is_disable(&self) -> bool {
979 *self == DMAC1_A::DISABLE
980 }
981 #[doc = "Checks if the value of the field is `ENABLE`"]
982 #[inline(always)]
983 pub fn is_enable(&self) -> bool {
984 *self == DMAC1_A::ENABLE
985 }
986}
987#[doc = "Field `DMAC1` writer - DMA controller 1 wake-up."]
988pub type DMAC1_W<'a, const O: u8> = crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, DMAC1_A, O>;
989impl<'a, const O: u8> DMAC1_W<'a, O> {
990 #[doc = "No Effect"]
991 #[inline(always)]
992 pub fn disable(self) -> &'a mut W {
993 self.variant(DMAC1_A::DISABLE)
994 }
995 #[doc = "Clears the STARTEN1 Bit"]
996 #[inline(always)]
997 pub fn enable(self) -> &'a mut W {
998 self.variant(DMAC1_A::ENABLE)
999 }
1000}
1001#[doc = "Field `PUF` reader - PUF wake-up."]
1002pub type PUF_R = crate::BitReader<PUF_A>;
1003#[doc = "PUF wake-up.\n\nValue on reset: 0"]
1004#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1005pub enum PUF_A {
1006 #[doc = "0: No Effect"]
1007 DISABLE = 0,
1008 #[doc = "1: Clears the STARTEN1 Bit"]
1009 ENABLE = 1,
1010}
1011impl From<PUF_A> for bool {
1012 #[inline(always)]
1013 fn from(variant: PUF_A) -> Self {
1014 variant as u8 != 0
1015 }
1016}
1017impl PUF_R {
1018 #[doc = "Get enumerated values variant"]
1019 #[inline(always)]
1020 pub fn variant(&self) -> PUF_A {
1021 match self.bits {
1022 false => PUF_A::DISABLE,
1023 true => PUF_A::ENABLE,
1024 }
1025 }
1026 #[doc = "Checks if the value of the field is `DISABLE`"]
1027 #[inline(always)]
1028 pub fn is_disable(&self) -> bool {
1029 *self == PUF_A::DISABLE
1030 }
1031 #[doc = "Checks if the value of the field is `ENABLE`"]
1032 #[inline(always)]
1033 pub fn is_enable(&self) -> bool {
1034 *self == PUF_A::ENABLE
1035 }
1036}
1037#[doc = "Field `PUF` writer - PUF wake-up."]
1038pub type PUF_W<'a, const O: u8> = crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, PUF_A, O>;
1039impl<'a, const O: u8> PUF_W<'a, O> {
1040 #[doc = "No Effect"]
1041 #[inline(always)]
1042 pub fn disable(self) -> &'a mut W {
1043 self.variant(PUF_A::DISABLE)
1044 }
1045 #[doc = "Clears the STARTEN1 Bit"]
1046 #[inline(always)]
1047 pub fn enable(self) -> &'a mut W {
1048 self.variant(PUF_A::ENABLE)
1049 }
1050}
1051#[doc = "Field `POWERQUAD` reader - POWERQUAD co-processor wake-up."]
1052pub type POWERQUAD_R = crate::BitReader<POWERQUAD_A>;
1053#[doc = "POWERQUAD co-processor wake-up.\n\nValue on reset: 0"]
1054#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1055pub enum POWERQUAD_A {
1056 #[doc = "0: No Effect"]
1057 DISABLE = 0,
1058 #[doc = "1: Clears the STARTEN1 Bit"]
1059 ENABLE = 1,
1060}
1061impl From<POWERQUAD_A> for bool {
1062 #[inline(always)]
1063 fn from(variant: POWERQUAD_A) -> Self {
1064 variant as u8 != 0
1065 }
1066}
1067impl POWERQUAD_R {
1068 #[doc = "Get enumerated values variant"]
1069 #[inline(always)]
1070 pub fn variant(&self) -> POWERQUAD_A {
1071 match self.bits {
1072 false => POWERQUAD_A::DISABLE,
1073 true => POWERQUAD_A::ENABLE,
1074 }
1075 }
1076 #[doc = "Checks if the value of the field is `DISABLE`"]
1077 #[inline(always)]
1078 pub fn is_disable(&self) -> bool {
1079 *self == POWERQUAD_A::DISABLE
1080 }
1081 #[doc = "Checks if the value of the field is `ENABLE`"]
1082 #[inline(always)]
1083 pub fn is_enable(&self) -> bool {
1084 *self == POWERQUAD_A::ENABLE
1085 }
1086}
1087#[doc = "Field `POWERQUAD` writer - POWERQUAD co-processor wake-up."]
1088pub type POWERQUAD_W<'a, const O: u8> =
1089 crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, POWERQUAD_A, O>;
1090impl<'a, const O: u8> POWERQUAD_W<'a, O> {
1091 #[doc = "No Effect"]
1092 #[inline(always)]
1093 pub fn disable(self) -> &'a mut W {
1094 self.variant(POWERQUAD_A::DISABLE)
1095 }
1096 #[doc = "Clears the STARTEN1 Bit"]
1097 #[inline(always)]
1098 pub fn enable(self) -> &'a mut W {
1099 self.variant(POWERQUAD_A::ENABLE)
1100 }
1101}
1102#[doc = "Field `CASPER` reader - CASPER co-processor wake-up."]
1103pub type CASPER_R = crate::BitReader<CASPER_A>;
1104#[doc = "CASPER co-processor wake-up.\n\nValue on reset: 0"]
1105#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1106pub enum CASPER_A {
1107 #[doc = "0: No Effect"]
1108 DISABLE = 0,
1109 #[doc = "1: Clears the STARTEN1 Bit"]
1110 ENABLE = 1,
1111}
1112impl From<CASPER_A> for bool {
1113 #[inline(always)]
1114 fn from(variant: CASPER_A) -> Self {
1115 variant as u8 != 0
1116 }
1117}
1118impl CASPER_R {
1119 #[doc = "Get enumerated values variant"]
1120 #[inline(always)]
1121 pub fn variant(&self) -> CASPER_A {
1122 match self.bits {
1123 false => CASPER_A::DISABLE,
1124 true => CASPER_A::ENABLE,
1125 }
1126 }
1127 #[doc = "Checks if the value of the field is `DISABLE`"]
1128 #[inline(always)]
1129 pub fn is_disable(&self) -> bool {
1130 *self == CASPER_A::DISABLE
1131 }
1132 #[doc = "Checks if the value of the field is `ENABLE`"]
1133 #[inline(always)]
1134 pub fn is_enable(&self) -> bool {
1135 *self == CASPER_A::ENABLE
1136 }
1137}
1138#[doc = "Field `CASPER` writer - CASPER co-processor wake-up."]
1139pub type CASPER_W<'a, const O: u8> = crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, CASPER_A, O>;
1140impl<'a, const O: u8> CASPER_W<'a, O> {
1141 #[doc = "No Effect"]
1142 #[inline(always)]
1143 pub fn disable(self) -> &'a mut W {
1144 self.variant(CASPER_A::DISABLE)
1145 }
1146 #[doc = "Clears the STARTEN1 Bit"]
1147 #[inline(always)]
1148 pub fn enable(self) -> &'a mut W {
1149 self.variant(CASPER_A::ENABLE)
1150 }
1151}
1152#[doc = "Field `PMIC` reader - Wake-up from on-chip PMC or off-chip PMIC."]
1153pub type PMIC_R = crate::BitReader<PMIC_A>;
1154#[doc = "Wake-up from on-chip PMC or off-chip PMIC.\n\nValue on reset: 0"]
1155#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1156pub enum PMIC_A {
1157 #[doc = "0: No Effect"]
1158 DISABLE = 0,
1159 #[doc = "1: Clears the STARTEN1 Bit"]
1160 ENABLE = 1,
1161}
1162impl From<PMIC_A> for bool {
1163 #[inline(always)]
1164 fn from(variant: PMIC_A) -> Self {
1165 variant as u8 != 0
1166 }
1167}
1168impl PMIC_R {
1169 #[doc = "Get enumerated values variant"]
1170 #[inline(always)]
1171 pub fn variant(&self) -> PMIC_A {
1172 match self.bits {
1173 false => PMIC_A::DISABLE,
1174 true => PMIC_A::ENABLE,
1175 }
1176 }
1177 #[doc = "Checks if the value of the field is `DISABLE`"]
1178 #[inline(always)]
1179 pub fn is_disable(&self) -> bool {
1180 *self == PMIC_A::DISABLE
1181 }
1182 #[doc = "Checks if the value of the field is `ENABLE`"]
1183 #[inline(always)]
1184 pub fn is_enable(&self) -> bool {
1185 *self == PMIC_A::ENABLE
1186 }
1187}
1188#[doc = "Field `PMIC` writer - Wake-up from on-chip PMC or off-chip PMIC."]
1189pub type PMIC_W<'a, const O: u8> = crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, PMIC_A, O>;
1190impl<'a, const O: u8> PMIC_W<'a, O> {
1191 #[doc = "No Effect"]
1192 #[inline(always)]
1193 pub fn disable(self) -> &'a mut W {
1194 self.variant(PMIC_A::DISABLE)
1195 }
1196 #[doc = "Clears the STARTEN1 Bit"]
1197 #[inline(always)]
1198 pub fn enable(self) -> &'a mut W {
1199 self.variant(PMIC_A::ENABLE)
1200 }
1201}
1202#[doc = "Field `SHA` reader - Hash-AES wake-up."]
1203pub type SHA_R = crate::BitReader<SHA_A>;
1204#[doc = "Hash-AES wake-up.\n\nValue on reset: 0"]
1205#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1206pub enum SHA_A {
1207 #[doc = "0: No Effect"]
1208 DISABLE = 0,
1209 #[doc = "1: Clears the STARTEN1 Bit"]
1210 ENABLE = 1,
1211}
1212impl From<SHA_A> for bool {
1213 #[inline(always)]
1214 fn from(variant: SHA_A) -> Self {
1215 variant as u8 != 0
1216 }
1217}
1218impl SHA_R {
1219 #[doc = "Get enumerated values variant"]
1220 #[inline(always)]
1221 pub fn variant(&self) -> SHA_A {
1222 match self.bits {
1223 false => SHA_A::DISABLE,
1224 true => SHA_A::ENABLE,
1225 }
1226 }
1227 #[doc = "Checks if the value of the field is `DISABLE`"]
1228 #[inline(always)]
1229 pub fn is_disable(&self) -> bool {
1230 *self == SHA_A::DISABLE
1231 }
1232 #[doc = "Checks if the value of the field is `ENABLE`"]
1233 #[inline(always)]
1234 pub fn is_enable(&self) -> bool {
1235 *self == SHA_A::ENABLE
1236 }
1237}
1238#[doc = "Field `SHA` writer - Hash-AES wake-up."]
1239pub type SHA_W<'a, const O: u8> = crate::BitWriter1C<'a, u32, STARTEN1_CLR_SPEC, SHA_A, O>;
1240impl<'a, const O: u8> SHA_W<'a, O> {
1241 #[doc = "No Effect"]
1242 #[inline(always)]
1243 pub fn disable(self) -> &'a mut W {
1244 self.variant(SHA_A::DISABLE)
1245 }
1246 #[doc = "Clears the STARTEN1 Bit"]
1247 #[inline(always)]
1248 pub fn enable(self) -> &'a mut W {
1249 self.variant(SHA_A::ENABLE)
1250 }
1251}
1252#[doc = "Field `FLEXCOMM8` reader - FLEXCOMM 8 peripheral interrupt wake-up."]
1253pub type FLEXCOMM8_R = crate::BitReader<FLEXCOMM8_A>;
1254#[doc = "FLEXCOMM 8 peripheral interrupt wake-up.\n\nValue on reset: 0"]
1255#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1256pub enum FLEXCOMM8_A {
1257 #[doc = "0: No Effect"]
1258 DISABLE = 0,
1259 #[doc = "1: Clears the STARTEN1 Bit"]
1260 ENABLE = 1,
1261}
1262impl From<FLEXCOMM8_A> for bool {
1263 #[inline(always)]
1264 fn from(variant: FLEXCOMM8_A) -> Self {
1265 variant as u8 != 0
1266 }
1267}
1268impl FLEXCOMM8_R {
1269 #[doc = "Get enumerated values variant"]
1270 #[inline(always)]
1271 pub fn variant(&self) -> FLEXCOMM8_A {
1272 match self.bits {
1273 false => FLEXCOMM8_A::DISABLE,
1274 true => FLEXCOMM8_A::ENABLE,
1275 }
1276 }
1277 #[doc = "Checks if the value of the field is `DISABLE`"]
1278 #[inline(always)]
1279 pub fn is_disable(&self) -> bool {
1280 *self == FLEXCOMM8_A::DISABLE
1281 }
1282 #[doc = "Checks if the value of the field is `ENABLE`"]
1283 #[inline(always)]
1284 pub fn is_enable(&self) -> bool {
1285 *self == FLEXCOMM8_A::ENABLE
1286 }
1287}
1288#[doc = "Field `FLEXCOMM8` writer - FLEXCOMM 8 peripheral interrupt wake-up."]
1289pub type FLEXCOMM8_W<'a, const O: u8> =
1290 crate::BitWriter<'a, u32, STARTEN1_CLR_SPEC, FLEXCOMM8_A, O>;
1291impl<'a, const O: u8> FLEXCOMM8_W<'a, O> {
1292 #[doc = "No Effect"]
1293 #[inline(always)]
1294 pub fn disable(self) -> &'a mut W {
1295 self.variant(FLEXCOMM8_A::DISABLE)
1296 }
1297 #[doc = "Clears the STARTEN1 Bit"]
1298 #[inline(always)]
1299 pub fn enable(self) -> &'a mut W {
1300 self.variant(FLEXCOMM8_A::ENABLE)
1301 }
1302}
1303#[doc = "Field `FLEXCOMM9` reader - FLEXCOMM 9 peripheral interrupt wake-up."]
1304pub type FLEXCOMM9_R = crate::BitReader<FLEXCOMM9_A>;
1305#[doc = "FLEXCOMM 9 peripheral interrupt wake-up.\n\nValue on reset: 0"]
1306#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1307pub enum FLEXCOMM9_A {
1308 #[doc = "0: No Effect"]
1309 DISABLE = 0,
1310 #[doc = "1: Clears the STARTEN1 Bit"]
1311 ENABLE = 1,
1312}
1313impl From<FLEXCOMM9_A> for bool {
1314 #[inline(always)]
1315 fn from(variant: FLEXCOMM9_A) -> Self {
1316 variant as u8 != 0
1317 }
1318}
1319impl FLEXCOMM9_R {
1320 #[doc = "Get enumerated values variant"]
1321 #[inline(always)]
1322 pub fn variant(&self) -> FLEXCOMM9_A {
1323 match self.bits {
1324 false => FLEXCOMM9_A::DISABLE,
1325 true => FLEXCOMM9_A::ENABLE,
1326 }
1327 }
1328 #[doc = "Checks if the value of the field is `DISABLE`"]
1329 #[inline(always)]
1330 pub fn is_disable(&self) -> bool {
1331 *self == FLEXCOMM9_A::DISABLE
1332 }
1333 #[doc = "Checks if the value of the field is `ENABLE`"]
1334 #[inline(always)]
1335 pub fn is_enable(&self) -> bool {
1336 *self == FLEXCOMM9_A::ENABLE
1337 }
1338}
1339#[doc = "Field `FLEXCOMM9` writer - FLEXCOMM 9 peripheral interrupt wake-up."]
1340pub type FLEXCOMM9_W<'a, const O: u8> =
1341 crate::BitWriter<'a, u32, STARTEN1_CLR_SPEC, FLEXCOMM9_A, O>;
1342impl<'a, const O: u8> FLEXCOMM9_W<'a, O> {
1343 #[doc = "No Effect"]
1344 #[inline(always)]
1345 pub fn disable(self) -> &'a mut W {
1346 self.variant(FLEXCOMM9_A::DISABLE)
1347 }
1348 #[doc = "Clears the STARTEN1 Bit"]
1349 #[inline(always)]
1350 pub fn enable(self) -> &'a mut W {
1351 self.variant(FLEXCOMM9_A::ENABLE)
1352 }
1353}
1354#[doc = "Field `FLEXCOMM10` reader - FLEXCOMM 10 peripheral interrupt wake-up."]
1355pub type FLEXCOMM10_R = crate::BitReader<FLEXCOMM10_A>;
1356#[doc = "FLEXCOMM 10 peripheral interrupt wake-up.\n\nValue on reset: 0"]
1357#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1358pub enum FLEXCOMM10_A {
1359 #[doc = "0: No Effect"]
1360 DISABLE = 0,
1361 #[doc = "1: Clears the STARTEN1 Bit"]
1362 ENABLE = 1,
1363}
1364impl From<FLEXCOMM10_A> for bool {
1365 #[inline(always)]
1366 fn from(variant: FLEXCOMM10_A) -> Self {
1367 variant as u8 != 0
1368 }
1369}
1370impl FLEXCOMM10_R {
1371 #[doc = "Get enumerated values variant"]
1372 #[inline(always)]
1373 pub fn variant(&self) -> FLEXCOMM10_A {
1374 match self.bits {
1375 false => FLEXCOMM10_A::DISABLE,
1376 true => FLEXCOMM10_A::ENABLE,
1377 }
1378 }
1379 #[doc = "Checks if the value of the field is `DISABLE`"]
1380 #[inline(always)]
1381 pub fn is_disable(&self) -> bool {
1382 *self == FLEXCOMM10_A::DISABLE
1383 }
1384 #[doc = "Checks if the value of the field is `ENABLE`"]
1385 #[inline(always)]
1386 pub fn is_enable(&self) -> bool {
1387 *self == FLEXCOMM10_A::ENABLE
1388 }
1389}
1390#[doc = "Field `FLEXCOMM10` writer - FLEXCOMM 10 peripheral interrupt wake-up."]
1391pub type FLEXCOMM10_W<'a, const O: u8> =
1392 crate::BitWriter<'a, u32, STARTEN1_CLR_SPEC, FLEXCOMM10_A, O>;
1393impl<'a, const O: u8> FLEXCOMM10_W<'a, O> {
1394 #[doc = "No Effect"]
1395 #[inline(always)]
1396 pub fn disable(self) -> &'a mut W {
1397 self.variant(FLEXCOMM10_A::DISABLE)
1398 }
1399 #[doc = "Clears the STARTEN1 Bit"]
1400 #[inline(always)]
1401 pub fn enable(self) -> &'a mut W {
1402 self.variant(FLEXCOMM10_A::ENABLE)
1403 }
1404}
1405#[doc = "Field `FLEXCOMM11` reader - FLEXCOMM 11 peripheral interrupt wake-up."]
1406pub type FLEXCOMM11_R = crate::BitReader<FLEXCOMM11_A>;
1407#[doc = "FLEXCOMM 11 peripheral interrupt wake-up.\n\nValue on reset: 0"]
1408#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1409pub enum FLEXCOMM11_A {
1410 #[doc = "0: No Effect"]
1411 DISABLE = 0,
1412 #[doc = "1: Clears the STARTEN1 Bit"]
1413 ENABLE = 1,
1414}
1415impl From<FLEXCOMM11_A> for bool {
1416 #[inline(always)]
1417 fn from(variant: FLEXCOMM11_A) -> Self {
1418 variant as u8 != 0
1419 }
1420}
1421impl FLEXCOMM11_R {
1422 #[doc = "Get enumerated values variant"]
1423 #[inline(always)]
1424 pub fn variant(&self) -> FLEXCOMM11_A {
1425 match self.bits {
1426 false => FLEXCOMM11_A::DISABLE,
1427 true => FLEXCOMM11_A::ENABLE,
1428 }
1429 }
1430 #[doc = "Checks if the value of the field is `DISABLE`"]
1431 #[inline(always)]
1432 pub fn is_disable(&self) -> bool {
1433 *self == FLEXCOMM11_A::DISABLE
1434 }
1435 #[doc = "Checks if the value of the field is `ENABLE`"]
1436 #[inline(always)]
1437 pub fn is_enable(&self) -> bool {
1438 *self == FLEXCOMM11_A::ENABLE
1439 }
1440}
1441#[doc = "Field `FLEXCOMM11` writer - FLEXCOMM 11 peripheral interrupt wake-up."]
1442pub type FLEXCOMM11_W<'a, const O: u8> =
1443 crate::BitWriter<'a, u32, STARTEN1_CLR_SPEC, FLEXCOMM11_A, O>;
1444impl<'a, const O: u8> FLEXCOMM11_W<'a, O> {
1445 #[doc = "No Effect"]
1446 #[inline(always)]
1447 pub fn disable(self) -> &'a mut W {
1448 self.variant(FLEXCOMM11_A::DISABLE)
1449 }
1450 #[doc = "Clears the STARTEN1 Bit"]
1451 #[inline(always)]
1452 pub fn enable(self) -> &'a mut W {
1453 self.variant(FLEXCOMM11_A::ENABLE)
1454 }
1455}
1456impl R {
1457 #[doc = "Bit 0 - RTC wake-up."]
1458 #[inline(always)]
1459 pub fn rtc_lite0_wakeup(&self) -> RTC_LITE0_WAKEUP_R {
1460 RTC_LITE0_WAKEUP_R::new((self.bits & 1) != 0)
1461 }
1462 #[doc = "Bit 2 - Message Unit wake-up."]
1463 #[inline(always)]
1464 pub fn mu(&self) -> MU_R {
1465 MU_R::new(((self.bits >> 2) & 1) != 0)
1466 }
1467 #[doc = "Bit 3 - Message Unit wake-up."]
1468 #[inline(always)]
1469 pub fn gpio_int0_irq4(&self) -> GPIO_INT0_IRQ4_R {
1470 GPIO_INT0_IRQ4_R::new(((self.bits >> 3) & 1) != 0)
1471 }
1472 #[doc = "Bit 4 - GPIO pin interrupt 5 wake-up."]
1473 #[inline(always)]
1474 pub fn gpio_int0_irq5(&self) -> GPIO_INT0_IRQ5_R {
1475 GPIO_INT0_IRQ5_R::new(((self.bits >> 4) & 1) != 0)
1476 }
1477 #[doc = "Bit 5 - GPIO pin interrupt 6 wake-up."]
1478 #[inline(always)]
1479 pub fn gpio_int0_irq6(&self) -> GPIO_INT0_IRQ6_R {
1480 GPIO_INT0_IRQ6_R::new(((self.bits >> 5) & 1) != 0)
1481 }
1482 #[doc = "Bit 6 - GPIO pin interrupt 7 wake-up."]
1483 #[inline(always)]
1484 pub fn gpio_int0_irq7(&self) -> GPIO_INT0_IRQ7_R {
1485 GPIO_INT0_IRQ7_R::new(((self.bits >> 6) & 1) != 0)
1486 }
1487 #[doc = "Bit 7 - CTIMER 2 wake-up"]
1488 #[inline(always)]
1489 pub fn ct32bit2(&self) -> CT32BIT2_R {
1490 CT32BIT2_R::new(((self.bits >> 7) & 1) != 0)
1491 }
1492 #[doc = "Bit 8 - CTIMER 4 wake-up"]
1493 #[inline(always)]
1494 pub fn ct32bit4(&self) -> CT32BIT4_R {
1495 CT32BIT4_R::new(((self.bits >> 8) & 1) != 0)
1496 }
1497 #[doc = "Bit 9 - OS Event Timer wake-up."]
1498 #[inline(always)]
1499 pub fn os_event_timer_wu(&self) -> OS_EVENT_TIMER_WU_R {
1500 OS_EVENT_TIMER_WU_R::new(((self.bits >> 9) & 1) != 0)
1501 }
1502 #[doc = "Bit 10 - Quad/octal SPI wake-up."]
1503 #[inline(always)]
1504 pub fn flexspi(&self) -> FLEXSPI_R {
1505 FLEXSPI_R::new(((self.bits >> 10) & 1) != 0)
1506 }
1507 #[doc = "Bit 11 - FLEXCOMM6 wake-up."]
1508 #[inline(always)]
1509 pub fn flexcomm6(&self) -> FLEXCOMM6_R {
1510 FLEXCOMM6_R::new(((self.bits >> 11) & 1) != 0)
1511 }
1512 #[doc = "Bit 12 - FLEXCOMM7 wake-up."]
1513 #[inline(always)]
1514 pub fn flexcomm7(&self) -> FLEXCOMM7_R {
1515 FLEXCOMM7_R::new(((self.bits >> 12) & 1) != 0)
1516 }
1517 #[doc = "Bit 13 - SDIO0 wake-up."]
1518 #[inline(always)]
1519 pub fn sdio0(&self) -> SDIO0_R {
1520 SDIO0_R::new(((self.bits >> 13) & 1) != 0)
1521 }
1522 #[doc = "Bit 14 - SDIO01 wake-up."]
1523 #[inline(always)]
1524 pub fn sdio1(&self) -> SDIO1_R {
1525 SDIO1_R::new(((self.bits >> 14) & 1) != 0)
1526 }
1527 #[doc = "Bit 15 - Secure GPIO interrupt A wake-up."]
1528 #[inline(always)]
1529 pub fn sgpio_inta(&self) -> SGPIO_INTA_R {
1530 SGPIO_INTA_R::new(((self.bits >> 15) & 1) != 0)
1531 }
1532 #[doc = "Bit 16 - Secure GPIO interrupt B wake-up."]
1533 #[inline(always)]
1534 pub fn sgpio_intb(&self) -> SGPIO_INTB_R {
1535 SGPIO_INTB_R::new(((self.bits >> 16) & 1) != 0)
1536 }
1537 #[doc = "Bit 19 - USB activity wake-up."]
1538 #[inline(always)]
1539 pub fn usb0_needclk(&self) -> USB0_NEEDCLK_R {
1540 USB0_NEEDCLK_R::new(((self.bits >> 19) & 1) != 0)
1541 }
1542 #[doc = "Bit 21 - USB PHY DCD interrupt wake-up"]
1543 #[inline(always)]
1544 pub fn usb_phydcd(&self) -> USB_PHYDCD_R {
1545 USB_PHYDCD_R::new(((self.bits >> 21) & 1) != 0)
1546 }
1547 #[doc = "Bit 22 - DMA controller 1 wake-up."]
1548 #[inline(always)]
1549 pub fn dmac1(&self) -> DMAC1_R {
1550 DMAC1_R::new(((self.bits >> 22) & 1) != 0)
1551 }
1552 #[doc = "Bit 23 - PUF wake-up."]
1553 #[inline(always)]
1554 pub fn puf(&self) -> PUF_R {
1555 PUF_R::new(((self.bits >> 23) & 1) != 0)
1556 }
1557 #[doc = "Bit 24 - POWERQUAD co-processor wake-up."]
1558 #[inline(always)]
1559 pub fn powerquad(&self) -> POWERQUAD_R {
1560 POWERQUAD_R::new(((self.bits >> 24) & 1) != 0)
1561 }
1562 #[doc = "Bit 25 - CASPER co-processor wake-up."]
1563 #[inline(always)]
1564 pub fn casper(&self) -> CASPER_R {
1565 CASPER_R::new(((self.bits >> 25) & 1) != 0)
1566 }
1567 #[doc = "Bit 26 - Wake-up from on-chip PMC or off-chip PMIC."]
1568 #[inline(always)]
1569 pub fn pmic(&self) -> PMIC_R {
1570 PMIC_R::new(((self.bits >> 26) & 1) != 0)
1571 }
1572 #[doc = "Bit 27 - Hash-AES wake-up."]
1573 #[inline(always)]
1574 pub fn sha(&self) -> SHA_R {
1575 SHA_R::new(((self.bits >> 27) & 1) != 0)
1576 }
1577 #[doc = "Bit 28 - FLEXCOMM 8 peripheral interrupt wake-up."]
1578 #[inline(always)]
1579 pub fn flexcomm8(&self) -> FLEXCOMM8_R {
1580 FLEXCOMM8_R::new(((self.bits >> 28) & 1) != 0)
1581 }
1582 #[doc = "Bit 29 - FLEXCOMM 9 peripheral interrupt wake-up."]
1583 #[inline(always)]
1584 pub fn flexcomm9(&self) -> FLEXCOMM9_R {
1585 FLEXCOMM9_R::new(((self.bits >> 29) & 1) != 0)
1586 }
1587 #[doc = "Bit 30 - FLEXCOMM 10 peripheral interrupt wake-up."]
1588 #[inline(always)]
1589 pub fn flexcomm10(&self) -> FLEXCOMM10_R {
1590 FLEXCOMM10_R::new(((self.bits >> 30) & 1) != 0)
1591 }
1592 #[doc = "Bit 31 - FLEXCOMM 11 peripheral interrupt wake-up."]
1593 #[inline(always)]
1594 pub fn flexcomm11(&self) -> FLEXCOMM11_R {
1595 FLEXCOMM11_R::new(((self.bits >> 31) & 1) != 0)
1596 }
1597}
1598impl W {
1599 #[doc = "Bit 0 - RTC wake-up."]
1600 #[inline(always)]
1601 #[must_use]
1602 pub fn rtc_lite0_wakeup(&mut self) -> RTC_LITE0_WAKEUP_W<0> {
1603 RTC_LITE0_WAKEUP_W::new(self)
1604 }
1605 #[doc = "Bit 2 - Message Unit wake-up."]
1606 #[inline(always)]
1607 #[must_use]
1608 pub fn mu(&mut self) -> MU_W<2> {
1609 MU_W::new(self)
1610 }
1611 #[doc = "Bit 3 - Message Unit wake-up."]
1612 #[inline(always)]
1613 #[must_use]
1614 pub fn gpio_int0_irq4(&mut self) -> GPIO_INT0_IRQ4_W<3> {
1615 GPIO_INT0_IRQ4_W::new(self)
1616 }
1617 #[doc = "Bit 4 - GPIO pin interrupt 5 wake-up."]
1618 #[inline(always)]
1619 #[must_use]
1620 pub fn gpio_int0_irq5(&mut self) -> GPIO_INT0_IRQ5_W<4> {
1621 GPIO_INT0_IRQ5_W::new(self)
1622 }
1623 #[doc = "Bit 5 - GPIO pin interrupt 6 wake-up."]
1624 #[inline(always)]
1625 #[must_use]
1626 pub fn gpio_int0_irq6(&mut self) -> GPIO_INT0_IRQ6_W<5> {
1627 GPIO_INT0_IRQ6_W::new(self)
1628 }
1629 #[doc = "Bit 6 - GPIO pin interrupt 7 wake-up."]
1630 #[inline(always)]
1631 #[must_use]
1632 pub fn gpio_int0_irq7(&mut self) -> GPIO_INT0_IRQ7_W<6> {
1633 GPIO_INT0_IRQ7_W::new(self)
1634 }
1635 #[doc = "Bit 7 - CTIMER 2 wake-up"]
1636 #[inline(always)]
1637 #[must_use]
1638 pub fn ct32bit2(&mut self) -> CT32BIT2_W<7> {
1639 CT32BIT2_W::new(self)
1640 }
1641 #[doc = "Bit 8 - CTIMER 4 wake-up"]
1642 #[inline(always)]
1643 #[must_use]
1644 pub fn ct32bit4(&mut self) -> CT32BIT4_W<8> {
1645 CT32BIT4_W::new(self)
1646 }
1647 #[doc = "Bit 9 - OS Event Timer wake-up."]
1648 #[inline(always)]
1649 #[must_use]
1650 pub fn os_event_timer_wu(&mut self) -> OS_EVENT_TIMER_WU_W<9> {
1651 OS_EVENT_TIMER_WU_W::new(self)
1652 }
1653 #[doc = "Bit 10 - Quad/octal SPI wake-up."]
1654 #[inline(always)]
1655 #[must_use]
1656 pub fn flexspi(&mut self) -> FLEXSPI_W<10> {
1657 FLEXSPI_W::new(self)
1658 }
1659 #[doc = "Bit 11 - FLEXCOMM6 wake-up."]
1660 #[inline(always)]
1661 #[must_use]
1662 pub fn flexcomm6(&mut self) -> FLEXCOMM6_W<11> {
1663 FLEXCOMM6_W::new(self)
1664 }
1665 #[doc = "Bit 12 - FLEXCOMM7 wake-up."]
1666 #[inline(always)]
1667 #[must_use]
1668 pub fn flexcomm7(&mut self) -> FLEXCOMM7_W<12> {
1669 FLEXCOMM7_W::new(self)
1670 }
1671 #[doc = "Bit 13 - SDIO0 wake-up."]
1672 #[inline(always)]
1673 #[must_use]
1674 pub fn sdio0(&mut self) -> SDIO0_W<13> {
1675 SDIO0_W::new(self)
1676 }
1677 #[doc = "Bit 14 - SDIO01 wake-up."]
1678 #[inline(always)]
1679 #[must_use]
1680 pub fn sdio1(&mut self) -> SDIO1_W<14> {
1681 SDIO1_W::new(self)
1682 }
1683 #[doc = "Bit 15 - Secure GPIO interrupt A wake-up."]
1684 #[inline(always)]
1685 #[must_use]
1686 pub fn sgpio_inta(&mut self) -> SGPIO_INTA_W<15> {
1687 SGPIO_INTA_W::new(self)
1688 }
1689 #[doc = "Bit 16 - Secure GPIO interrupt B wake-up."]
1690 #[inline(always)]
1691 #[must_use]
1692 pub fn sgpio_intb(&mut self) -> SGPIO_INTB_W<16> {
1693 SGPIO_INTB_W::new(self)
1694 }
1695 #[doc = "Bit 19 - USB activity wake-up."]
1696 #[inline(always)]
1697 #[must_use]
1698 pub fn usb0_needclk(&mut self) -> USB0_NEEDCLK_W<19> {
1699 USB0_NEEDCLK_W::new(self)
1700 }
1701 #[doc = "Bit 21 - USB PHY DCD interrupt wake-up"]
1702 #[inline(always)]
1703 #[must_use]
1704 pub fn usb_phydcd(&mut self) -> USB_PHYDCD_W<21> {
1705 USB_PHYDCD_W::new(self)
1706 }
1707 #[doc = "Bit 22 - DMA controller 1 wake-up."]
1708 #[inline(always)]
1709 #[must_use]
1710 pub fn dmac1(&mut self) -> DMAC1_W<22> {
1711 DMAC1_W::new(self)
1712 }
1713 #[doc = "Bit 23 - PUF wake-up."]
1714 #[inline(always)]
1715 #[must_use]
1716 pub fn puf(&mut self) -> PUF_W<23> {
1717 PUF_W::new(self)
1718 }
1719 #[doc = "Bit 24 - POWERQUAD co-processor wake-up."]
1720 #[inline(always)]
1721 #[must_use]
1722 pub fn powerquad(&mut self) -> POWERQUAD_W<24> {
1723 POWERQUAD_W::new(self)
1724 }
1725 #[doc = "Bit 25 - CASPER co-processor wake-up."]
1726 #[inline(always)]
1727 #[must_use]
1728 pub fn casper(&mut self) -> CASPER_W<25> {
1729 CASPER_W::new(self)
1730 }
1731 #[doc = "Bit 26 - Wake-up from on-chip PMC or off-chip PMIC."]
1732 #[inline(always)]
1733 #[must_use]
1734 pub fn pmic(&mut self) -> PMIC_W<26> {
1735 PMIC_W::new(self)
1736 }
1737 #[doc = "Bit 27 - Hash-AES wake-up."]
1738 #[inline(always)]
1739 #[must_use]
1740 pub fn sha(&mut self) -> SHA_W<27> {
1741 SHA_W::new(self)
1742 }
1743 #[doc = "Bit 28 - FLEXCOMM 8 peripheral interrupt wake-up."]
1744 #[inline(always)]
1745 #[must_use]
1746 pub fn flexcomm8(&mut self) -> FLEXCOMM8_W<28> {
1747 FLEXCOMM8_W::new(self)
1748 }
1749 #[doc = "Bit 29 - FLEXCOMM 9 peripheral interrupt wake-up."]
1750 #[inline(always)]
1751 #[must_use]
1752 pub fn flexcomm9(&mut self) -> FLEXCOMM9_W<29> {
1753 FLEXCOMM9_W::new(self)
1754 }
1755 #[doc = "Bit 30 - FLEXCOMM 10 peripheral interrupt wake-up."]
1756 #[inline(always)]
1757 #[must_use]
1758 pub fn flexcomm10(&mut self) -> FLEXCOMM10_W<30> {
1759 FLEXCOMM10_W::new(self)
1760 }
1761 #[doc = "Bit 31 - FLEXCOMM 11 peripheral interrupt wake-up."]
1762 #[inline(always)]
1763 #[must_use]
1764 pub fn flexcomm11(&mut self) -> FLEXCOMM11_W<31> {
1765 FLEXCOMM11_W::new(self)
1766 }
1767 #[doc = "Writes raw bits to the register."]
1768 #[inline(always)]
1769 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1770 self.0.bits(bits);
1771 self
1772 }
1773}
1774#[doc = "Start Enable 1 clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [starten1_clr](index.html) module"]
1775pub struct STARTEN1_CLR_SPEC;
1776impl crate::RegisterSpec for STARTEN1_CLR_SPEC {
1777 type Ux = u32;
1778}
1779#[doc = "`read()` method returns [starten1_clr::R](R) reader structure"]
1780impl crate::Readable for STARTEN1_CLR_SPEC {
1781 type Reader = R;
1782}
1783#[doc = "`write(|w| ..)` method takes [starten1_clr::W](W) writer structure"]
1784impl crate::Writable for STARTEN1_CLR_SPEC {
1785 type Writer = W;
1786 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
1787 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0x0fe9_fffd;
1788}
1789#[doc = "`reset()` method sets STARTEN1_CLR to value 0"]
1790impl crate::Resettable for STARTEN1_CLR_SPEC {
1791 const RESET_VALUE: Self::Ux = 0;
1792}