1#[doc = "Register `INTEN` reader"]
2pub struct R(crate::R<INTEN_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<INTEN_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<INTEN_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<INTEN_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `INTEN` writer"]
17pub struct W(crate::W<INTEN_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<INTEN_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<INTEN_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<INTEN_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `IPCMDDONEEN` reader - IP triggered Command Sequences Execution finished interrupt enable."]
38pub type IPCMDDONEEN_R = crate::BitReader<IPCMDDONEEN_A>;
39#[doc = "IP triggered Command Sequences Execution finished interrupt enable.\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum IPCMDDONEEN_A {
42 #[doc = "0: Disable interrupt or no impact"]
43 VALUE0 = 0,
44 #[doc = "1: Enable interrupt"]
45 VALUE1 = 1,
46}
47impl From<IPCMDDONEEN_A> for bool {
48 #[inline(always)]
49 fn from(variant: IPCMDDONEEN_A) -> Self {
50 variant as u8 != 0
51 }
52}
53impl IPCMDDONEEN_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> IPCMDDONEEN_A {
57 match self.bits {
58 false => IPCMDDONEEN_A::VALUE0,
59 true => IPCMDDONEEN_A::VALUE1,
60 }
61 }
62 #[doc = "Checks if the value of the field is `VALUE0`"]
63 #[inline(always)]
64 pub fn is_value0(&self) -> bool {
65 *self == IPCMDDONEEN_A::VALUE0
66 }
67 #[doc = "Checks if the value of the field is `VALUE1`"]
68 #[inline(always)]
69 pub fn is_value1(&self) -> bool {
70 *self == IPCMDDONEEN_A::VALUE1
71 }
72}
73#[doc = "Field `IPCMDDONEEN` writer - IP triggered Command Sequences Execution finished interrupt enable."]
74pub type IPCMDDONEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, IPCMDDONEEN_A, O>;
75impl<'a, const O: u8> IPCMDDONEEN_W<'a, O> {
76 #[doc = "Disable interrupt or no impact"]
77 #[inline(always)]
78 pub fn value0(self) -> &'a mut W {
79 self.variant(IPCMDDONEEN_A::VALUE0)
80 }
81 #[doc = "Enable interrupt"]
82 #[inline(always)]
83 pub fn value1(self) -> &'a mut W {
84 self.variant(IPCMDDONEEN_A::VALUE1)
85 }
86}
87#[doc = "Field `IPCMDGEEN` reader - IP triggered Command Sequences Grant Timeout interrupt enable."]
88pub type IPCMDGEEN_R = crate::BitReader<IPCMDGEEN_A>;
89#[doc = "IP triggered Command Sequences Grant Timeout interrupt enable.\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum IPCMDGEEN_A {
92 #[doc = "0: Disable interrupt or no impact"]
93 VALUE0 = 0,
94 #[doc = "1: Enable interrupt"]
95 VALUE1 = 1,
96}
97impl From<IPCMDGEEN_A> for bool {
98 #[inline(always)]
99 fn from(variant: IPCMDGEEN_A) -> Self {
100 variant as u8 != 0
101 }
102}
103impl IPCMDGEEN_R {
104 #[doc = "Get enumerated values variant"]
105 #[inline(always)]
106 pub fn variant(&self) -> IPCMDGEEN_A {
107 match self.bits {
108 false => IPCMDGEEN_A::VALUE0,
109 true => IPCMDGEEN_A::VALUE1,
110 }
111 }
112 #[doc = "Checks if the value of the field is `VALUE0`"]
113 #[inline(always)]
114 pub fn is_value0(&self) -> bool {
115 *self == IPCMDGEEN_A::VALUE0
116 }
117 #[doc = "Checks if the value of the field is `VALUE1`"]
118 #[inline(always)]
119 pub fn is_value1(&self) -> bool {
120 *self == IPCMDGEEN_A::VALUE1
121 }
122}
123#[doc = "Field `IPCMDGEEN` writer - IP triggered Command Sequences Grant Timeout interrupt enable."]
124pub type IPCMDGEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, IPCMDGEEN_A, O>;
125impl<'a, const O: u8> IPCMDGEEN_W<'a, O> {
126 #[doc = "Disable interrupt or no impact"]
127 #[inline(always)]
128 pub fn value0(self) -> &'a mut W {
129 self.variant(IPCMDGEEN_A::VALUE0)
130 }
131 #[doc = "Enable interrupt"]
132 #[inline(always)]
133 pub fn value1(self) -> &'a mut W {
134 self.variant(IPCMDGEEN_A::VALUE1)
135 }
136}
137#[doc = "Field `AHBCMDGEEN` reader - AHB triggered Command Sequences Grant Timeout interrupt enable."]
138pub type AHBCMDGEEN_R = crate::BitReader<AHBCMDGEEN_A>;
139#[doc = "AHB triggered Command Sequences Grant Timeout interrupt enable.\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum AHBCMDGEEN_A {
142 #[doc = "0: Disable interrupt or no impact"]
143 VALUE0 = 0,
144 #[doc = "1: Enable interrupt"]
145 VALUE1 = 1,
146}
147impl From<AHBCMDGEEN_A> for bool {
148 #[inline(always)]
149 fn from(variant: AHBCMDGEEN_A) -> Self {
150 variant as u8 != 0
151 }
152}
153impl AHBCMDGEEN_R {
154 #[doc = "Get enumerated values variant"]
155 #[inline(always)]
156 pub fn variant(&self) -> AHBCMDGEEN_A {
157 match self.bits {
158 false => AHBCMDGEEN_A::VALUE0,
159 true => AHBCMDGEEN_A::VALUE1,
160 }
161 }
162 #[doc = "Checks if the value of the field is `VALUE0`"]
163 #[inline(always)]
164 pub fn is_value0(&self) -> bool {
165 *self == AHBCMDGEEN_A::VALUE0
166 }
167 #[doc = "Checks if the value of the field is `VALUE1`"]
168 #[inline(always)]
169 pub fn is_value1(&self) -> bool {
170 *self == AHBCMDGEEN_A::VALUE1
171 }
172}
173#[doc = "Field `AHBCMDGEEN` writer - AHB triggered Command Sequences Grant Timeout interrupt enable."]
174pub type AHBCMDGEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, AHBCMDGEEN_A, O>;
175impl<'a, const O: u8> AHBCMDGEEN_W<'a, O> {
176 #[doc = "Disable interrupt or no impact"]
177 #[inline(always)]
178 pub fn value0(self) -> &'a mut W {
179 self.variant(AHBCMDGEEN_A::VALUE0)
180 }
181 #[doc = "Enable interrupt"]
182 #[inline(always)]
183 pub fn value1(self) -> &'a mut W {
184 self.variant(AHBCMDGEEN_A::VALUE1)
185 }
186}
187#[doc = "Field `IPCMDERREN` reader - IP triggered Command Sequences Error Detected interrupt enable."]
188pub type IPCMDERREN_R = crate::BitReader<IPCMDERREN_A>;
189#[doc = "IP triggered Command Sequences Error Detected interrupt enable.\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum IPCMDERREN_A {
192 #[doc = "0: Disable interrupt or no impact"]
193 VALUE0 = 0,
194 #[doc = "1: Enable interrupt"]
195 VALUE1 = 1,
196}
197impl From<IPCMDERREN_A> for bool {
198 #[inline(always)]
199 fn from(variant: IPCMDERREN_A) -> Self {
200 variant as u8 != 0
201 }
202}
203impl IPCMDERREN_R {
204 #[doc = "Get enumerated values variant"]
205 #[inline(always)]
206 pub fn variant(&self) -> IPCMDERREN_A {
207 match self.bits {
208 false => IPCMDERREN_A::VALUE0,
209 true => IPCMDERREN_A::VALUE1,
210 }
211 }
212 #[doc = "Checks if the value of the field is `VALUE0`"]
213 #[inline(always)]
214 pub fn is_value0(&self) -> bool {
215 *self == IPCMDERREN_A::VALUE0
216 }
217 #[doc = "Checks if the value of the field is `VALUE1`"]
218 #[inline(always)]
219 pub fn is_value1(&self) -> bool {
220 *self == IPCMDERREN_A::VALUE1
221 }
222}
223#[doc = "Field `IPCMDERREN` writer - IP triggered Command Sequences Error Detected interrupt enable."]
224pub type IPCMDERREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, IPCMDERREN_A, O>;
225impl<'a, const O: u8> IPCMDERREN_W<'a, O> {
226 #[doc = "Disable interrupt or no impact"]
227 #[inline(always)]
228 pub fn value0(self) -> &'a mut W {
229 self.variant(IPCMDERREN_A::VALUE0)
230 }
231 #[doc = "Enable interrupt"]
232 #[inline(always)]
233 pub fn value1(self) -> &'a mut W {
234 self.variant(IPCMDERREN_A::VALUE1)
235 }
236}
237#[doc = "Field `AHBCMDERREN` reader - AHB triggered Command Sequences Error Detected interrupt enable."]
238pub type AHBCMDERREN_R = crate::BitReader<AHBCMDERREN_A>;
239#[doc = "AHB triggered Command Sequences Error Detected interrupt enable.\n\nValue on reset: 0"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum AHBCMDERREN_A {
242 #[doc = "0: Disable interrupt or no impact"]
243 VALUE0 = 0,
244 #[doc = "1: Enable interrupt"]
245 VALUE1 = 1,
246}
247impl From<AHBCMDERREN_A> for bool {
248 #[inline(always)]
249 fn from(variant: AHBCMDERREN_A) -> Self {
250 variant as u8 != 0
251 }
252}
253impl AHBCMDERREN_R {
254 #[doc = "Get enumerated values variant"]
255 #[inline(always)]
256 pub fn variant(&self) -> AHBCMDERREN_A {
257 match self.bits {
258 false => AHBCMDERREN_A::VALUE0,
259 true => AHBCMDERREN_A::VALUE1,
260 }
261 }
262 #[doc = "Checks if the value of the field is `VALUE0`"]
263 #[inline(always)]
264 pub fn is_value0(&self) -> bool {
265 *self == AHBCMDERREN_A::VALUE0
266 }
267 #[doc = "Checks if the value of the field is `VALUE1`"]
268 #[inline(always)]
269 pub fn is_value1(&self) -> bool {
270 *self == AHBCMDERREN_A::VALUE1
271 }
272}
273#[doc = "Field `AHBCMDERREN` writer - AHB triggered Command Sequences Error Detected interrupt enable."]
274pub type AHBCMDERREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, AHBCMDERREN_A, O>;
275impl<'a, const O: u8> AHBCMDERREN_W<'a, O> {
276 #[doc = "Disable interrupt or no impact"]
277 #[inline(always)]
278 pub fn value0(self) -> &'a mut W {
279 self.variant(AHBCMDERREN_A::VALUE0)
280 }
281 #[doc = "Enable interrupt"]
282 #[inline(always)]
283 pub fn value1(self) -> &'a mut W {
284 self.variant(AHBCMDERREN_A::VALUE1)
285 }
286}
287#[doc = "Field `IPRXWAEN` reader - IP RX FIFO WaterMark available interrupt enable."]
288pub type IPRXWAEN_R = crate::BitReader<IPRXWAEN_A>;
289#[doc = "IP RX FIFO WaterMark available interrupt enable.\n\nValue on reset: 0"]
290#[derive(Clone, Copy, Debug, PartialEq, Eq)]
291pub enum IPRXWAEN_A {
292 #[doc = "0: Disable interrupt or no impact"]
293 VALUE0 = 0,
294 #[doc = "1: Enable interrupt"]
295 VALUE1 = 1,
296}
297impl From<IPRXWAEN_A> for bool {
298 #[inline(always)]
299 fn from(variant: IPRXWAEN_A) -> Self {
300 variant as u8 != 0
301 }
302}
303impl IPRXWAEN_R {
304 #[doc = "Get enumerated values variant"]
305 #[inline(always)]
306 pub fn variant(&self) -> IPRXWAEN_A {
307 match self.bits {
308 false => IPRXWAEN_A::VALUE0,
309 true => IPRXWAEN_A::VALUE1,
310 }
311 }
312 #[doc = "Checks if the value of the field is `VALUE0`"]
313 #[inline(always)]
314 pub fn is_value0(&self) -> bool {
315 *self == IPRXWAEN_A::VALUE0
316 }
317 #[doc = "Checks if the value of the field is `VALUE1`"]
318 #[inline(always)]
319 pub fn is_value1(&self) -> bool {
320 *self == IPRXWAEN_A::VALUE1
321 }
322}
323#[doc = "Field `IPRXWAEN` writer - IP RX FIFO WaterMark available interrupt enable."]
324pub type IPRXWAEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, IPRXWAEN_A, O>;
325impl<'a, const O: u8> IPRXWAEN_W<'a, O> {
326 #[doc = "Disable interrupt or no impact"]
327 #[inline(always)]
328 pub fn value0(self) -> &'a mut W {
329 self.variant(IPRXWAEN_A::VALUE0)
330 }
331 #[doc = "Enable interrupt"]
332 #[inline(always)]
333 pub fn value1(self) -> &'a mut W {
334 self.variant(IPRXWAEN_A::VALUE1)
335 }
336}
337#[doc = "Field `IPTXWEEN` reader - IP TX FIFO WaterMark empty interrupt enable."]
338pub type IPTXWEEN_R = crate::BitReader<IPTXWEEN_A>;
339#[doc = "IP TX FIFO WaterMark empty interrupt enable.\n\nValue on reset: 0"]
340#[derive(Clone, Copy, Debug, PartialEq, Eq)]
341pub enum IPTXWEEN_A {
342 #[doc = "0: Disable interrupt or no impact"]
343 VALUE0 = 0,
344 #[doc = "1: Enable interrupt"]
345 VALUE1 = 1,
346}
347impl From<IPTXWEEN_A> for bool {
348 #[inline(always)]
349 fn from(variant: IPTXWEEN_A) -> Self {
350 variant as u8 != 0
351 }
352}
353impl IPTXWEEN_R {
354 #[doc = "Get enumerated values variant"]
355 #[inline(always)]
356 pub fn variant(&self) -> IPTXWEEN_A {
357 match self.bits {
358 false => IPTXWEEN_A::VALUE0,
359 true => IPTXWEEN_A::VALUE1,
360 }
361 }
362 #[doc = "Checks if the value of the field is `VALUE0`"]
363 #[inline(always)]
364 pub fn is_value0(&self) -> bool {
365 *self == IPTXWEEN_A::VALUE0
366 }
367 #[doc = "Checks if the value of the field is `VALUE1`"]
368 #[inline(always)]
369 pub fn is_value1(&self) -> bool {
370 *self == IPTXWEEN_A::VALUE1
371 }
372}
373#[doc = "Field `IPTXWEEN` writer - IP TX FIFO WaterMark empty interrupt enable."]
374pub type IPTXWEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, IPTXWEEN_A, O>;
375impl<'a, const O: u8> IPTXWEEN_W<'a, O> {
376 #[doc = "Disable interrupt or no impact"]
377 #[inline(always)]
378 pub fn value0(self) -> &'a mut W {
379 self.variant(IPTXWEEN_A::VALUE0)
380 }
381 #[doc = "Enable interrupt"]
382 #[inline(always)]
383 pub fn value1(self) -> &'a mut W {
384 self.variant(IPTXWEEN_A::VALUE1)
385 }
386}
387#[doc = "Field `DATALEARNFAILEN` reader - Data Learning failed interrupt enable."]
388pub type DATALEARNFAILEN_R = crate::BitReader<DATALEARNFAILEN_A>;
389#[doc = "Data Learning failed interrupt enable.\n\nValue on reset: 0"]
390#[derive(Clone, Copy, Debug, PartialEq, Eq)]
391pub enum DATALEARNFAILEN_A {
392 #[doc = "0: Disable interrupt or no impact"]
393 VALUE0 = 0,
394 #[doc = "1: Enable interrupt"]
395 VALUE1 = 1,
396}
397impl From<DATALEARNFAILEN_A> for bool {
398 #[inline(always)]
399 fn from(variant: DATALEARNFAILEN_A) -> Self {
400 variant as u8 != 0
401 }
402}
403impl DATALEARNFAILEN_R {
404 #[doc = "Get enumerated values variant"]
405 #[inline(always)]
406 pub fn variant(&self) -> DATALEARNFAILEN_A {
407 match self.bits {
408 false => DATALEARNFAILEN_A::VALUE0,
409 true => DATALEARNFAILEN_A::VALUE1,
410 }
411 }
412 #[doc = "Checks if the value of the field is `VALUE0`"]
413 #[inline(always)]
414 pub fn is_value0(&self) -> bool {
415 *self == DATALEARNFAILEN_A::VALUE0
416 }
417 #[doc = "Checks if the value of the field is `VALUE1`"]
418 #[inline(always)]
419 pub fn is_value1(&self) -> bool {
420 *self == DATALEARNFAILEN_A::VALUE1
421 }
422}
423#[doc = "Field `DATALEARNFAILEN` writer - Data Learning failed interrupt enable."]
424pub type DATALEARNFAILEN_W<'a, const O: u8> =
425 crate::BitWriter<'a, u32, INTEN_SPEC, DATALEARNFAILEN_A, O>;
426impl<'a, const O: u8> DATALEARNFAILEN_W<'a, O> {
427 #[doc = "Disable interrupt or no impact"]
428 #[inline(always)]
429 pub fn value0(self) -> &'a mut W {
430 self.variant(DATALEARNFAILEN_A::VALUE0)
431 }
432 #[doc = "Enable interrupt"]
433 #[inline(always)]
434 pub fn value1(self) -> &'a mut W {
435 self.variant(DATALEARNFAILEN_A::VALUE1)
436 }
437}
438#[doc = "Field `SCKSTOPBYRDEN` reader - SCLK is stopped during command sequence because Async RX FIFO full interrupt enable."]
439pub type SCKSTOPBYRDEN_R = crate::BitReader<SCKSTOPBYRDEN_A>;
440#[doc = "SCLK is stopped during command sequence because Async RX FIFO full interrupt enable.\n\nValue on reset: 0"]
441#[derive(Clone, Copy, Debug, PartialEq, Eq)]
442pub enum SCKSTOPBYRDEN_A {
443 #[doc = "0: Disable interrupt or no impact"]
444 VALUE0 = 0,
445 #[doc = "1: Enable interrupt"]
446 VALUE1 = 1,
447}
448impl From<SCKSTOPBYRDEN_A> for bool {
449 #[inline(always)]
450 fn from(variant: SCKSTOPBYRDEN_A) -> Self {
451 variant as u8 != 0
452 }
453}
454impl SCKSTOPBYRDEN_R {
455 #[doc = "Get enumerated values variant"]
456 #[inline(always)]
457 pub fn variant(&self) -> SCKSTOPBYRDEN_A {
458 match self.bits {
459 false => SCKSTOPBYRDEN_A::VALUE0,
460 true => SCKSTOPBYRDEN_A::VALUE1,
461 }
462 }
463 #[doc = "Checks if the value of the field is `VALUE0`"]
464 #[inline(always)]
465 pub fn is_value0(&self) -> bool {
466 *self == SCKSTOPBYRDEN_A::VALUE0
467 }
468 #[doc = "Checks if the value of the field is `VALUE1`"]
469 #[inline(always)]
470 pub fn is_value1(&self) -> bool {
471 *self == SCKSTOPBYRDEN_A::VALUE1
472 }
473}
474#[doc = "Field `SCKSTOPBYRDEN` writer - SCLK is stopped during command sequence because Async RX FIFO full interrupt enable."]
475pub type SCKSTOPBYRDEN_W<'a, const O: u8> =
476 crate::BitWriter<'a, u32, INTEN_SPEC, SCKSTOPBYRDEN_A, O>;
477impl<'a, const O: u8> SCKSTOPBYRDEN_W<'a, O> {
478 #[doc = "Disable interrupt or no impact"]
479 #[inline(always)]
480 pub fn value0(self) -> &'a mut W {
481 self.variant(SCKSTOPBYRDEN_A::VALUE0)
482 }
483 #[doc = "Enable interrupt"]
484 #[inline(always)]
485 pub fn value1(self) -> &'a mut W {
486 self.variant(SCKSTOPBYRDEN_A::VALUE1)
487 }
488}
489#[doc = "Field `SCKSTOPBYWREN` reader - SCLK is stopped during command sequence because Async TX FIFO empty interrupt enable."]
490pub type SCKSTOPBYWREN_R = crate::BitReader<SCKSTOPBYWREN_A>;
491#[doc = "SCLK is stopped during command sequence because Async TX FIFO empty interrupt enable.\n\nValue on reset: 0"]
492#[derive(Clone, Copy, Debug, PartialEq, Eq)]
493pub enum SCKSTOPBYWREN_A {
494 #[doc = "0: Disable interrupt or no impact"]
495 VALUE0 = 0,
496 #[doc = "1: Enable interrupt"]
497 VALUE1 = 1,
498}
499impl From<SCKSTOPBYWREN_A> for bool {
500 #[inline(always)]
501 fn from(variant: SCKSTOPBYWREN_A) -> Self {
502 variant as u8 != 0
503 }
504}
505impl SCKSTOPBYWREN_R {
506 #[doc = "Get enumerated values variant"]
507 #[inline(always)]
508 pub fn variant(&self) -> SCKSTOPBYWREN_A {
509 match self.bits {
510 false => SCKSTOPBYWREN_A::VALUE0,
511 true => SCKSTOPBYWREN_A::VALUE1,
512 }
513 }
514 #[doc = "Checks if the value of the field is `VALUE0`"]
515 #[inline(always)]
516 pub fn is_value0(&self) -> bool {
517 *self == SCKSTOPBYWREN_A::VALUE0
518 }
519 #[doc = "Checks if the value of the field is `VALUE1`"]
520 #[inline(always)]
521 pub fn is_value1(&self) -> bool {
522 *self == SCKSTOPBYWREN_A::VALUE1
523 }
524}
525#[doc = "Field `SCKSTOPBYWREN` writer - SCLK is stopped during command sequence because Async TX FIFO empty interrupt enable."]
526pub type SCKSTOPBYWREN_W<'a, const O: u8> =
527 crate::BitWriter<'a, u32, INTEN_SPEC, SCKSTOPBYWREN_A, O>;
528impl<'a, const O: u8> SCKSTOPBYWREN_W<'a, O> {
529 #[doc = "Disable interrupt or no impact"]
530 #[inline(always)]
531 pub fn value0(self) -> &'a mut W {
532 self.variant(SCKSTOPBYWREN_A::VALUE0)
533 }
534 #[doc = "Enable interrupt"]
535 #[inline(always)]
536 pub fn value1(self) -> &'a mut W {
537 self.variant(SCKSTOPBYWREN_A::VALUE1)
538 }
539}
540#[doc = "Field `AHBBUSTIMEOUTEN` reader - AHB Bus timeout interrupt."]
541pub type AHBBUSTIMEOUTEN_R = crate::BitReader<AHBBUSTIMEOUTEN_A>;
542#[doc = "AHB Bus timeout interrupt.\n\nValue on reset: 0"]
543#[derive(Clone, Copy, Debug, PartialEq, Eq)]
544pub enum AHBBUSTIMEOUTEN_A {
545 #[doc = "0: Disable interrupt or no impact"]
546 VALUE0 = 0,
547 #[doc = "1: Enable interrupt"]
548 VALUE1 = 1,
549}
550impl From<AHBBUSTIMEOUTEN_A> for bool {
551 #[inline(always)]
552 fn from(variant: AHBBUSTIMEOUTEN_A) -> Self {
553 variant as u8 != 0
554 }
555}
556impl AHBBUSTIMEOUTEN_R {
557 #[doc = "Get enumerated values variant"]
558 #[inline(always)]
559 pub fn variant(&self) -> AHBBUSTIMEOUTEN_A {
560 match self.bits {
561 false => AHBBUSTIMEOUTEN_A::VALUE0,
562 true => AHBBUSTIMEOUTEN_A::VALUE1,
563 }
564 }
565 #[doc = "Checks if the value of the field is `VALUE0`"]
566 #[inline(always)]
567 pub fn is_value0(&self) -> bool {
568 *self == AHBBUSTIMEOUTEN_A::VALUE0
569 }
570 #[doc = "Checks if the value of the field is `VALUE1`"]
571 #[inline(always)]
572 pub fn is_value1(&self) -> bool {
573 *self == AHBBUSTIMEOUTEN_A::VALUE1
574 }
575}
576#[doc = "Field `AHBBUSTIMEOUTEN` writer - AHB Bus timeout interrupt."]
577pub type AHBBUSTIMEOUTEN_W<'a, const O: u8> =
578 crate::BitWriter<'a, u32, INTEN_SPEC, AHBBUSTIMEOUTEN_A, O>;
579impl<'a, const O: u8> AHBBUSTIMEOUTEN_W<'a, O> {
580 #[doc = "Disable interrupt or no impact"]
581 #[inline(always)]
582 pub fn value0(self) -> &'a mut W {
583 self.variant(AHBBUSTIMEOUTEN_A::VALUE0)
584 }
585 #[doc = "Enable interrupt"]
586 #[inline(always)]
587 pub fn value1(self) -> &'a mut W {
588 self.variant(AHBBUSTIMEOUTEN_A::VALUE1)
589 }
590}
591#[doc = "Field `SEQTIMEOUTEN` reader - Sequence execution timeout interrupt enable."]
592pub type SEQTIMEOUTEN_R = crate::BitReader<SEQTIMEOUTEN_A>;
593#[doc = "Sequence execution timeout interrupt enable.\n\nValue on reset: 0"]
594#[derive(Clone, Copy, Debug, PartialEq, Eq)]
595pub enum SEQTIMEOUTEN_A {
596 #[doc = "0: Disable interrupt or no impact"]
597 VALUE0 = 0,
598 #[doc = "1: Enable interrupt"]
599 VALUE1 = 1,
600}
601impl From<SEQTIMEOUTEN_A> for bool {
602 #[inline(always)]
603 fn from(variant: SEQTIMEOUTEN_A) -> Self {
604 variant as u8 != 0
605 }
606}
607impl SEQTIMEOUTEN_R {
608 #[doc = "Get enumerated values variant"]
609 #[inline(always)]
610 pub fn variant(&self) -> SEQTIMEOUTEN_A {
611 match self.bits {
612 false => SEQTIMEOUTEN_A::VALUE0,
613 true => SEQTIMEOUTEN_A::VALUE1,
614 }
615 }
616 #[doc = "Checks if the value of the field is `VALUE0`"]
617 #[inline(always)]
618 pub fn is_value0(&self) -> bool {
619 *self == SEQTIMEOUTEN_A::VALUE0
620 }
621 #[doc = "Checks if the value of the field is `VALUE1`"]
622 #[inline(always)]
623 pub fn is_value1(&self) -> bool {
624 *self == SEQTIMEOUTEN_A::VALUE1
625 }
626}
627#[doc = "Field `SEQTIMEOUTEN` writer - Sequence execution timeout interrupt enable."]
628pub type SEQTIMEOUTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, SEQTIMEOUTEN_A, O>;
629impl<'a, const O: u8> SEQTIMEOUTEN_W<'a, O> {
630 #[doc = "Disable interrupt or no impact"]
631 #[inline(always)]
632 pub fn value0(self) -> &'a mut W {
633 self.variant(SEQTIMEOUTEN_A::VALUE0)
634 }
635 #[doc = "Enable interrupt"]
636 #[inline(always)]
637 pub fn value1(self) -> &'a mut W {
638 self.variant(SEQTIMEOUTEN_A::VALUE1)
639 }
640}
641impl R {
642 #[doc = "Bit 0 - IP triggered Command Sequences Execution finished interrupt enable."]
643 #[inline(always)]
644 pub fn ipcmddoneen(&self) -> IPCMDDONEEN_R {
645 IPCMDDONEEN_R::new((self.bits & 1) != 0)
646 }
647 #[doc = "Bit 1 - IP triggered Command Sequences Grant Timeout interrupt enable."]
648 #[inline(always)]
649 pub fn ipcmdgeen(&self) -> IPCMDGEEN_R {
650 IPCMDGEEN_R::new(((self.bits >> 1) & 1) != 0)
651 }
652 #[doc = "Bit 2 - AHB triggered Command Sequences Grant Timeout interrupt enable."]
653 #[inline(always)]
654 pub fn ahbcmdgeen(&self) -> AHBCMDGEEN_R {
655 AHBCMDGEEN_R::new(((self.bits >> 2) & 1) != 0)
656 }
657 #[doc = "Bit 3 - IP triggered Command Sequences Error Detected interrupt enable."]
658 #[inline(always)]
659 pub fn ipcmderren(&self) -> IPCMDERREN_R {
660 IPCMDERREN_R::new(((self.bits >> 3) & 1) != 0)
661 }
662 #[doc = "Bit 4 - AHB triggered Command Sequences Error Detected interrupt enable."]
663 #[inline(always)]
664 pub fn ahbcmderren(&self) -> AHBCMDERREN_R {
665 AHBCMDERREN_R::new(((self.bits >> 4) & 1) != 0)
666 }
667 #[doc = "Bit 5 - IP RX FIFO WaterMark available interrupt enable."]
668 #[inline(always)]
669 pub fn iprxwaen(&self) -> IPRXWAEN_R {
670 IPRXWAEN_R::new(((self.bits >> 5) & 1) != 0)
671 }
672 #[doc = "Bit 6 - IP TX FIFO WaterMark empty interrupt enable."]
673 #[inline(always)]
674 pub fn iptxween(&self) -> IPTXWEEN_R {
675 IPTXWEEN_R::new(((self.bits >> 6) & 1) != 0)
676 }
677 #[doc = "Bit 7 - Data Learning failed interrupt enable."]
678 #[inline(always)]
679 pub fn datalearnfailen(&self) -> DATALEARNFAILEN_R {
680 DATALEARNFAILEN_R::new(((self.bits >> 7) & 1) != 0)
681 }
682 #[doc = "Bit 8 - SCLK is stopped during command sequence because Async RX FIFO full interrupt enable."]
683 #[inline(always)]
684 pub fn sckstopbyrden(&self) -> SCKSTOPBYRDEN_R {
685 SCKSTOPBYRDEN_R::new(((self.bits >> 8) & 1) != 0)
686 }
687 #[doc = "Bit 9 - SCLK is stopped during command sequence because Async TX FIFO empty interrupt enable."]
688 #[inline(always)]
689 pub fn sckstopbywren(&self) -> SCKSTOPBYWREN_R {
690 SCKSTOPBYWREN_R::new(((self.bits >> 9) & 1) != 0)
691 }
692 #[doc = "Bit 10 - AHB Bus timeout interrupt."]
693 #[inline(always)]
694 pub fn ahbbustimeouten(&self) -> AHBBUSTIMEOUTEN_R {
695 AHBBUSTIMEOUTEN_R::new(((self.bits >> 10) & 1) != 0)
696 }
697 #[doc = "Bit 11 - Sequence execution timeout interrupt enable."]
698 #[inline(always)]
699 pub fn seqtimeouten(&self) -> SEQTIMEOUTEN_R {
700 SEQTIMEOUTEN_R::new(((self.bits >> 11) & 1) != 0)
701 }
702}
703impl W {
704 #[doc = "Bit 0 - IP triggered Command Sequences Execution finished interrupt enable."]
705 #[inline(always)]
706 #[must_use]
707 pub fn ipcmddoneen(&mut self) -> IPCMDDONEEN_W<0> {
708 IPCMDDONEEN_W::new(self)
709 }
710 #[doc = "Bit 1 - IP triggered Command Sequences Grant Timeout interrupt enable."]
711 #[inline(always)]
712 #[must_use]
713 pub fn ipcmdgeen(&mut self) -> IPCMDGEEN_W<1> {
714 IPCMDGEEN_W::new(self)
715 }
716 #[doc = "Bit 2 - AHB triggered Command Sequences Grant Timeout interrupt enable."]
717 #[inline(always)]
718 #[must_use]
719 pub fn ahbcmdgeen(&mut self) -> AHBCMDGEEN_W<2> {
720 AHBCMDGEEN_W::new(self)
721 }
722 #[doc = "Bit 3 - IP triggered Command Sequences Error Detected interrupt enable."]
723 #[inline(always)]
724 #[must_use]
725 pub fn ipcmderren(&mut self) -> IPCMDERREN_W<3> {
726 IPCMDERREN_W::new(self)
727 }
728 #[doc = "Bit 4 - AHB triggered Command Sequences Error Detected interrupt enable."]
729 #[inline(always)]
730 #[must_use]
731 pub fn ahbcmderren(&mut self) -> AHBCMDERREN_W<4> {
732 AHBCMDERREN_W::new(self)
733 }
734 #[doc = "Bit 5 - IP RX FIFO WaterMark available interrupt enable."]
735 #[inline(always)]
736 #[must_use]
737 pub fn iprxwaen(&mut self) -> IPRXWAEN_W<5> {
738 IPRXWAEN_W::new(self)
739 }
740 #[doc = "Bit 6 - IP TX FIFO WaterMark empty interrupt enable."]
741 #[inline(always)]
742 #[must_use]
743 pub fn iptxween(&mut self) -> IPTXWEEN_W<6> {
744 IPTXWEEN_W::new(self)
745 }
746 #[doc = "Bit 7 - Data Learning failed interrupt enable."]
747 #[inline(always)]
748 #[must_use]
749 pub fn datalearnfailen(&mut self) -> DATALEARNFAILEN_W<7> {
750 DATALEARNFAILEN_W::new(self)
751 }
752 #[doc = "Bit 8 - SCLK is stopped during command sequence because Async RX FIFO full interrupt enable."]
753 #[inline(always)]
754 #[must_use]
755 pub fn sckstopbyrden(&mut self) -> SCKSTOPBYRDEN_W<8> {
756 SCKSTOPBYRDEN_W::new(self)
757 }
758 #[doc = "Bit 9 - SCLK is stopped during command sequence because Async TX FIFO empty interrupt enable."]
759 #[inline(always)]
760 #[must_use]
761 pub fn sckstopbywren(&mut self) -> SCKSTOPBYWREN_W<9> {
762 SCKSTOPBYWREN_W::new(self)
763 }
764 #[doc = "Bit 10 - AHB Bus timeout interrupt."]
765 #[inline(always)]
766 #[must_use]
767 pub fn ahbbustimeouten(&mut self) -> AHBBUSTIMEOUTEN_W<10> {
768 AHBBUSTIMEOUTEN_W::new(self)
769 }
770 #[doc = "Bit 11 - Sequence execution timeout interrupt enable."]
771 #[inline(always)]
772 #[must_use]
773 pub fn seqtimeouten(&mut self) -> SEQTIMEOUTEN_W<11> {
774 SEQTIMEOUTEN_W::new(self)
775 }
776 #[doc = "Writes raw bits to the register."]
777 #[inline(always)]
778 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
779 self.0.bits(bits);
780 self
781 }
782}
783#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inten](index.html) module"]
784pub struct INTEN_SPEC;
785impl crate::RegisterSpec for INTEN_SPEC {
786 type Ux = u32;
787}
788#[doc = "`read()` method returns [inten::R](R) reader structure"]
789impl crate::Readable for INTEN_SPEC {
790 type Reader = R;
791}
792#[doc = "`write(|w| ..)` method takes [inten::W](W) writer structure"]
793impl crate::Writable for INTEN_SPEC {
794 type Writer = W;
795 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
796 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
797}
798#[doc = "`reset()` method sets INTEN to value 0"]
799impl crate::Resettable for INTEN_SPEC {
800 const RESET_VALUE: Self::Ux = 0;
801}