use alloc::{collections::BTreeMap, vec::Vec};
use miden_air::trace::{Challenges, MainTrace, RowIndex, chiplets::ace::ACE_CHIPLET_NUM_COLS};
use miden_core::{Felt, ZERO, field::ExtensionField};
use crate::trace::TraceFragment;
mod trace;
pub use trace::{CircuitEvaluation, NUM_ACE_LOGUP_FRACTIONS_EVAL, NUM_ACE_LOGUP_FRACTIONS_READ};
mod instruction;
#[cfg(test)]
mod tests;
pub const PTR_OFFSET_ELEM: Felt = Felt::ONE;
pub const PTR_OFFSET_WORD: Felt = Felt::new(4);
pub const MAX_NUM_ACE_WIRES: u32 = instruction::MAX_ID;
#[derive(Debug, Default)]
pub struct Ace {
circuit_evaluations: BTreeMap<RowIndex, CircuitEvaluation>,
}
impl Ace {
pub(crate) fn trace_len(&self) -> usize {
self.circuit_evaluations.values().map(|eval_ctx| eval_ctx.num_rows()).sum()
}
pub(crate) fn fill_trace(self, trace: &mut TraceFragment) -> Vec<EvaluatedCircuitsMetadata> {
debug_assert_eq!(self.trace_len(), trace.len(), "inconsistent trace lengths");
debug_assert_eq!(ACE_CHIPLET_NUM_COLS, trace.width(), "inconsistent trace widths");
let mut gen_trace: [Vec<Felt>; ACE_CHIPLET_NUM_COLS] = (0..ACE_CHIPLET_NUM_COLS)
.map(|_| vec![ZERO; self.trace_len()])
.collect::<Vec<_>>()
.try_into()
.expect("failed to convert vector to array");
let mut sections_info = Vec::with_capacity(self.circuit_evaluations.keys().count());
let mut offset = 0;
for eval_ctx in self.circuit_evaluations.into_values() {
eval_ctx.fill(offset, &mut gen_trace);
offset += eval_ctx.num_rows();
let section = EvaluatedCircuitsMetadata::from_evaluation_context(&eval_ctx);
sections_info.push(section);
}
for (out_column, column) in trace.columns().zip(gen_trace) {
out_column.copy_from_slice(&column);
}
sections_info
}
pub(crate) fn add_circuit_evaluation(
&mut self,
clk: RowIndex,
circuit_eval: CircuitEvaluation,
) {
self.circuit_evaluations.insert(clk, circuit_eval);
}
}
#[derive(Debug, Default, Clone)]
pub struct EvaluatedCircuitsMetadata {
ctx: u32,
clk: u32,
num_vars: u32,
num_evals: u32,
}
impl EvaluatedCircuitsMetadata {
pub fn clk(&self) -> u32 {
self.clk
}
pub fn ctx(&self) -> u32 {
self.ctx
}
pub fn num_vars(&self) -> u32 {
self.num_vars
}
pub fn num_evals(&self) -> u32 {
self.num_evals
}
fn from_evaluation_context(eval_ctx: &CircuitEvaluation) -> EvaluatedCircuitsMetadata {
EvaluatedCircuitsMetadata {
ctx: eval_ctx.ctx(),
clk: eval_ctx.clk(),
num_vars: eval_ctx.num_read_rows(),
num_evals: eval_ctx.num_eval_rows(),
}
}
}
#[derive(Clone, Debug, Default)]
pub struct AceHints {
offset_chiplet_trace: usize,
pub sections: Vec<EvaluatedCircuitsMetadata>,
}
impl AceHints {
pub fn new(offset_chiplet_trace: usize, sections: Vec<EvaluatedCircuitsMetadata>) -> Self {
Self { offset_chiplet_trace, sections }
}
pub(crate) fn offset(&self) -> usize {
self.offset_chiplet_trace
}
#[inline(always)]
fn encode_ace_wire_value<E: ExtensionField<Felt>>(
challenges: &Challenges<E>,
clk: u32,
ctx: u32,
wire: [Felt; 3],
) -> E {
challenges.encode([Felt::from_u32(clk), Felt::from_u32(ctx), wire[0], wire[1], wire[2]])
}
pub(crate) fn build_divisors<E: ExtensionField<Felt>>(
&self,
main_trace: &MainTrace,
challenges: &Challenges<E>,
) -> Vec<E> {
let num_fractions = self.num_fractions();
let mut total_values = vec![E::ZERO; num_fractions];
let mut total_inv_values = vec![E::ZERO; num_fractions];
let mut chiplet_offset = self.offset_chiplet_trace;
let mut values_offset = 0;
let mut acc = E::ONE;
for section in self.sections.iter() {
let clk = section.clk();
let ctx = section.ctx();
let values = &mut total_values[values_offset
..values_offset + NUM_ACE_LOGUP_FRACTIONS_READ * section.num_vars() as usize];
let inv_values = &mut total_inv_values[values_offset
..values_offset + NUM_ACE_LOGUP_FRACTIONS_READ * section.num_vars() as usize];
for (i, (value, inv_value)) in values
.chunks_mut(NUM_ACE_LOGUP_FRACTIONS_READ)
.zip(inv_values.chunks_mut(NUM_ACE_LOGUP_FRACTIONS_READ))
.enumerate()
{
let trace_row = i + chiplet_offset;
let wire_0 = main_trace.chiplet_ace_wire_0(trace_row.into());
let wire_1 = main_trace.chiplet_ace_wire_1(trace_row.into());
let value_0 = Self::encode_ace_wire_value(challenges, clk, ctx, wire_0);
let value_1 = Self::encode_ace_wire_value(challenges, clk, ctx, wire_1);
value[0] = value_0;
value[1] = value_1;
inv_value[0] = acc;
acc *= value_0;
inv_value[1] = acc;
acc *= value_1;
}
chiplet_offset += section.num_vars() as usize;
values_offset += NUM_ACE_LOGUP_FRACTIONS_READ * section.num_vars() as usize;
let values = &mut total_values[values_offset
..values_offset + NUM_ACE_LOGUP_FRACTIONS_EVAL * section.num_evals() as usize];
let inv_values = &mut total_inv_values[values_offset
..values_offset + NUM_ACE_LOGUP_FRACTIONS_EVAL * section.num_evals() as usize];
for (i, (value, inv_value)) in values
.chunks_mut(NUM_ACE_LOGUP_FRACTIONS_EVAL)
.zip(inv_values.chunks_mut(NUM_ACE_LOGUP_FRACTIONS_EVAL))
.enumerate()
{
let trace_row = i + chiplet_offset;
let wire_0 = main_trace.chiplet_ace_wire_0(trace_row.into());
let wire_1 = main_trace.chiplet_ace_wire_1(trace_row.into());
let wire_2 = main_trace.chiplet_ace_wire_2(trace_row.into());
let value_0 = Self::encode_ace_wire_value(challenges, clk, ctx, wire_0);
let value_1 = Self::encode_ace_wire_value(challenges, clk, ctx, wire_1);
let value_2 = Self::encode_ace_wire_value(challenges, clk, ctx, wire_2);
value[0] = value_0;
value[1] = value_1;
value[2] = value_2;
inv_value[0] = acc;
acc *= value_0;
inv_value[1] = acc;
acc *= value_1;
inv_value[2] = acc;
acc *= value_2;
}
chiplet_offset += section.num_evals() as usize;
values_offset += NUM_ACE_LOGUP_FRACTIONS_EVAL * section.num_evals() as usize;
}
acc = acc.inverse();
for i in (0..total_values.len()).rev() {
total_inv_values[i] *= acc;
acc *= total_values[i];
}
total_inv_values
}
fn num_fractions(&self) -> usize {
self.sections
.iter()
.map(|section| {
NUM_ACE_LOGUP_FRACTIONS_READ * (section.num_vars as usize)
+ NUM_ACE_LOGUP_FRACTIONS_EVAL * (section.num_evals as usize)
})
.sum()
}
}