use alloc::collections::BTreeMap;
use miden_air::trace::{RowIndex, chiplets::ace::ACE_CHIPLET_NUM_COLS};
use miden_core::{Felt, field::PrimeCharacteristicRing};
use crate::trace::ChipletTraceFragment;
mod trace;
pub use trace::CircuitEvaluation;
mod instruction;
#[cfg(test)]
mod tests;
pub const PTR_OFFSET_ELEM: Felt = Felt::ONE;
pub const PTR_OFFSET_WORD: Felt = Felt::new_unchecked(4);
pub const MAX_NUM_ACE_WIRES: u32 = instruction::MAX_ID;
#[derive(Debug, Default)]
pub struct Ace {
circuit_evaluations: BTreeMap<RowIndex, CircuitEvaluation>,
}
impl Ace {
pub(crate) fn trace_len(&self) -> usize {
self.circuit_evaluations.values().map(CircuitEvaluation::num_rows).sum()
}
pub(crate) fn fill_trace(self, trace: &mut ChipletTraceFragment) {
debug_assert_eq!(self.trace_len(), trace.len(), "inconsistent trace lengths");
debug_assert_eq!(ACE_CHIPLET_NUM_COLS, trace.width(), "inconsistent trace widths");
let mut gen_trace = Felt::zero_vec(self.trace_len() * ACE_CHIPLET_NUM_COLS);
let mut offset = 0;
for eval_ctx in self.circuit_evaluations.into_values() {
eval_ctx.fill(offset, &mut gen_trace);
offset += eval_ctx.num_rows();
}
trace.copy_rows_from(&gen_trace);
}
pub(crate) fn add_circuit_evaluation(
&mut self,
clk: RowIndex,
circuit_eval: CircuitEvaluation,
) {
self.circuit_evaluations.insert(clk, circuit_eval);
}
}