mcxn947_pac/syscon0/
presetctrl2.rs

1#[doc = "Register `PRESETCTRL2` reader"]
2pub type R = crate::R<PRESETCTRL2_SPEC>;
3#[doc = "Register `PRESETCTRL2` writer"]
4pub type W = crate::W<PRESETCTRL2_SPEC>;
5#[doc = "Field `DMA1_RST` reader - DMA1 reset control"]
6pub type DMA1_RST_R = crate::BitReader<DMA1_RST_A>;
7#[doc = "DMA1 reset control\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum DMA1_RST_A {
10    #[doc = "0: Block is not reset"]
11    RELEASED = 0,
12    #[doc = "1: Block is reset"]
13    ASSERTED = 1,
14}
15impl From<DMA1_RST_A> for bool {
16    #[inline(always)]
17    fn from(variant: DMA1_RST_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl DMA1_RST_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> DMA1_RST_A {
25        match self.bits {
26            false => DMA1_RST_A::RELEASED,
27            true => DMA1_RST_A::ASSERTED,
28        }
29    }
30    #[doc = "Block is not reset"]
31    #[inline(always)]
32    pub fn is_released(&self) -> bool {
33        *self == DMA1_RST_A::RELEASED
34    }
35    #[doc = "Block is reset"]
36    #[inline(always)]
37    pub fn is_asserted(&self) -> bool {
38        *self == DMA1_RST_A::ASSERTED
39    }
40}
41#[doc = "Field `DMA1_RST` writer - DMA1 reset control"]
42pub type DMA1_RST_W<'a, REG> = crate::BitWriter<'a, REG, DMA1_RST_A>;
43impl<'a, REG> DMA1_RST_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Block is not reset"]
48    #[inline(always)]
49    pub fn released(self) -> &'a mut crate::W<REG> {
50        self.variant(DMA1_RST_A::RELEASED)
51    }
52    #[doc = "Block is reset"]
53    #[inline(always)]
54    pub fn asserted(self) -> &'a mut crate::W<REG> {
55        self.variant(DMA1_RST_A::ASSERTED)
56    }
57}
58#[doc = "Field `ENET_RST` reader - Ethernet reset control"]
59pub type ENET_RST_R = crate::BitReader<ENET_RST_A>;
60#[doc = "Ethernet reset control\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum ENET_RST_A {
63    #[doc = "0: Block is not reset"]
64    RELEASED = 0,
65    #[doc = "1: Block is reset"]
66    ASSERTED = 1,
67}
68impl From<ENET_RST_A> for bool {
69    #[inline(always)]
70    fn from(variant: ENET_RST_A) -> Self {
71        variant as u8 != 0
72    }
73}
74impl ENET_RST_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> ENET_RST_A {
78        match self.bits {
79            false => ENET_RST_A::RELEASED,
80            true => ENET_RST_A::ASSERTED,
81        }
82    }
83    #[doc = "Block is not reset"]
84    #[inline(always)]
85    pub fn is_released(&self) -> bool {
86        *self == ENET_RST_A::RELEASED
87    }
88    #[doc = "Block is reset"]
89    #[inline(always)]
90    pub fn is_asserted(&self) -> bool {
91        *self == ENET_RST_A::ASSERTED
92    }
93}
94#[doc = "Field `ENET_RST` writer - Ethernet reset control"]
95pub type ENET_RST_W<'a, REG> = crate::BitWriter<'a, REG, ENET_RST_A>;
96impl<'a, REG> ENET_RST_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "Block is not reset"]
101    #[inline(always)]
102    pub fn released(self) -> &'a mut crate::W<REG> {
103        self.variant(ENET_RST_A::RELEASED)
104    }
105    #[doc = "Block is reset"]
106    #[inline(always)]
107    pub fn asserted(self) -> &'a mut crate::W<REG> {
108        self.variant(ENET_RST_A::ASSERTED)
109    }
110}
111#[doc = "Field `USDHC_RST` reader - uSDHC reset control"]
112pub type USDHC_RST_R = crate::BitReader<USDHC_RST_A>;
113#[doc = "uSDHC reset control\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum USDHC_RST_A {
116    #[doc = "0: Block is not reset"]
117    RELEASED = 0,
118    #[doc = "1: Block is reset"]
119    ASSERTED = 1,
120}
121impl From<USDHC_RST_A> for bool {
122    #[inline(always)]
123    fn from(variant: USDHC_RST_A) -> Self {
124        variant as u8 != 0
125    }
126}
127impl USDHC_RST_R {
128    #[doc = "Get enumerated values variant"]
129    #[inline(always)]
130    pub const fn variant(&self) -> USDHC_RST_A {
131        match self.bits {
132            false => USDHC_RST_A::RELEASED,
133            true => USDHC_RST_A::ASSERTED,
134        }
135    }
136    #[doc = "Block is not reset"]
137    #[inline(always)]
138    pub fn is_released(&self) -> bool {
139        *self == USDHC_RST_A::RELEASED
140    }
141    #[doc = "Block is reset"]
142    #[inline(always)]
143    pub fn is_asserted(&self) -> bool {
144        *self == USDHC_RST_A::ASSERTED
145    }
146}
147#[doc = "Field `USDHC_RST` writer - uSDHC reset control"]
148pub type USDHC_RST_W<'a, REG> = crate::BitWriter<'a, REG, USDHC_RST_A>;
149impl<'a, REG> USDHC_RST_W<'a, REG>
150where
151    REG: crate::Writable + crate::RegisterSpec,
152{
153    #[doc = "Block is not reset"]
154    #[inline(always)]
155    pub fn released(self) -> &'a mut crate::W<REG> {
156        self.variant(USDHC_RST_A::RELEASED)
157    }
158    #[doc = "Block is reset"]
159    #[inline(always)]
160    pub fn asserted(self) -> &'a mut crate::W<REG> {
161        self.variant(USDHC_RST_A::ASSERTED)
162    }
163}
164#[doc = "Field `FLEXIO_RST` reader - FLEXIO reset control"]
165pub type FLEXIO_RST_R = crate::BitReader<FLEXIO_RST_A>;
166#[doc = "FLEXIO reset control\n\nValue on reset: 0"]
167#[derive(Clone, Copy, Debug, PartialEq, Eq)]
168pub enum FLEXIO_RST_A {
169    #[doc = "0: Block is not reset"]
170    RELEASED = 0,
171    #[doc = "1: Block is reset"]
172    ASSERTED = 1,
173}
174impl From<FLEXIO_RST_A> for bool {
175    #[inline(always)]
176    fn from(variant: FLEXIO_RST_A) -> Self {
177        variant as u8 != 0
178    }
179}
180impl FLEXIO_RST_R {
181    #[doc = "Get enumerated values variant"]
182    #[inline(always)]
183    pub const fn variant(&self) -> FLEXIO_RST_A {
184        match self.bits {
185            false => FLEXIO_RST_A::RELEASED,
186            true => FLEXIO_RST_A::ASSERTED,
187        }
188    }
189    #[doc = "Block is not reset"]
190    #[inline(always)]
191    pub fn is_released(&self) -> bool {
192        *self == FLEXIO_RST_A::RELEASED
193    }
194    #[doc = "Block is reset"]
195    #[inline(always)]
196    pub fn is_asserted(&self) -> bool {
197        *self == FLEXIO_RST_A::ASSERTED
198    }
199}
200#[doc = "Field `FLEXIO_RST` writer - FLEXIO reset control"]
201pub type FLEXIO_RST_W<'a, REG> = crate::BitWriter<'a, REG, FLEXIO_RST_A>;
202impl<'a, REG> FLEXIO_RST_W<'a, REG>
203where
204    REG: crate::Writable + crate::RegisterSpec,
205{
206    #[doc = "Block is not reset"]
207    #[inline(always)]
208    pub fn released(self) -> &'a mut crate::W<REG> {
209        self.variant(FLEXIO_RST_A::RELEASED)
210    }
211    #[doc = "Block is reset"]
212    #[inline(always)]
213    pub fn asserted(self) -> &'a mut crate::W<REG> {
214        self.variant(FLEXIO_RST_A::ASSERTED)
215    }
216}
217#[doc = "Field `SAI0_RST` reader - SAI0 reset control"]
218pub type SAI0_RST_R = crate::BitReader<SAI0_RST_A>;
219#[doc = "SAI0 reset control\n\nValue on reset: 0"]
220#[derive(Clone, Copy, Debug, PartialEq, Eq)]
221pub enum SAI0_RST_A {
222    #[doc = "0: Block is not reset"]
223    RELEASED = 0,
224    #[doc = "1: Block is reset"]
225    ASSERTED = 1,
226}
227impl From<SAI0_RST_A> for bool {
228    #[inline(always)]
229    fn from(variant: SAI0_RST_A) -> Self {
230        variant as u8 != 0
231    }
232}
233impl SAI0_RST_R {
234    #[doc = "Get enumerated values variant"]
235    #[inline(always)]
236    pub const fn variant(&self) -> SAI0_RST_A {
237        match self.bits {
238            false => SAI0_RST_A::RELEASED,
239            true => SAI0_RST_A::ASSERTED,
240        }
241    }
242    #[doc = "Block is not reset"]
243    #[inline(always)]
244    pub fn is_released(&self) -> bool {
245        *self == SAI0_RST_A::RELEASED
246    }
247    #[doc = "Block is reset"]
248    #[inline(always)]
249    pub fn is_asserted(&self) -> bool {
250        *self == SAI0_RST_A::ASSERTED
251    }
252}
253#[doc = "Field `SAI0_RST` writer - SAI0 reset control"]
254pub type SAI0_RST_W<'a, REG> = crate::BitWriter<'a, REG, SAI0_RST_A>;
255impl<'a, REG> SAI0_RST_W<'a, REG>
256where
257    REG: crate::Writable + crate::RegisterSpec,
258{
259    #[doc = "Block is not reset"]
260    #[inline(always)]
261    pub fn released(self) -> &'a mut crate::W<REG> {
262        self.variant(SAI0_RST_A::RELEASED)
263    }
264    #[doc = "Block is reset"]
265    #[inline(always)]
266    pub fn asserted(self) -> &'a mut crate::W<REG> {
267        self.variant(SAI0_RST_A::ASSERTED)
268    }
269}
270#[doc = "Field `SAI1_RST` reader - SAI1 reset control"]
271pub type SAI1_RST_R = crate::BitReader<SAI1_RST_A>;
272#[doc = "SAI1 reset control\n\nValue on reset: 0"]
273#[derive(Clone, Copy, Debug, PartialEq, Eq)]
274pub enum SAI1_RST_A {
275    #[doc = "0: Block is not reset"]
276    RELEASED = 0,
277    #[doc = "1: Block is reset"]
278    ASSERTED = 1,
279}
280impl From<SAI1_RST_A> for bool {
281    #[inline(always)]
282    fn from(variant: SAI1_RST_A) -> Self {
283        variant as u8 != 0
284    }
285}
286impl SAI1_RST_R {
287    #[doc = "Get enumerated values variant"]
288    #[inline(always)]
289    pub const fn variant(&self) -> SAI1_RST_A {
290        match self.bits {
291            false => SAI1_RST_A::RELEASED,
292            true => SAI1_RST_A::ASSERTED,
293        }
294    }
295    #[doc = "Block is not reset"]
296    #[inline(always)]
297    pub fn is_released(&self) -> bool {
298        *self == SAI1_RST_A::RELEASED
299    }
300    #[doc = "Block is reset"]
301    #[inline(always)]
302    pub fn is_asserted(&self) -> bool {
303        *self == SAI1_RST_A::ASSERTED
304    }
305}
306#[doc = "Field `SAI1_RST` writer - SAI1 reset control"]
307pub type SAI1_RST_W<'a, REG> = crate::BitWriter<'a, REG, SAI1_RST_A>;
308impl<'a, REG> SAI1_RST_W<'a, REG>
309where
310    REG: crate::Writable + crate::RegisterSpec,
311{
312    #[doc = "Block is not reset"]
313    #[inline(always)]
314    pub fn released(self) -> &'a mut crate::W<REG> {
315        self.variant(SAI1_RST_A::RELEASED)
316    }
317    #[doc = "Block is reset"]
318    #[inline(always)]
319    pub fn asserted(self) -> &'a mut crate::W<REG> {
320        self.variant(SAI1_RST_A::ASSERTED)
321    }
322}
323#[doc = "Field `TRO_RST` reader - TRO reset control"]
324pub type TRO_RST_R = crate::BitReader<TRO_RST_A>;
325#[doc = "TRO reset control\n\nValue on reset: 0"]
326#[derive(Clone, Copy, Debug, PartialEq, Eq)]
327pub enum TRO_RST_A {
328    #[doc = "0: Block is not reset"]
329    RELEASED = 0,
330    #[doc = "1: Block is reset"]
331    ASSERTED = 1,
332}
333impl From<TRO_RST_A> for bool {
334    #[inline(always)]
335    fn from(variant: TRO_RST_A) -> Self {
336        variant as u8 != 0
337    }
338}
339impl TRO_RST_R {
340    #[doc = "Get enumerated values variant"]
341    #[inline(always)]
342    pub const fn variant(&self) -> TRO_RST_A {
343        match self.bits {
344            false => TRO_RST_A::RELEASED,
345            true => TRO_RST_A::ASSERTED,
346        }
347    }
348    #[doc = "Block is not reset"]
349    #[inline(always)]
350    pub fn is_released(&self) -> bool {
351        *self == TRO_RST_A::RELEASED
352    }
353    #[doc = "Block is reset"]
354    #[inline(always)]
355    pub fn is_asserted(&self) -> bool {
356        *self == TRO_RST_A::ASSERTED
357    }
358}
359#[doc = "Field `TRO_RST` writer - TRO reset control"]
360pub type TRO_RST_W<'a, REG> = crate::BitWriter<'a, REG, TRO_RST_A>;
361impl<'a, REG> TRO_RST_W<'a, REG>
362where
363    REG: crate::Writable + crate::RegisterSpec,
364{
365    #[doc = "Block is not reset"]
366    #[inline(always)]
367    pub fn released(self) -> &'a mut crate::W<REG> {
368        self.variant(TRO_RST_A::RELEASED)
369    }
370    #[doc = "Block is reset"]
371    #[inline(always)]
372    pub fn asserted(self) -> &'a mut crate::W<REG> {
373        self.variant(TRO_RST_A::ASSERTED)
374    }
375}
376#[doc = "Field `FREQME_RST` reader - FREQME reset control"]
377pub type FREQME_RST_R = crate::BitReader<FREQME_RST_A>;
378#[doc = "FREQME reset control\n\nValue on reset: 0"]
379#[derive(Clone, Copy, Debug, PartialEq, Eq)]
380pub enum FREQME_RST_A {
381    #[doc = "0: Block is not reset"]
382    RELEASED = 0,
383    #[doc = "1: Block is reset"]
384    ASSERTED = 1,
385}
386impl From<FREQME_RST_A> for bool {
387    #[inline(always)]
388    fn from(variant: FREQME_RST_A) -> Self {
389        variant as u8 != 0
390    }
391}
392impl FREQME_RST_R {
393    #[doc = "Get enumerated values variant"]
394    #[inline(always)]
395    pub const fn variant(&self) -> FREQME_RST_A {
396        match self.bits {
397            false => FREQME_RST_A::RELEASED,
398            true => FREQME_RST_A::ASSERTED,
399        }
400    }
401    #[doc = "Block is not reset"]
402    #[inline(always)]
403    pub fn is_released(&self) -> bool {
404        *self == FREQME_RST_A::RELEASED
405    }
406    #[doc = "Block is reset"]
407    #[inline(always)]
408    pub fn is_asserted(&self) -> bool {
409        *self == FREQME_RST_A::ASSERTED
410    }
411}
412#[doc = "Field `FREQME_RST` writer - FREQME reset control"]
413pub type FREQME_RST_W<'a, REG> = crate::BitWriter<'a, REG, FREQME_RST_A>;
414impl<'a, REG> FREQME_RST_W<'a, REG>
415where
416    REG: crate::Writable + crate::RegisterSpec,
417{
418    #[doc = "Block is not reset"]
419    #[inline(always)]
420    pub fn released(self) -> &'a mut crate::W<REG> {
421        self.variant(FREQME_RST_A::RELEASED)
422    }
423    #[doc = "Block is reset"]
424    #[inline(always)]
425    pub fn asserted(self) -> &'a mut crate::W<REG> {
426        self.variant(FREQME_RST_A::ASSERTED)
427    }
428}
429#[doc = "Field `TRNG_RST` reader - TRNG reset control"]
430pub type TRNG_RST_R = crate::BitReader<TRNG_RST_A>;
431#[doc = "TRNG reset control\n\nValue on reset: 0"]
432#[derive(Clone, Copy, Debug, PartialEq, Eq)]
433pub enum TRNG_RST_A {
434    #[doc = "0: Block is not reset"]
435    RELEASED = 0,
436    #[doc = "1: Block is reset"]
437    ASSERTED = 1,
438}
439impl From<TRNG_RST_A> for bool {
440    #[inline(always)]
441    fn from(variant: TRNG_RST_A) -> Self {
442        variant as u8 != 0
443    }
444}
445impl TRNG_RST_R {
446    #[doc = "Get enumerated values variant"]
447    #[inline(always)]
448    pub const fn variant(&self) -> TRNG_RST_A {
449        match self.bits {
450            false => TRNG_RST_A::RELEASED,
451            true => TRNG_RST_A::ASSERTED,
452        }
453    }
454    #[doc = "Block is not reset"]
455    #[inline(always)]
456    pub fn is_released(&self) -> bool {
457        *self == TRNG_RST_A::RELEASED
458    }
459    #[doc = "Block is reset"]
460    #[inline(always)]
461    pub fn is_asserted(&self) -> bool {
462        *self == TRNG_RST_A::ASSERTED
463    }
464}
465#[doc = "Field `TRNG_RST` writer - TRNG reset control"]
466pub type TRNG_RST_W<'a, REG> = crate::BitWriter<'a, REG, TRNG_RST_A>;
467impl<'a, REG> TRNG_RST_W<'a, REG>
468where
469    REG: crate::Writable + crate::RegisterSpec,
470{
471    #[doc = "Block is not reset"]
472    #[inline(always)]
473    pub fn released(self) -> &'a mut crate::W<REG> {
474        self.variant(TRNG_RST_A::RELEASED)
475    }
476    #[doc = "Block is reset"]
477    #[inline(always)]
478    pub fn asserted(self) -> &'a mut crate::W<REG> {
479        self.variant(TRNG_RST_A::ASSERTED)
480    }
481}
482#[doc = "Field `FLEXCAN0_RST` reader - CAN0 reset control"]
483pub type FLEXCAN0_RST_R = crate::BitReader<FLEXCAN0_RST_A>;
484#[doc = "CAN0 reset control\n\nValue on reset: 0"]
485#[derive(Clone, Copy, Debug, PartialEq, Eq)]
486pub enum FLEXCAN0_RST_A {
487    #[doc = "0: Block is not reset"]
488    RELEASED = 0,
489    #[doc = "1: Block is reset"]
490    ASSERTED = 1,
491}
492impl From<FLEXCAN0_RST_A> for bool {
493    #[inline(always)]
494    fn from(variant: FLEXCAN0_RST_A) -> Self {
495        variant as u8 != 0
496    }
497}
498impl FLEXCAN0_RST_R {
499    #[doc = "Get enumerated values variant"]
500    #[inline(always)]
501    pub const fn variant(&self) -> FLEXCAN0_RST_A {
502        match self.bits {
503            false => FLEXCAN0_RST_A::RELEASED,
504            true => FLEXCAN0_RST_A::ASSERTED,
505        }
506    }
507    #[doc = "Block is not reset"]
508    #[inline(always)]
509    pub fn is_released(&self) -> bool {
510        *self == FLEXCAN0_RST_A::RELEASED
511    }
512    #[doc = "Block is reset"]
513    #[inline(always)]
514    pub fn is_asserted(&self) -> bool {
515        *self == FLEXCAN0_RST_A::ASSERTED
516    }
517}
518#[doc = "Field `FLEXCAN0_RST` writer - CAN0 reset control"]
519pub type FLEXCAN0_RST_W<'a, REG> = crate::BitWriter<'a, REG, FLEXCAN0_RST_A>;
520impl<'a, REG> FLEXCAN0_RST_W<'a, REG>
521where
522    REG: crate::Writable + crate::RegisterSpec,
523{
524    #[doc = "Block is not reset"]
525    #[inline(always)]
526    pub fn released(self) -> &'a mut crate::W<REG> {
527        self.variant(FLEXCAN0_RST_A::RELEASED)
528    }
529    #[doc = "Block is reset"]
530    #[inline(always)]
531    pub fn asserted(self) -> &'a mut crate::W<REG> {
532        self.variant(FLEXCAN0_RST_A::ASSERTED)
533    }
534}
535#[doc = "Field `FLEXCAN1_RST` reader - CAN1 reset control"]
536pub type FLEXCAN1_RST_R = crate::BitReader<FLEXCAN1_RST_A>;
537#[doc = "CAN1 reset control\n\nValue on reset: 0"]
538#[derive(Clone, Copy, Debug, PartialEq, Eq)]
539pub enum FLEXCAN1_RST_A {
540    #[doc = "0: Block is not reset"]
541    RELEASED = 0,
542    #[doc = "1: Block is reset"]
543    ASSERTED = 1,
544}
545impl From<FLEXCAN1_RST_A> for bool {
546    #[inline(always)]
547    fn from(variant: FLEXCAN1_RST_A) -> Self {
548        variant as u8 != 0
549    }
550}
551impl FLEXCAN1_RST_R {
552    #[doc = "Get enumerated values variant"]
553    #[inline(always)]
554    pub const fn variant(&self) -> FLEXCAN1_RST_A {
555        match self.bits {
556            false => FLEXCAN1_RST_A::RELEASED,
557            true => FLEXCAN1_RST_A::ASSERTED,
558        }
559    }
560    #[doc = "Block is not reset"]
561    #[inline(always)]
562    pub fn is_released(&self) -> bool {
563        *self == FLEXCAN1_RST_A::RELEASED
564    }
565    #[doc = "Block is reset"]
566    #[inline(always)]
567    pub fn is_asserted(&self) -> bool {
568        *self == FLEXCAN1_RST_A::ASSERTED
569    }
570}
571#[doc = "Field `FLEXCAN1_RST` writer - CAN1 reset control"]
572pub type FLEXCAN1_RST_W<'a, REG> = crate::BitWriter<'a, REG, FLEXCAN1_RST_A>;
573impl<'a, REG> FLEXCAN1_RST_W<'a, REG>
574where
575    REG: crate::Writable + crate::RegisterSpec,
576{
577    #[doc = "Block is not reset"]
578    #[inline(always)]
579    pub fn released(self) -> &'a mut crate::W<REG> {
580        self.variant(FLEXCAN1_RST_A::RELEASED)
581    }
582    #[doc = "Block is reset"]
583    #[inline(always)]
584    pub fn asserted(self) -> &'a mut crate::W<REG> {
585        self.variant(FLEXCAN1_RST_A::ASSERTED)
586    }
587}
588#[doc = "Field `USB_HS_RST` reader - USB HS reset control"]
589pub type USB_HS_RST_R = crate::BitReader<USB_HS_RST_A>;
590#[doc = "USB HS reset control\n\nValue on reset: 0"]
591#[derive(Clone, Copy, Debug, PartialEq, Eq)]
592pub enum USB_HS_RST_A {
593    #[doc = "0: Block is not reset"]
594    RELEASED = 0,
595    #[doc = "1: Block is reset"]
596    ASSERTED = 1,
597}
598impl From<USB_HS_RST_A> for bool {
599    #[inline(always)]
600    fn from(variant: USB_HS_RST_A) -> Self {
601        variant as u8 != 0
602    }
603}
604impl USB_HS_RST_R {
605    #[doc = "Get enumerated values variant"]
606    #[inline(always)]
607    pub const fn variant(&self) -> USB_HS_RST_A {
608        match self.bits {
609            false => USB_HS_RST_A::RELEASED,
610            true => USB_HS_RST_A::ASSERTED,
611        }
612    }
613    #[doc = "Block is not reset"]
614    #[inline(always)]
615    pub fn is_released(&self) -> bool {
616        *self == USB_HS_RST_A::RELEASED
617    }
618    #[doc = "Block is reset"]
619    #[inline(always)]
620    pub fn is_asserted(&self) -> bool {
621        *self == USB_HS_RST_A::ASSERTED
622    }
623}
624#[doc = "Field `USB_HS_RST` writer - USB HS reset control"]
625pub type USB_HS_RST_W<'a, REG> = crate::BitWriter<'a, REG, USB_HS_RST_A>;
626impl<'a, REG> USB_HS_RST_W<'a, REG>
627where
628    REG: crate::Writable + crate::RegisterSpec,
629{
630    #[doc = "Block is not reset"]
631    #[inline(always)]
632    pub fn released(self) -> &'a mut crate::W<REG> {
633        self.variant(USB_HS_RST_A::RELEASED)
634    }
635    #[doc = "Block is reset"]
636    #[inline(always)]
637    pub fn asserted(self) -> &'a mut crate::W<REG> {
638        self.variant(USB_HS_RST_A::ASSERTED)
639    }
640}
641#[doc = "Field `USB_HS_PHY_RST` reader - USB HS PHY reset control"]
642pub type USB_HS_PHY_RST_R = crate::BitReader<USB_HS_PHY_RST_A>;
643#[doc = "USB HS PHY reset control\n\nValue on reset: 0"]
644#[derive(Clone, Copy, Debug, PartialEq, Eq)]
645pub enum USB_HS_PHY_RST_A {
646    #[doc = "0: Block is not reset"]
647    RELEASED = 0,
648    #[doc = "1: Block is reset"]
649    ASSERTED = 1,
650}
651impl From<USB_HS_PHY_RST_A> for bool {
652    #[inline(always)]
653    fn from(variant: USB_HS_PHY_RST_A) -> Self {
654        variant as u8 != 0
655    }
656}
657impl USB_HS_PHY_RST_R {
658    #[doc = "Get enumerated values variant"]
659    #[inline(always)]
660    pub const fn variant(&self) -> USB_HS_PHY_RST_A {
661        match self.bits {
662            false => USB_HS_PHY_RST_A::RELEASED,
663            true => USB_HS_PHY_RST_A::ASSERTED,
664        }
665    }
666    #[doc = "Block is not reset"]
667    #[inline(always)]
668    pub fn is_released(&self) -> bool {
669        *self == USB_HS_PHY_RST_A::RELEASED
670    }
671    #[doc = "Block is reset"]
672    #[inline(always)]
673    pub fn is_asserted(&self) -> bool {
674        *self == USB_HS_PHY_RST_A::ASSERTED
675    }
676}
677#[doc = "Field `USB_HS_PHY_RST` writer - USB HS PHY reset control"]
678pub type USB_HS_PHY_RST_W<'a, REG> = crate::BitWriter<'a, REG, USB_HS_PHY_RST_A>;
679impl<'a, REG> USB_HS_PHY_RST_W<'a, REG>
680where
681    REG: crate::Writable + crate::RegisterSpec,
682{
683    #[doc = "Block is not reset"]
684    #[inline(always)]
685    pub fn released(self) -> &'a mut crate::W<REG> {
686        self.variant(USB_HS_PHY_RST_A::RELEASED)
687    }
688    #[doc = "Block is reset"]
689    #[inline(always)]
690    pub fn asserted(self) -> &'a mut crate::W<REG> {
691        self.variant(USB_HS_PHY_RST_A::ASSERTED)
692    }
693}
694#[doc = "Field `PQ_RST` reader - PowerQuad reset control"]
695pub type PQ_RST_R = crate::BitReader<PQ_RST_A>;
696#[doc = "PowerQuad reset control\n\nValue on reset: 0"]
697#[derive(Clone, Copy, Debug, PartialEq, Eq)]
698pub enum PQ_RST_A {
699    #[doc = "0: Block is not reset"]
700    RELEASED = 0,
701    #[doc = "1: Block is reset"]
702    ASSERTED = 1,
703}
704impl From<PQ_RST_A> for bool {
705    #[inline(always)]
706    fn from(variant: PQ_RST_A) -> Self {
707        variant as u8 != 0
708    }
709}
710impl PQ_RST_R {
711    #[doc = "Get enumerated values variant"]
712    #[inline(always)]
713    pub const fn variant(&self) -> PQ_RST_A {
714        match self.bits {
715            false => PQ_RST_A::RELEASED,
716            true => PQ_RST_A::ASSERTED,
717        }
718    }
719    #[doc = "Block is not reset"]
720    #[inline(always)]
721    pub fn is_released(&self) -> bool {
722        *self == PQ_RST_A::RELEASED
723    }
724    #[doc = "Block is reset"]
725    #[inline(always)]
726    pub fn is_asserted(&self) -> bool {
727        *self == PQ_RST_A::ASSERTED
728    }
729}
730#[doc = "Field `PQ_RST` writer - PowerQuad reset control"]
731pub type PQ_RST_W<'a, REG> = crate::BitWriter<'a, REG, PQ_RST_A>;
732impl<'a, REG> PQ_RST_W<'a, REG>
733where
734    REG: crate::Writable + crate::RegisterSpec,
735{
736    #[doc = "Block is not reset"]
737    #[inline(always)]
738    pub fn released(self) -> &'a mut crate::W<REG> {
739        self.variant(PQ_RST_A::RELEASED)
740    }
741    #[doc = "Block is reset"]
742    #[inline(always)]
743    pub fn asserted(self) -> &'a mut crate::W<REG> {
744        self.variant(PQ_RST_A::ASSERTED)
745    }
746}
747#[doc = "Field `PLU_RST` reader - PLU reset control"]
748pub type PLU_RST_R = crate::BitReader<PLU_RST_A>;
749#[doc = "PLU reset control\n\nValue on reset: 0"]
750#[derive(Clone, Copy, Debug, PartialEq, Eq)]
751pub enum PLU_RST_A {
752    #[doc = "0: Block is not reset"]
753    RELEASED = 0,
754    #[doc = "1: Block is reset"]
755    ASSERTED = 1,
756}
757impl From<PLU_RST_A> for bool {
758    #[inline(always)]
759    fn from(variant: PLU_RST_A) -> Self {
760        variant as u8 != 0
761    }
762}
763impl PLU_RST_R {
764    #[doc = "Get enumerated values variant"]
765    #[inline(always)]
766    pub const fn variant(&self) -> PLU_RST_A {
767        match self.bits {
768            false => PLU_RST_A::RELEASED,
769            true => PLU_RST_A::ASSERTED,
770        }
771    }
772    #[doc = "Block is not reset"]
773    #[inline(always)]
774    pub fn is_released(&self) -> bool {
775        *self == PLU_RST_A::RELEASED
776    }
777    #[doc = "Block is reset"]
778    #[inline(always)]
779    pub fn is_asserted(&self) -> bool {
780        *self == PLU_RST_A::ASSERTED
781    }
782}
783#[doc = "Field `PLU_RST` writer - PLU reset control"]
784pub type PLU_RST_W<'a, REG> = crate::BitWriter<'a, REG, PLU_RST_A>;
785impl<'a, REG> PLU_RST_W<'a, REG>
786where
787    REG: crate::Writable + crate::RegisterSpec,
788{
789    #[doc = "Block is not reset"]
790    #[inline(always)]
791    pub fn released(self) -> &'a mut crate::W<REG> {
792        self.variant(PLU_RST_A::RELEASED)
793    }
794    #[doc = "Block is reset"]
795    #[inline(always)]
796    pub fn asserted(self) -> &'a mut crate::W<REG> {
797        self.variant(PLU_RST_A::ASSERTED)
798    }
799}
800#[doc = "Field `TIMER3_RST` reader - CTIMER3 reset control"]
801pub type TIMER3_RST_R = crate::BitReader<TIMER3_RST_A>;
802#[doc = "CTIMER3 reset control\n\nValue on reset: 0"]
803#[derive(Clone, Copy, Debug, PartialEq, Eq)]
804pub enum TIMER3_RST_A {
805    #[doc = "0: Block is not reset"]
806    RELEASED = 0,
807    #[doc = "1: Block is reset"]
808    ASSERTED = 1,
809}
810impl From<TIMER3_RST_A> for bool {
811    #[inline(always)]
812    fn from(variant: TIMER3_RST_A) -> Self {
813        variant as u8 != 0
814    }
815}
816impl TIMER3_RST_R {
817    #[doc = "Get enumerated values variant"]
818    #[inline(always)]
819    pub const fn variant(&self) -> TIMER3_RST_A {
820        match self.bits {
821            false => TIMER3_RST_A::RELEASED,
822            true => TIMER3_RST_A::ASSERTED,
823        }
824    }
825    #[doc = "Block is not reset"]
826    #[inline(always)]
827    pub fn is_released(&self) -> bool {
828        *self == TIMER3_RST_A::RELEASED
829    }
830    #[doc = "Block is reset"]
831    #[inline(always)]
832    pub fn is_asserted(&self) -> bool {
833        *self == TIMER3_RST_A::ASSERTED
834    }
835}
836#[doc = "Field `TIMER3_RST` writer - CTIMER3 reset control"]
837pub type TIMER3_RST_W<'a, REG> = crate::BitWriter<'a, REG, TIMER3_RST_A>;
838impl<'a, REG> TIMER3_RST_W<'a, REG>
839where
840    REG: crate::Writable + crate::RegisterSpec,
841{
842    #[doc = "Block is not reset"]
843    #[inline(always)]
844    pub fn released(self) -> &'a mut crate::W<REG> {
845        self.variant(TIMER3_RST_A::RELEASED)
846    }
847    #[doc = "Block is reset"]
848    #[inline(always)]
849    pub fn asserted(self) -> &'a mut crate::W<REG> {
850        self.variant(TIMER3_RST_A::ASSERTED)
851    }
852}
853#[doc = "Field `TIMER4_RST` reader - CTIMER4 reset control"]
854pub type TIMER4_RST_R = crate::BitReader<TIMER4_RST_A>;
855#[doc = "CTIMER4 reset control\n\nValue on reset: 0"]
856#[derive(Clone, Copy, Debug, PartialEq, Eq)]
857pub enum TIMER4_RST_A {
858    #[doc = "0: Block is not reset"]
859    RELEASED = 0,
860    #[doc = "1: Block is reset"]
861    ASSERTED = 1,
862}
863impl From<TIMER4_RST_A> for bool {
864    #[inline(always)]
865    fn from(variant: TIMER4_RST_A) -> Self {
866        variant as u8 != 0
867    }
868}
869impl TIMER4_RST_R {
870    #[doc = "Get enumerated values variant"]
871    #[inline(always)]
872    pub const fn variant(&self) -> TIMER4_RST_A {
873        match self.bits {
874            false => TIMER4_RST_A::RELEASED,
875            true => TIMER4_RST_A::ASSERTED,
876        }
877    }
878    #[doc = "Block is not reset"]
879    #[inline(always)]
880    pub fn is_released(&self) -> bool {
881        *self == TIMER4_RST_A::RELEASED
882    }
883    #[doc = "Block is reset"]
884    #[inline(always)]
885    pub fn is_asserted(&self) -> bool {
886        *self == TIMER4_RST_A::ASSERTED
887    }
888}
889#[doc = "Field `TIMER4_RST` writer - CTIMER4 reset control"]
890pub type TIMER4_RST_W<'a, REG> = crate::BitWriter<'a, REG, TIMER4_RST_A>;
891impl<'a, REG> TIMER4_RST_W<'a, REG>
892where
893    REG: crate::Writable + crate::RegisterSpec,
894{
895    #[doc = "Block is not reset"]
896    #[inline(always)]
897    pub fn released(self) -> &'a mut crate::W<REG> {
898        self.variant(TIMER4_RST_A::RELEASED)
899    }
900    #[doc = "Block is reset"]
901    #[inline(always)]
902    pub fn asserted(self) -> &'a mut crate::W<REG> {
903        self.variant(TIMER4_RST_A::ASSERTED)
904    }
905}
906#[doc = "Field `PUF_RST` reader - PUF reset control"]
907pub type PUF_RST_R = crate::BitReader<PUF_RST_A>;
908#[doc = "PUF reset control\n\nValue on reset: 0"]
909#[derive(Clone, Copy, Debug, PartialEq, Eq)]
910pub enum PUF_RST_A {
911    #[doc = "0: Block is not reset"]
912    RELEASED = 0,
913    #[doc = "1: Block is reset"]
914    ASSERTED = 1,
915}
916impl From<PUF_RST_A> for bool {
917    #[inline(always)]
918    fn from(variant: PUF_RST_A) -> Self {
919        variant as u8 != 0
920    }
921}
922impl PUF_RST_R {
923    #[doc = "Get enumerated values variant"]
924    #[inline(always)]
925    pub const fn variant(&self) -> PUF_RST_A {
926        match self.bits {
927            false => PUF_RST_A::RELEASED,
928            true => PUF_RST_A::ASSERTED,
929        }
930    }
931    #[doc = "Block is not reset"]
932    #[inline(always)]
933    pub fn is_released(&self) -> bool {
934        *self == PUF_RST_A::RELEASED
935    }
936    #[doc = "Block is reset"]
937    #[inline(always)]
938    pub fn is_asserted(&self) -> bool {
939        *self == PUF_RST_A::ASSERTED
940    }
941}
942#[doc = "Field `PUF_RST` writer - PUF reset control"]
943pub type PUF_RST_W<'a, REG> = crate::BitWriter<'a, REG, PUF_RST_A>;
944impl<'a, REG> PUF_RST_W<'a, REG>
945where
946    REG: crate::Writable + crate::RegisterSpec,
947{
948    #[doc = "Block is not reset"]
949    #[inline(always)]
950    pub fn released(self) -> &'a mut crate::W<REG> {
951        self.variant(PUF_RST_A::RELEASED)
952    }
953    #[doc = "Block is reset"]
954    #[inline(always)]
955    pub fn asserted(self) -> &'a mut crate::W<REG> {
956        self.variant(PUF_RST_A::ASSERTED)
957    }
958}
959#[doc = "Field `PKC_RST` reader - PKC reset control"]
960pub type PKC_RST_R = crate::BitReader<PKC_RST_A>;
961#[doc = "PKC reset control\n\nValue on reset: 0"]
962#[derive(Clone, Copy, Debug, PartialEq, Eq)]
963pub enum PKC_RST_A {
964    #[doc = "0: Block is not reset"]
965    RELEASED = 0,
966    #[doc = "1: Block is reset"]
967    ASSERTED = 1,
968}
969impl From<PKC_RST_A> for bool {
970    #[inline(always)]
971    fn from(variant: PKC_RST_A) -> Self {
972        variant as u8 != 0
973    }
974}
975impl PKC_RST_R {
976    #[doc = "Get enumerated values variant"]
977    #[inline(always)]
978    pub const fn variant(&self) -> PKC_RST_A {
979        match self.bits {
980            false => PKC_RST_A::RELEASED,
981            true => PKC_RST_A::ASSERTED,
982        }
983    }
984    #[doc = "Block is not reset"]
985    #[inline(always)]
986    pub fn is_released(&self) -> bool {
987        *self == PKC_RST_A::RELEASED
988    }
989    #[doc = "Block is reset"]
990    #[inline(always)]
991    pub fn is_asserted(&self) -> bool {
992        *self == PKC_RST_A::ASSERTED
993    }
994}
995#[doc = "Field `PKC_RST` writer - PKC reset control"]
996pub type PKC_RST_W<'a, REG> = crate::BitWriter<'a, REG, PKC_RST_A>;
997impl<'a, REG> PKC_RST_W<'a, REG>
998where
999    REG: crate::Writable + crate::RegisterSpec,
1000{
1001    #[doc = "Block is not reset"]
1002    #[inline(always)]
1003    pub fn released(self) -> &'a mut crate::W<REG> {
1004        self.variant(PKC_RST_A::RELEASED)
1005    }
1006    #[doc = "Block is reset"]
1007    #[inline(always)]
1008    pub fn asserted(self) -> &'a mut crate::W<REG> {
1009        self.variant(PKC_RST_A::ASSERTED)
1010    }
1011}
1012#[doc = "Field `SM3_RST` reader - SM3 reset control"]
1013pub type SM3_RST_R = crate::BitReader<SM3_RST_A>;
1014#[doc = "SM3 reset control\n\nValue on reset: 0"]
1015#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1016pub enum SM3_RST_A {
1017    #[doc = "0: Block is not reset"]
1018    RELEASED = 0,
1019    #[doc = "1: Block is reset"]
1020    ASSERTED = 1,
1021}
1022impl From<SM3_RST_A> for bool {
1023    #[inline(always)]
1024    fn from(variant: SM3_RST_A) -> Self {
1025        variant as u8 != 0
1026    }
1027}
1028impl SM3_RST_R {
1029    #[doc = "Get enumerated values variant"]
1030    #[inline(always)]
1031    pub const fn variant(&self) -> SM3_RST_A {
1032        match self.bits {
1033            false => SM3_RST_A::RELEASED,
1034            true => SM3_RST_A::ASSERTED,
1035        }
1036    }
1037    #[doc = "Block is not reset"]
1038    #[inline(always)]
1039    pub fn is_released(&self) -> bool {
1040        *self == SM3_RST_A::RELEASED
1041    }
1042    #[doc = "Block is reset"]
1043    #[inline(always)]
1044    pub fn is_asserted(&self) -> bool {
1045        *self == SM3_RST_A::ASSERTED
1046    }
1047}
1048#[doc = "Field `SM3_RST` writer - SM3 reset control"]
1049pub type SM3_RST_W<'a, REG> = crate::BitWriter<'a, REG, SM3_RST_A>;
1050impl<'a, REG> SM3_RST_W<'a, REG>
1051where
1052    REG: crate::Writable + crate::RegisterSpec,
1053{
1054    #[doc = "Block is not reset"]
1055    #[inline(always)]
1056    pub fn released(self) -> &'a mut crate::W<REG> {
1057        self.variant(SM3_RST_A::RELEASED)
1058    }
1059    #[doc = "Block is reset"]
1060    #[inline(always)]
1061    pub fn asserted(self) -> &'a mut crate::W<REG> {
1062        self.variant(SM3_RST_A::ASSERTED)
1063    }
1064}
1065impl R {
1066    #[doc = "Bit 1 - DMA1 reset control"]
1067    #[inline(always)]
1068    pub fn dma1_rst(&self) -> DMA1_RST_R {
1069        DMA1_RST_R::new(((self.bits >> 1) & 1) != 0)
1070    }
1071    #[doc = "Bit 2 - Ethernet reset control"]
1072    #[inline(always)]
1073    pub fn enet_rst(&self) -> ENET_RST_R {
1074        ENET_RST_R::new(((self.bits >> 2) & 1) != 0)
1075    }
1076    #[doc = "Bit 3 - uSDHC reset control"]
1077    #[inline(always)]
1078    pub fn usdhc_rst(&self) -> USDHC_RST_R {
1079        USDHC_RST_R::new(((self.bits >> 3) & 1) != 0)
1080    }
1081    #[doc = "Bit 4 - FLEXIO reset control"]
1082    #[inline(always)]
1083    pub fn flexio_rst(&self) -> FLEXIO_RST_R {
1084        FLEXIO_RST_R::new(((self.bits >> 4) & 1) != 0)
1085    }
1086    #[doc = "Bit 5 - SAI0 reset control"]
1087    #[inline(always)]
1088    pub fn sai0_rst(&self) -> SAI0_RST_R {
1089        SAI0_RST_R::new(((self.bits >> 5) & 1) != 0)
1090    }
1091    #[doc = "Bit 6 - SAI1 reset control"]
1092    #[inline(always)]
1093    pub fn sai1_rst(&self) -> SAI1_RST_R {
1094        SAI1_RST_R::new(((self.bits >> 6) & 1) != 0)
1095    }
1096    #[doc = "Bit 7 - TRO reset control"]
1097    #[inline(always)]
1098    pub fn tro_rst(&self) -> TRO_RST_R {
1099        TRO_RST_R::new(((self.bits >> 7) & 1) != 0)
1100    }
1101    #[doc = "Bit 8 - FREQME reset control"]
1102    #[inline(always)]
1103    pub fn freqme_rst(&self) -> FREQME_RST_R {
1104        FREQME_RST_R::new(((self.bits >> 8) & 1) != 0)
1105    }
1106    #[doc = "Bit 13 - TRNG reset control"]
1107    #[inline(always)]
1108    pub fn trng_rst(&self) -> TRNG_RST_R {
1109        TRNG_RST_R::new(((self.bits >> 13) & 1) != 0)
1110    }
1111    #[doc = "Bit 14 - CAN0 reset control"]
1112    #[inline(always)]
1113    pub fn flexcan0_rst(&self) -> FLEXCAN0_RST_R {
1114        FLEXCAN0_RST_R::new(((self.bits >> 14) & 1) != 0)
1115    }
1116    #[doc = "Bit 15 - CAN1 reset control"]
1117    #[inline(always)]
1118    pub fn flexcan1_rst(&self) -> FLEXCAN1_RST_R {
1119        FLEXCAN1_RST_R::new(((self.bits >> 15) & 1) != 0)
1120    }
1121    #[doc = "Bit 16 - USB HS reset control"]
1122    #[inline(always)]
1123    pub fn usb_hs_rst(&self) -> USB_HS_RST_R {
1124        USB_HS_RST_R::new(((self.bits >> 16) & 1) != 0)
1125    }
1126    #[doc = "Bit 17 - USB HS PHY reset control"]
1127    #[inline(always)]
1128    pub fn usb_hs_phy_rst(&self) -> USB_HS_PHY_RST_R {
1129        USB_HS_PHY_RST_R::new(((self.bits >> 17) & 1) != 0)
1130    }
1131    #[doc = "Bit 19 - PowerQuad reset control"]
1132    #[inline(always)]
1133    pub fn pq_rst(&self) -> PQ_RST_R {
1134        PQ_RST_R::new(((self.bits >> 19) & 1) != 0)
1135    }
1136    #[doc = "Bit 20 - PLU reset control"]
1137    #[inline(always)]
1138    pub fn plu_rst(&self) -> PLU_RST_R {
1139        PLU_RST_R::new(((self.bits >> 20) & 1) != 0)
1140    }
1141    #[doc = "Bit 21 - CTIMER3 reset control"]
1142    #[inline(always)]
1143    pub fn timer3_rst(&self) -> TIMER3_RST_R {
1144        TIMER3_RST_R::new(((self.bits >> 21) & 1) != 0)
1145    }
1146    #[doc = "Bit 22 - CTIMER4 reset control"]
1147    #[inline(always)]
1148    pub fn timer4_rst(&self) -> TIMER4_RST_R {
1149        TIMER4_RST_R::new(((self.bits >> 22) & 1) != 0)
1150    }
1151    #[doc = "Bit 23 - PUF reset control"]
1152    #[inline(always)]
1153    pub fn puf_rst(&self) -> PUF_RST_R {
1154        PUF_RST_R::new(((self.bits >> 23) & 1) != 0)
1155    }
1156    #[doc = "Bit 24 - PKC reset control"]
1157    #[inline(always)]
1158    pub fn pkc_rst(&self) -> PKC_RST_R {
1159        PKC_RST_R::new(((self.bits >> 24) & 1) != 0)
1160    }
1161    #[doc = "Bit 30 - SM3 reset control"]
1162    #[inline(always)]
1163    pub fn sm3_rst(&self) -> SM3_RST_R {
1164        SM3_RST_R::new(((self.bits >> 30) & 1) != 0)
1165    }
1166}
1167impl W {
1168    #[doc = "Bit 1 - DMA1 reset control"]
1169    #[inline(always)]
1170    #[must_use]
1171    pub fn dma1_rst(&mut self) -> DMA1_RST_W<PRESETCTRL2_SPEC> {
1172        DMA1_RST_W::new(self, 1)
1173    }
1174    #[doc = "Bit 2 - Ethernet reset control"]
1175    #[inline(always)]
1176    #[must_use]
1177    pub fn enet_rst(&mut self) -> ENET_RST_W<PRESETCTRL2_SPEC> {
1178        ENET_RST_W::new(self, 2)
1179    }
1180    #[doc = "Bit 3 - uSDHC reset control"]
1181    #[inline(always)]
1182    #[must_use]
1183    pub fn usdhc_rst(&mut self) -> USDHC_RST_W<PRESETCTRL2_SPEC> {
1184        USDHC_RST_W::new(self, 3)
1185    }
1186    #[doc = "Bit 4 - FLEXIO reset control"]
1187    #[inline(always)]
1188    #[must_use]
1189    pub fn flexio_rst(&mut self) -> FLEXIO_RST_W<PRESETCTRL2_SPEC> {
1190        FLEXIO_RST_W::new(self, 4)
1191    }
1192    #[doc = "Bit 5 - SAI0 reset control"]
1193    #[inline(always)]
1194    #[must_use]
1195    pub fn sai0_rst(&mut self) -> SAI0_RST_W<PRESETCTRL2_SPEC> {
1196        SAI0_RST_W::new(self, 5)
1197    }
1198    #[doc = "Bit 6 - SAI1 reset control"]
1199    #[inline(always)]
1200    #[must_use]
1201    pub fn sai1_rst(&mut self) -> SAI1_RST_W<PRESETCTRL2_SPEC> {
1202        SAI1_RST_W::new(self, 6)
1203    }
1204    #[doc = "Bit 7 - TRO reset control"]
1205    #[inline(always)]
1206    #[must_use]
1207    pub fn tro_rst(&mut self) -> TRO_RST_W<PRESETCTRL2_SPEC> {
1208        TRO_RST_W::new(self, 7)
1209    }
1210    #[doc = "Bit 8 - FREQME reset control"]
1211    #[inline(always)]
1212    #[must_use]
1213    pub fn freqme_rst(&mut self) -> FREQME_RST_W<PRESETCTRL2_SPEC> {
1214        FREQME_RST_W::new(self, 8)
1215    }
1216    #[doc = "Bit 13 - TRNG reset control"]
1217    #[inline(always)]
1218    #[must_use]
1219    pub fn trng_rst(&mut self) -> TRNG_RST_W<PRESETCTRL2_SPEC> {
1220        TRNG_RST_W::new(self, 13)
1221    }
1222    #[doc = "Bit 14 - CAN0 reset control"]
1223    #[inline(always)]
1224    #[must_use]
1225    pub fn flexcan0_rst(&mut self) -> FLEXCAN0_RST_W<PRESETCTRL2_SPEC> {
1226        FLEXCAN0_RST_W::new(self, 14)
1227    }
1228    #[doc = "Bit 15 - CAN1 reset control"]
1229    #[inline(always)]
1230    #[must_use]
1231    pub fn flexcan1_rst(&mut self) -> FLEXCAN1_RST_W<PRESETCTRL2_SPEC> {
1232        FLEXCAN1_RST_W::new(self, 15)
1233    }
1234    #[doc = "Bit 16 - USB HS reset control"]
1235    #[inline(always)]
1236    #[must_use]
1237    pub fn usb_hs_rst(&mut self) -> USB_HS_RST_W<PRESETCTRL2_SPEC> {
1238        USB_HS_RST_W::new(self, 16)
1239    }
1240    #[doc = "Bit 17 - USB HS PHY reset control"]
1241    #[inline(always)]
1242    #[must_use]
1243    pub fn usb_hs_phy_rst(&mut self) -> USB_HS_PHY_RST_W<PRESETCTRL2_SPEC> {
1244        USB_HS_PHY_RST_W::new(self, 17)
1245    }
1246    #[doc = "Bit 19 - PowerQuad reset control"]
1247    #[inline(always)]
1248    #[must_use]
1249    pub fn pq_rst(&mut self) -> PQ_RST_W<PRESETCTRL2_SPEC> {
1250        PQ_RST_W::new(self, 19)
1251    }
1252    #[doc = "Bit 20 - PLU reset control"]
1253    #[inline(always)]
1254    #[must_use]
1255    pub fn plu_rst(&mut self) -> PLU_RST_W<PRESETCTRL2_SPEC> {
1256        PLU_RST_W::new(self, 20)
1257    }
1258    #[doc = "Bit 21 - CTIMER3 reset control"]
1259    #[inline(always)]
1260    #[must_use]
1261    pub fn timer3_rst(&mut self) -> TIMER3_RST_W<PRESETCTRL2_SPEC> {
1262        TIMER3_RST_W::new(self, 21)
1263    }
1264    #[doc = "Bit 22 - CTIMER4 reset control"]
1265    #[inline(always)]
1266    #[must_use]
1267    pub fn timer4_rst(&mut self) -> TIMER4_RST_W<PRESETCTRL2_SPEC> {
1268        TIMER4_RST_W::new(self, 22)
1269    }
1270    #[doc = "Bit 23 - PUF reset control"]
1271    #[inline(always)]
1272    #[must_use]
1273    pub fn puf_rst(&mut self) -> PUF_RST_W<PRESETCTRL2_SPEC> {
1274        PUF_RST_W::new(self, 23)
1275    }
1276    #[doc = "Bit 24 - PKC reset control"]
1277    #[inline(always)]
1278    #[must_use]
1279    pub fn pkc_rst(&mut self) -> PKC_RST_W<PRESETCTRL2_SPEC> {
1280        PKC_RST_W::new(self, 24)
1281    }
1282    #[doc = "Bit 30 - SM3 reset control"]
1283    #[inline(always)]
1284    #[must_use]
1285    pub fn sm3_rst(&mut self) -> SM3_RST_W<PRESETCTRL2_SPEC> {
1286        SM3_RST_W::new(self, 30)
1287    }
1288    #[doc = r" Writes raw bits to the register."]
1289    #[doc = r""]
1290    #[doc = r" # Safety"]
1291    #[doc = r""]
1292    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
1293    #[inline(always)]
1294    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1295        self.bits = bits;
1296        self
1297    }
1298}
1299#[doc = "Peripheral Reset Control 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`presetctrl2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`presetctrl2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
1300pub struct PRESETCTRL2_SPEC;
1301impl crate::RegisterSpec for PRESETCTRL2_SPEC {
1302    type Ux = u32;
1303}
1304#[doc = "`read()` method returns [`presetctrl2::R`](R) reader structure"]
1305impl crate::Readable for PRESETCTRL2_SPEC {}
1306#[doc = "`write(|w| ..)` method takes [`presetctrl2::W`](W) writer structure"]
1307impl crate::Writable for PRESETCTRL2_SPEC {
1308    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
1309    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
1310}
1311#[doc = "`reset()` method sets PRESETCTRL2 to value 0"]
1312impl crate::Resettable for PRESETCTRL2_SPEC {
1313    const RESET_VALUE: u32 = 0;
1314}
mcxn947_pac/syscon0/presetctrl2.rs

mcxn947_pac/syscon0/
presetctrl2.rs
