mcxa_pac/usb0/
miscctrl.rs

1#[doc = "Register `MISCCTRL` reader"]
2pub type R = crate::R<MiscctrlSpec>;
3#[doc = "Register `MISCCTRL` writer"]
4pub type W = crate::W<MiscctrlSpec>;
5#[doc = "Dynamic SOF Threshold Compare mode\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Sofdynthld {
9    #[doc = "0: When the byte-times SOF threshold is reached"]
10    UseDynSofThreshold = 0,
11    #[doc = "1: When 8 byte-times SOF threshold is reached or overstepped"]
12    UseFixedSofThreshold = 1,
13}
14impl From<Sofdynthld> for bool {
15    #[inline(always)]
16    fn from(variant: Sofdynthld) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `SOFDYNTHLD` reader - Dynamic SOF Threshold Compare mode"]
21pub type SofdynthldR = crate::BitReader<Sofdynthld>;
22impl SofdynthldR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Sofdynthld {
26        match self.bits {
27            false => Sofdynthld::UseDynSofThreshold,
28            true => Sofdynthld::UseFixedSofThreshold,
29        }
30    }
31    #[doc = "When the byte-times SOF threshold is reached"]
32    #[inline(always)]
33    pub fn is_use_dyn_sof_threshold(&self) -> bool {
34        *self == Sofdynthld::UseDynSofThreshold
35    }
36    #[doc = "When 8 byte-times SOF threshold is reached or overstepped"]
37    #[inline(always)]
38    pub fn is_use_fixed_sof_threshold(&self) -> bool {
39        *self == Sofdynthld::UseFixedSofThreshold
40    }
41}
42#[doc = "Field `SOFDYNTHLD` writer - Dynamic SOF Threshold Compare mode"]
43pub type SofdynthldW<'a, REG> = crate::BitWriter<'a, REG, Sofdynthld>;
44impl<'a, REG> SofdynthldW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "When the byte-times SOF threshold is reached"]
49    #[inline(always)]
50    pub fn use_dyn_sof_threshold(self) -> &'a mut crate::W<REG> {
51        self.variant(Sofdynthld::UseDynSofThreshold)
52    }
53    #[doc = "When 8 byte-times SOF threshold is reached or overstepped"]
54    #[inline(always)]
55    pub fn use_fixed_sof_threshold(self) -> &'a mut crate::W<REG> {
56        self.variant(Sofdynthld::UseFixedSofThreshold)
57    }
58}
59#[doc = "SOF_TOK Interrupt Generation Mode Select\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Sofbusset {
63    #[doc = "0: According to the SOF threshold value"]
64    SofTokIntFromThreshold = 0,
65    #[doc = "1: When the SOF counter reaches 0"]
66    SofTokIntCounter0 = 1,
67}
68impl From<Sofbusset> for bool {
69    #[inline(always)]
70    fn from(variant: Sofbusset) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `SOFBUSSET` reader - SOF_TOK Interrupt Generation Mode Select"]
75pub type SofbussetR = crate::BitReader<Sofbusset>;
76impl SofbussetR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Sofbusset {
80        match self.bits {
81            false => Sofbusset::SofTokIntFromThreshold,
82            true => Sofbusset::SofTokIntCounter0,
83        }
84    }
85    #[doc = "According to the SOF threshold value"]
86    #[inline(always)]
87    pub fn is_sof_tok_int_from_threshold(&self) -> bool {
88        *self == Sofbusset::SofTokIntFromThreshold
89    }
90    #[doc = "When the SOF counter reaches 0"]
91    #[inline(always)]
92    pub fn is_sof_tok_int_counter_0(&self) -> bool {
93        *self == Sofbusset::SofTokIntCounter0
94    }
95}
96#[doc = "Field `SOFBUSSET` writer - SOF_TOK Interrupt Generation Mode Select"]
97pub type SofbussetW<'a, REG> = crate::BitWriter<'a, REG, Sofbusset>;
98impl<'a, REG> SofbussetW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "According to the SOF threshold value"]
103    #[inline(always)]
104    pub fn sof_tok_int_from_threshold(self) -> &'a mut crate::W<REG> {
105        self.variant(Sofbusset::SofTokIntFromThreshold)
106    }
107    #[doc = "When the SOF counter reaches 0"]
108    #[inline(always)]
109    pub fn sof_tok_int_counter_0(self) -> &'a mut crate::W<REG> {
110        self.variant(Sofbusset::SofTokIntCounter0)
111    }
112}
113#[doc = "OWN Error Detect for ISO IN and ISO OUT Disable\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Ownerrisodis {
117    #[doc = "0: Enable"]
118    DisOwnErrorDetectIso = 0,
119    #[doc = "1: Disable"]
120    EnOwnErrorDetectIso = 1,
121}
122impl From<Ownerrisodis> for bool {
123    #[inline(always)]
124    fn from(variant: Ownerrisodis) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `OWNERRISODIS` reader - OWN Error Detect for ISO IN and ISO OUT Disable"]
129pub type OwnerrisodisR = crate::BitReader<Ownerrisodis>;
130impl OwnerrisodisR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Ownerrisodis {
134        match self.bits {
135            false => Ownerrisodis::DisOwnErrorDetectIso,
136            true => Ownerrisodis::EnOwnErrorDetectIso,
137        }
138    }
139    #[doc = "Enable"]
140    #[inline(always)]
141    pub fn is_dis_own_error_detect_iso(&self) -> bool {
142        *self == Ownerrisodis::DisOwnErrorDetectIso
143    }
144    #[doc = "Disable"]
145    #[inline(always)]
146    pub fn is_en_own_error_detect_iso(&self) -> bool {
147        *self == Ownerrisodis::EnOwnErrorDetectIso
148    }
149}
150#[doc = "Field `OWNERRISODIS` writer - OWN Error Detect for ISO IN and ISO OUT Disable"]
151pub type OwnerrisodisW<'a, REG> = crate::BitWriter<'a, REG, Ownerrisodis>;
152impl<'a, REG> OwnerrisodisW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "Enable"]
157    #[inline(always)]
158    pub fn dis_own_error_detect_iso(self) -> &'a mut crate::W<REG> {
159        self.variant(Ownerrisodis::DisOwnErrorDetectIso)
160    }
161    #[doc = "Disable"]
162    #[inline(always)]
163    pub fn en_own_error_detect_iso(self) -> &'a mut crate::W<REG> {
164        self.variant(Ownerrisodis::EnOwnErrorDetectIso)
165    }
166}
167#[doc = "VREGIN Rising Edge Interrupt Enable\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum VredgEn {
171    #[doc = "0: Disable"]
172    DisVreginReInt = 0,
173    #[doc = "1: Enable"]
174    EnVreginReInt = 1,
175}
176impl From<VredgEn> for bool {
177    #[inline(always)]
178    fn from(variant: VredgEn) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `VREDG_EN` reader - VREGIN Rising Edge Interrupt Enable"]
183pub type VredgEnR = crate::BitReader<VredgEn>;
184impl VredgEnR {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> VredgEn {
188        match self.bits {
189            false => VredgEn::DisVreginReInt,
190            true => VredgEn::EnVreginReInt,
191        }
192    }
193    #[doc = "Disable"]
194    #[inline(always)]
195    pub fn is_dis_vregin_re_int(&self) -> bool {
196        *self == VredgEn::DisVreginReInt
197    }
198    #[doc = "Enable"]
199    #[inline(always)]
200    pub fn is_en_vregin_re_int(&self) -> bool {
201        *self == VredgEn::EnVreginReInt
202    }
203}
204#[doc = "Field `VREDG_EN` writer - VREGIN Rising Edge Interrupt Enable"]
205pub type VredgEnW<'a, REG> = crate::BitWriter<'a, REG, VredgEn>;
206impl<'a, REG> VredgEnW<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Disable"]
211    #[inline(always)]
212    pub fn dis_vregin_re_int(self) -> &'a mut crate::W<REG> {
213        self.variant(VredgEn::DisVreginReInt)
214    }
215    #[doc = "Enable"]
216    #[inline(always)]
217    pub fn en_vregin_re_int(self) -> &'a mut crate::W<REG> {
218        self.variant(VredgEn::EnVreginReInt)
219    }
220}
221#[doc = "VREGIN Falling Edge Interrupt Enable\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum VfedgEn {
225    #[doc = "0: Disable"]
226    DisVreginFeInt = 0,
227    #[doc = "1: Enable"]
228    EnVreginFeInt = 1,
229}
230impl From<VfedgEn> for bool {
231    #[inline(always)]
232    fn from(variant: VfedgEn) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `VFEDG_EN` reader - VREGIN Falling Edge Interrupt Enable"]
237pub type VfedgEnR = crate::BitReader<VfedgEn>;
238impl VfedgEnR {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> VfedgEn {
242        match self.bits {
243            false => VfedgEn::DisVreginFeInt,
244            true => VfedgEn::EnVreginFeInt,
245        }
246    }
247    #[doc = "Disable"]
248    #[inline(always)]
249    pub fn is_dis_vregin_fe_int(&self) -> bool {
250        *self == VfedgEn::DisVreginFeInt
251    }
252    #[doc = "Enable"]
253    #[inline(always)]
254    pub fn is_en_vregin_fe_int(&self) -> bool {
255        *self == VfedgEn::EnVreginFeInt
256    }
257}
258#[doc = "Field `VFEDG_EN` writer - VREGIN Falling Edge Interrupt Enable"]
259pub type VfedgEnW<'a, REG> = crate::BitWriter<'a, REG, VfedgEn>;
260impl<'a, REG> VfedgEnW<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "Disable"]
265    #[inline(always)]
266    pub fn dis_vregin_fe_int(self) -> &'a mut crate::W<REG> {
267        self.variant(VfedgEn::DisVreginFeInt)
268    }
269    #[doc = "Enable"]
270    #[inline(always)]
271    pub fn en_vregin_fe_int(self) -> &'a mut crate::W<REG> {
272        self.variant(VfedgEn::EnVreginFeInt)
273    }
274}
275#[doc = "USB Peripheral Mode Stall Adjust Enable\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum StlAdjEn {
279    #[doc = "0: If ENDPTn\\[END_STALL\\] = 1, both IN and OUT directions for the associated endpoint stalls."]
280    StallBothInOut = 0,
281    #[doc = "1: If ENDPTn\\[END_STALL\\] = 1, the STALL_xx_DIS registers control which directions for the associated endpoint stalls."]
282    StallSingleDirection = 1,
283}
284impl From<StlAdjEn> for bool {
285    #[inline(always)]
286    fn from(variant: StlAdjEn) -> Self {
287        variant as u8 != 0
288    }
289}
290#[doc = "Field `STL_ADJ_EN` reader - USB Peripheral Mode Stall Adjust Enable"]
291pub type StlAdjEnR = crate::BitReader<StlAdjEn>;
292impl StlAdjEnR {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub const fn variant(&self) -> StlAdjEn {
296        match self.bits {
297            false => StlAdjEn::StallBothInOut,
298            true => StlAdjEn::StallSingleDirection,
299        }
300    }
301    #[doc = "If ENDPTn\\[END_STALL\\] = 1, both IN and OUT directions for the associated endpoint stalls."]
302    #[inline(always)]
303    pub fn is_stall_both_in_out(&self) -> bool {
304        *self == StlAdjEn::StallBothInOut
305    }
306    #[doc = "If ENDPTn\\[END_STALL\\] = 1, the STALL_xx_DIS registers control which directions for the associated endpoint stalls."]
307    #[inline(always)]
308    pub fn is_stall_single_direction(&self) -> bool {
309        *self == StlAdjEn::StallSingleDirection
310    }
311}
312#[doc = "Field `STL_ADJ_EN` writer - USB Peripheral Mode Stall Adjust Enable"]
313pub type StlAdjEnW<'a, REG> = crate::BitWriter<'a, REG, StlAdjEn>;
314impl<'a, REG> StlAdjEnW<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317{
318    #[doc = "If ENDPTn\\[END_STALL\\] = 1, both IN and OUT directions for the associated endpoint stalls."]
319    #[inline(always)]
320    pub fn stall_both_in_out(self) -> &'a mut crate::W<REG> {
321        self.variant(StlAdjEn::StallBothInOut)
322    }
323    #[doc = "If ENDPTn\\[END_STALL\\] = 1, the STALL_xx_DIS registers control which directions for the associated endpoint stalls."]
324    #[inline(always)]
325    pub fn stall_single_direction(self) -> &'a mut crate::W<REG> {
326        self.variant(StlAdjEn::StallSingleDirection)
327    }
328}
329impl R {
330    #[doc = "Bit 0 - Dynamic SOF Threshold Compare mode"]
331    #[inline(always)]
332    pub fn sofdynthld(&self) -> SofdynthldR {
333        SofdynthldR::new((self.bits & 1) != 0)
334    }
335    #[doc = "Bit 1 - SOF_TOK Interrupt Generation Mode Select"]
336    #[inline(always)]
337    pub fn sofbusset(&self) -> SofbussetR {
338        SofbussetR::new(((self.bits >> 1) & 1) != 0)
339    }
340    #[doc = "Bit 2 - OWN Error Detect for ISO IN and ISO OUT Disable"]
341    #[inline(always)]
342    pub fn ownerrisodis(&self) -> OwnerrisodisR {
343        OwnerrisodisR::new(((self.bits >> 2) & 1) != 0)
344    }
345    #[doc = "Bit 3 - VREGIN Rising Edge Interrupt Enable"]
346    #[inline(always)]
347    pub fn vredg_en(&self) -> VredgEnR {
348        VredgEnR::new(((self.bits >> 3) & 1) != 0)
349    }
350    #[doc = "Bit 4 - VREGIN Falling Edge Interrupt Enable"]
351    #[inline(always)]
352    pub fn vfedg_en(&self) -> VfedgEnR {
353        VfedgEnR::new(((self.bits >> 4) & 1) != 0)
354    }
355    #[doc = "Bit 7 - USB Peripheral Mode Stall Adjust Enable"]
356    #[inline(always)]
357    pub fn stl_adj_en(&self) -> StlAdjEnR {
358        StlAdjEnR::new(((self.bits >> 7) & 1) != 0)
359    }
360}
361#[cfg(feature = "debug")]
362impl core::fmt::Debug for R {
363    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
364        f.debug_struct("MISCCTRL")
365            .field("sofdynthld", &self.sofdynthld())
366            .field("sofbusset", &self.sofbusset())
367            .field("ownerrisodis", &self.ownerrisodis())
368            .field("vredg_en", &self.vredg_en())
369            .field("vfedg_en", &self.vfedg_en())
370            .field("stl_adj_en", &self.stl_adj_en())
371            .finish()
372    }
373}
374impl W {
375    #[doc = "Bit 0 - Dynamic SOF Threshold Compare mode"]
376    #[inline(always)]
377    pub fn sofdynthld(&mut self) -> SofdynthldW<'_, MiscctrlSpec> {
378        SofdynthldW::new(self, 0)
379    }
380    #[doc = "Bit 1 - SOF_TOK Interrupt Generation Mode Select"]
381    #[inline(always)]
382    pub fn sofbusset(&mut self) -> SofbussetW<'_, MiscctrlSpec> {
383        SofbussetW::new(self, 1)
384    }
385    #[doc = "Bit 2 - OWN Error Detect for ISO IN and ISO OUT Disable"]
386    #[inline(always)]
387    pub fn ownerrisodis(&mut self) -> OwnerrisodisW<'_, MiscctrlSpec> {
388        OwnerrisodisW::new(self, 2)
389    }
390    #[doc = "Bit 3 - VREGIN Rising Edge Interrupt Enable"]
391    #[inline(always)]
392    pub fn vredg_en(&mut self) -> VredgEnW<'_, MiscctrlSpec> {
393        VredgEnW::new(self, 3)
394    }
395    #[doc = "Bit 4 - VREGIN Falling Edge Interrupt Enable"]
396    #[inline(always)]
397    pub fn vfedg_en(&mut self) -> VfedgEnW<'_, MiscctrlSpec> {
398        VfedgEnW::new(self, 4)
399    }
400    #[doc = "Bit 7 - USB Peripheral Mode Stall Adjust Enable"]
401    #[inline(always)]
402    pub fn stl_adj_en(&mut self) -> StlAdjEnW<'_, MiscctrlSpec> {
403        StlAdjEnW::new(self, 7)
404    }
405}
406#[doc = "Miscellaneous Control\n\nYou can [`read`](crate::Reg::read) this register and get [`miscctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`miscctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
407pub struct MiscctrlSpec;
408impl crate::RegisterSpec for MiscctrlSpec {
409    type Ux = u8;
410}
411#[doc = "`read()` method returns [`miscctrl::R`](R) reader structure"]
412impl crate::Readable for MiscctrlSpec {}
413#[doc = "`write(|w| ..)` method takes [`miscctrl::W`](W) writer structure"]
414impl crate::Writable for MiscctrlSpec {
415    type Safety = crate::Unsafe;
416}
417#[doc = "`reset()` method sets MISCCTRL to value 0"]
418impl crate::Resettable for MiscctrlSpec {}
mcxa_pac/usb0/miscctrl.rs

mcxa_pac/usb0/
miscctrl.rs
