mcxa_pac/flexpwm0/
swcout.rs

1#[doc = "Register `SWCOUT` reader"]
2pub type R = crate::R<SwcoutSpec>;
3#[doc = "Register `SWCOUT` writer"]
4pub type W = crate::W<SwcoutSpec>;
5#[doc = "Submodule 0 Software Controlled Output 45\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Sm0out45 {
9    #[doc = "0: A logic 0 is supplied to the deadtime generator of submodule 0 instead of PWM45."]
10    Logic0 = 0,
11    #[doc = "1: A logic 1 is supplied to the deadtime generator of submodule 0 instead of PWM45."]
12    Logic1 = 1,
13}
14impl From<Sm0out45> for bool {
15    #[inline(always)]
16    fn from(variant: Sm0out45) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `SM0OUT45` reader - Submodule 0 Software Controlled Output 45"]
21pub type Sm0out45R = crate::BitReader<Sm0out45>;
22impl Sm0out45R {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Sm0out45 {
26        match self.bits {
27            false => Sm0out45::Logic0,
28            true => Sm0out45::Logic1,
29        }
30    }
31    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 0 instead of PWM45."]
32    #[inline(always)]
33    pub fn is_logic_0(&self) -> bool {
34        *self == Sm0out45::Logic0
35    }
36    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 0 instead of PWM45."]
37    #[inline(always)]
38    pub fn is_logic_1(&self) -> bool {
39        *self == Sm0out45::Logic1
40    }
41}
42#[doc = "Field `SM0OUT45` writer - Submodule 0 Software Controlled Output 45"]
43pub type Sm0out45W<'a, REG> = crate::BitWriter<'a, REG, Sm0out45>;
44impl<'a, REG> Sm0out45W<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 0 instead of PWM45."]
49    #[inline(always)]
50    pub fn logic_0(self) -> &'a mut crate::W<REG> {
51        self.variant(Sm0out45::Logic0)
52    }
53    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 0 instead of PWM45."]
54    #[inline(always)]
55    pub fn logic_1(self) -> &'a mut crate::W<REG> {
56        self.variant(Sm0out45::Logic1)
57    }
58}
59#[doc = "Submodule 0 Software Controlled Output 23\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Sm0out23 {
63    #[doc = "0: A logic 0 is supplied to the deadtime generator of submodule 0 instead of PWM23."]
64    Logic0 = 0,
65    #[doc = "1: A logic 1 is supplied to the deadtime generator of submodule 0 instead of PWM23."]
66    Logic1 = 1,
67}
68impl From<Sm0out23> for bool {
69    #[inline(always)]
70    fn from(variant: Sm0out23) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `SM0OUT23` reader - Submodule 0 Software Controlled Output 23"]
75pub type Sm0out23R = crate::BitReader<Sm0out23>;
76impl Sm0out23R {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Sm0out23 {
80        match self.bits {
81            false => Sm0out23::Logic0,
82            true => Sm0out23::Logic1,
83        }
84    }
85    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 0 instead of PWM23."]
86    #[inline(always)]
87    pub fn is_logic_0(&self) -> bool {
88        *self == Sm0out23::Logic0
89    }
90    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 0 instead of PWM23."]
91    #[inline(always)]
92    pub fn is_logic_1(&self) -> bool {
93        *self == Sm0out23::Logic1
94    }
95}
96#[doc = "Field `SM0OUT23` writer - Submodule 0 Software Controlled Output 23"]
97pub type Sm0out23W<'a, REG> = crate::BitWriter<'a, REG, Sm0out23>;
98impl<'a, REG> Sm0out23W<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 0 instead of PWM23."]
103    #[inline(always)]
104    pub fn logic_0(self) -> &'a mut crate::W<REG> {
105        self.variant(Sm0out23::Logic0)
106    }
107    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 0 instead of PWM23."]
108    #[inline(always)]
109    pub fn logic_1(self) -> &'a mut crate::W<REG> {
110        self.variant(Sm0out23::Logic1)
111    }
112}
113#[doc = "Submodule 1 Software Controlled Output 45\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Sm1out45 {
117    #[doc = "0: A logic 0 is supplied to the deadtime generator of submodule 1 instead of PWM45."]
118    Logic0 = 0,
119    #[doc = "1: A logic 1 is supplied to the deadtime generator of submodule 1 instead of PWM45."]
120    Logic1 = 1,
121}
122impl From<Sm1out45> for bool {
123    #[inline(always)]
124    fn from(variant: Sm1out45) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `SM1OUT45` reader - Submodule 1 Software Controlled Output 45"]
129pub type Sm1out45R = crate::BitReader<Sm1out45>;
130impl Sm1out45R {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Sm1out45 {
134        match self.bits {
135            false => Sm1out45::Logic0,
136            true => Sm1out45::Logic1,
137        }
138    }
139    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 1 instead of PWM45."]
140    #[inline(always)]
141    pub fn is_logic_0(&self) -> bool {
142        *self == Sm1out45::Logic0
143    }
144    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 1 instead of PWM45."]
145    #[inline(always)]
146    pub fn is_logic_1(&self) -> bool {
147        *self == Sm1out45::Logic1
148    }
149}
150#[doc = "Field `SM1OUT45` writer - Submodule 1 Software Controlled Output 45"]
151pub type Sm1out45W<'a, REG> = crate::BitWriter<'a, REG, Sm1out45>;
152impl<'a, REG> Sm1out45W<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 1 instead of PWM45."]
157    #[inline(always)]
158    pub fn logic_0(self) -> &'a mut crate::W<REG> {
159        self.variant(Sm1out45::Logic0)
160    }
161    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 1 instead of PWM45."]
162    #[inline(always)]
163    pub fn logic_1(self) -> &'a mut crate::W<REG> {
164        self.variant(Sm1out45::Logic1)
165    }
166}
167#[doc = "Submodule 1 Software Controlled Output 23\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Sm1out23 {
171    #[doc = "0: A logic 0 is supplied to the deadtime generator of submodule 1 instead of PWM23."]
172    Logic0 = 0,
173    #[doc = "1: A logic 1 is supplied to the deadtime generator of submodule 1 instead of PWM23."]
174    Logic1 = 1,
175}
176impl From<Sm1out23> for bool {
177    #[inline(always)]
178    fn from(variant: Sm1out23) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `SM1OUT23` reader - Submodule 1 Software Controlled Output 23"]
183pub type Sm1out23R = crate::BitReader<Sm1out23>;
184impl Sm1out23R {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Sm1out23 {
188        match self.bits {
189            false => Sm1out23::Logic0,
190            true => Sm1out23::Logic1,
191        }
192    }
193    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 1 instead of PWM23."]
194    #[inline(always)]
195    pub fn is_logic_0(&self) -> bool {
196        *self == Sm1out23::Logic0
197    }
198    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 1 instead of PWM23."]
199    #[inline(always)]
200    pub fn is_logic_1(&self) -> bool {
201        *self == Sm1out23::Logic1
202    }
203}
204#[doc = "Field `SM1OUT23` writer - Submodule 1 Software Controlled Output 23"]
205pub type Sm1out23W<'a, REG> = crate::BitWriter<'a, REG, Sm1out23>;
206impl<'a, REG> Sm1out23W<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 1 instead of PWM23."]
211    #[inline(always)]
212    pub fn logic_0(self) -> &'a mut crate::W<REG> {
213        self.variant(Sm1out23::Logic0)
214    }
215    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 1 instead of PWM23."]
216    #[inline(always)]
217    pub fn logic_1(self) -> &'a mut crate::W<REG> {
218        self.variant(Sm1out23::Logic1)
219    }
220}
221#[doc = "Submodule 2 Software Controlled Output 45\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Sm2out45 {
225    #[doc = "0: A logic 0 is supplied to the deadtime generator of submodule 2 instead of PWM45."]
226    Logic0 = 0,
227    #[doc = "1: A logic 1 is supplied to the deadtime generator of submodule 2 instead of PWM45."]
228    Logic1 = 1,
229}
230impl From<Sm2out45> for bool {
231    #[inline(always)]
232    fn from(variant: Sm2out45) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `SM2OUT45` reader - Submodule 2 Software Controlled Output 45"]
237pub type Sm2out45R = crate::BitReader<Sm2out45>;
238impl Sm2out45R {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> Sm2out45 {
242        match self.bits {
243            false => Sm2out45::Logic0,
244            true => Sm2out45::Logic1,
245        }
246    }
247    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 2 instead of PWM45."]
248    #[inline(always)]
249    pub fn is_logic_0(&self) -> bool {
250        *self == Sm2out45::Logic0
251    }
252    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 2 instead of PWM45."]
253    #[inline(always)]
254    pub fn is_logic_1(&self) -> bool {
255        *self == Sm2out45::Logic1
256    }
257}
258#[doc = "Field `SM2OUT45` writer - Submodule 2 Software Controlled Output 45"]
259pub type Sm2out45W<'a, REG> = crate::BitWriter<'a, REG, Sm2out45>;
260impl<'a, REG> Sm2out45W<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 2 instead of PWM45."]
265    #[inline(always)]
266    pub fn logic_0(self) -> &'a mut crate::W<REG> {
267        self.variant(Sm2out45::Logic0)
268    }
269    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 2 instead of PWM45."]
270    #[inline(always)]
271    pub fn logic_1(self) -> &'a mut crate::W<REG> {
272        self.variant(Sm2out45::Logic1)
273    }
274}
275#[doc = "Submodule 2 Software Controlled Output 23\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum Sm2out23 {
279    #[doc = "0: A logic 0 is supplied to the deadtime generator of submodule 2 instead of PWM23."]
280    Logic0 = 0,
281    #[doc = "1: A logic 1 is supplied to the deadtime generator of submodule 2 instead of PWM23."]
282    Logic1 = 1,
283}
284impl From<Sm2out23> for bool {
285    #[inline(always)]
286    fn from(variant: Sm2out23) -> Self {
287        variant as u8 != 0
288    }
289}
290#[doc = "Field `SM2OUT23` reader - Submodule 2 Software Controlled Output 23"]
291pub type Sm2out23R = crate::BitReader<Sm2out23>;
292impl Sm2out23R {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub const fn variant(&self) -> Sm2out23 {
296        match self.bits {
297            false => Sm2out23::Logic0,
298            true => Sm2out23::Logic1,
299        }
300    }
301    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 2 instead of PWM23."]
302    #[inline(always)]
303    pub fn is_logic_0(&self) -> bool {
304        *self == Sm2out23::Logic0
305    }
306    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 2 instead of PWM23."]
307    #[inline(always)]
308    pub fn is_logic_1(&self) -> bool {
309        *self == Sm2out23::Logic1
310    }
311}
312#[doc = "Field `SM2OUT23` writer - Submodule 2 Software Controlled Output 23"]
313pub type Sm2out23W<'a, REG> = crate::BitWriter<'a, REG, Sm2out23>;
314impl<'a, REG> Sm2out23W<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317{
318    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 2 instead of PWM23."]
319    #[inline(always)]
320    pub fn logic_0(self) -> &'a mut crate::W<REG> {
321        self.variant(Sm2out23::Logic0)
322    }
323    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 2 instead of PWM23."]
324    #[inline(always)]
325    pub fn logic_1(self) -> &'a mut crate::W<REG> {
326        self.variant(Sm2out23::Logic1)
327    }
328}
329#[doc = "Submodule 3 Software Controlled Output 45\n\nValue on reset: 0"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum Sm3out45 {
333    #[doc = "0: A logic 0 is supplied to the deadtime generator of submodule 3 instead of PWM45."]
334    Logic0 = 0,
335    #[doc = "1: A logic 1 is supplied to the deadtime generator of submodule 3 instead of PWM45."]
336    Logic1 = 1,
337}
338impl From<Sm3out45> for bool {
339    #[inline(always)]
340    fn from(variant: Sm3out45) -> Self {
341        variant as u8 != 0
342    }
343}
344#[doc = "Field `SM3OUT45` reader - Submodule 3 Software Controlled Output 45"]
345pub type Sm3out45R = crate::BitReader<Sm3out45>;
346impl Sm3out45R {
347    #[doc = "Get enumerated values variant"]
348    #[inline(always)]
349    pub const fn variant(&self) -> Sm3out45 {
350        match self.bits {
351            false => Sm3out45::Logic0,
352            true => Sm3out45::Logic1,
353        }
354    }
355    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 3 instead of PWM45."]
356    #[inline(always)]
357    pub fn is_logic_0(&self) -> bool {
358        *self == Sm3out45::Logic0
359    }
360    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 3 instead of PWM45."]
361    #[inline(always)]
362    pub fn is_logic_1(&self) -> bool {
363        *self == Sm3out45::Logic1
364    }
365}
366#[doc = "Field `SM3OUT45` writer - Submodule 3 Software Controlled Output 45"]
367pub type Sm3out45W<'a, REG> = crate::BitWriter<'a, REG, Sm3out45>;
368impl<'a, REG> Sm3out45W<'a, REG>
369where
370    REG: crate::Writable + crate::RegisterSpec,
371{
372    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 3 instead of PWM45."]
373    #[inline(always)]
374    pub fn logic_0(self) -> &'a mut crate::W<REG> {
375        self.variant(Sm3out45::Logic0)
376    }
377    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 3 instead of PWM45."]
378    #[inline(always)]
379    pub fn logic_1(self) -> &'a mut crate::W<REG> {
380        self.variant(Sm3out45::Logic1)
381    }
382}
383#[doc = "Submodule 3 Software Controlled Output 23\n\nValue on reset: 0"]
384#[cfg_attr(feature = "defmt", derive(defmt::Format))]
385#[derive(Clone, Copy, Debug, PartialEq, Eq)]
386pub enum Sm3out23 {
387    #[doc = "0: A logic 0 is supplied to the deadtime generator of submodule 3 instead of PWM23."]
388    Logic0 = 0,
389    #[doc = "1: A logic 1 is supplied to the deadtime generator of submodule 3 instead of PWM23."]
390    Logic1 = 1,
391}
392impl From<Sm3out23> for bool {
393    #[inline(always)]
394    fn from(variant: Sm3out23) -> Self {
395        variant as u8 != 0
396    }
397}
398#[doc = "Field `SM3OUT23` reader - Submodule 3 Software Controlled Output 23"]
399pub type Sm3out23R = crate::BitReader<Sm3out23>;
400impl Sm3out23R {
401    #[doc = "Get enumerated values variant"]
402    #[inline(always)]
403    pub const fn variant(&self) -> Sm3out23 {
404        match self.bits {
405            false => Sm3out23::Logic0,
406            true => Sm3out23::Logic1,
407        }
408    }
409    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 3 instead of PWM23."]
410    #[inline(always)]
411    pub fn is_logic_0(&self) -> bool {
412        *self == Sm3out23::Logic0
413    }
414    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 3 instead of PWM23."]
415    #[inline(always)]
416    pub fn is_logic_1(&self) -> bool {
417        *self == Sm3out23::Logic1
418    }
419}
420#[doc = "Field `SM3OUT23` writer - Submodule 3 Software Controlled Output 23"]
421pub type Sm3out23W<'a, REG> = crate::BitWriter<'a, REG, Sm3out23>;
422impl<'a, REG> Sm3out23W<'a, REG>
423where
424    REG: crate::Writable + crate::RegisterSpec,
425{
426    #[doc = "A logic 0 is supplied to the deadtime generator of submodule 3 instead of PWM23."]
427    #[inline(always)]
428    pub fn logic_0(self) -> &'a mut crate::W<REG> {
429        self.variant(Sm3out23::Logic0)
430    }
431    #[doc = "A logic 1 is supplied to the deadtime generator of submodule 3 instead of PWM23."]
432    #[inline(always)]
433    pub fn logic_1(self) -> &'a mut crate::W<REG> {
434        self.variant(Sm3out23::Logic1)
435    }
436}
437impl R {
438    #[doc = "Bit 0 - Submodule 0 Software Controlled Output 45"]
439    #[inline(always)]
440    pub fn sm0out45(&self) -> Sm0out45R {
441        Sm0out45R::new((self.bits & 1) != 0)
442    }
443    #[doc = "Bit 1 - Submodule 0 Software Controlled Output 23"]
444    #[inline(always)]
445    pub fn sm0out23(&self) -> Sm0out23R {
446        Sm0out23R::new(((self.bits >> 1) & 1) != 0)
447    }
448    #[doc = "Bit 2 - Submodule 1 Software Controlled Output 45"]
449    #[inline(always)]
450    pub fn sm1out45(&self) -> Sm1out45R {
451        Sm1out45R::new(((self.bits >> 2) & 1) != 0)
452    }
453    #[doc = "Bit 3 - Submodule 1 Software Controlled Output 23"]
454    #[inline(always)]
455    pub fn sm1out23(&self) -> Sm1out23R {
456        Sm1out23R::new(((self.bits >> 3) & 1) != 0)
457    }
458    #[doc = "Bit 4 - Submodule 2 Software Controlled Output 45"]
459    #[inline(always)]
460    pub fn sm2out45(&self) -> Sm2out45R {
461        Sm2out45R::new(((self.bits >> 4) & 1) != 0)
462    }
463    #[doc = "Bit 5 - Submodule 2 Software Controlled Output 23"]
464    #[inline(always)]
465    pub fn sm2out23(&self) -> Sm2out23R {
466        Sm2out23R::new(((self.bits >> 5) & 1) != 0)
467    }
468    #[doc = "Bit 6 - Submodule 3 Software Controlled Output 45"]
469    #[inline(always)]
470    pub fn sm3out45(&self) -> Sm3out45R {
471        Sm3out45R::new(((self.bits >> 6) & 1) != 0)
472    }
473    #[doc = "Bit 7 - Submodule 3 Software Controlled Output 23"]
474    #[inline(always)]
475    pub fn sm3out23(&self) -> Sm3out23R {
476        Sm3out23R::new(((self.bits >> 7) & 1) != 0)
477    }
478}
479#[cfg(feature = "debug")]
480impl core::fmt::Debug for R {
481    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
482        f.debug_struct("SWCOUT")
483            .field("sm0out45", &self.sm0out45())
484            .field("sm0out23", &self.sm0out23())
485            .field("sm1out45", &self.sm1out45())
486            .field("sm1out23", &self.sm1out23())
487            .field("sm2out45", &self.sm2out45())
488            .field("sm2out23", &self.sm2out23())
489            .field("sm3out45", &self.sm3out45())
490            .field("sm3out23", &self.sm3out23())
491            .finish()
492    }
493}
494impl W {
495    #[doc = "Bit 0 - Submodule 0 Software Controlled Output 45"]
496    #[inline(always)]
497    pub fn sm0out45(&mut self) -> Sm0out45W<'_, SwcoutSpec> {
498        Sm0out45W::new(self, 0)
499    }
500    #[doc = "Bit 1 - Submodule 0 Software Controlled Output 23"]
501    #[inline(always)]
502    pub fn sm0out23(&mut self) -> Sm0out23W<'_, SwcoutSpec> {
503        Sm0out23W::new(self, 1)
504    }
505    #[doc = "Bit 2 - Submodule 1 Software Controlled Output 45"]
506    #[inline(always)]
507    pub fn sm1out45(&mut self) -> Sm1out45W<'_, SwcoutSpec> {
508        Sm1out45W::new(self, 2)
509    }
510    #[doc = "Bit 3 - Submodule 1 Software Controlled Output 23"]
511    #[inline(always)]
512    pub fn sm1out23(&mut self) -> Sm1out23W<'_, SwcoutSpec> {
513        Sm1out23W::new(self, 3)
514    }
515    #[doc = "Bit 4 - Submodule 2 Software Controlled Output 45"]
516    #[inline(always)]
517    pub fn sm2out45(&mut self) -> Sm2out45W<'_, SwcoutSpec> {
518        Sm2out45W::new(self, 4)
519    }
520    #[doc = "Bit 5 - Submodule 2 Software Controlled Output 23"]
521    #[inline(always)]
522    pub fn sm2out23(&mut self) -> Sm2out23W<'_, SwcoutSpec> {
523        Sm2out23W::new(self, 5)
524    }
525    #[doc = "Bit 6 - Submodule 3 Software Controlled Output 45"]
526    #[inline(always)]
527    pub fn sm3out45(&mut self) -> Sm3out45W<'_, SwcoutSpec> {
528        Sm3out45W::new(self, 6)
529    }
530    #[doc = "Bit 7 - Submodule 3 Software Controlled Output 23"]
531    #[inline(always)]
532    pub fn sm3out23(&mut self) -> Sm3out23W<'_, SwcoutSpec> {
533        Sm3out23W::new(self, 7)
534    }
535}
536#[doc = "Software Controlled Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`swcout::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swcout::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
537pub struct SwcoutSpec;
538impl crate::RegisterSpec for SwcoutSpec {
539    type Ux = u16;
540}
541#[doc = "`read()` method returns [`swcout::R`](R) reader structure"]
542impl crate::Readable for SwcoutSpec {}
543#[doc = "`write(|w| ..)` method takes [`swcout::W`](W) writer structure"]
544impl crate::Writable for SwcoutSpec {
545    type Safety = crate::Unsafe;
546}
547#[doc = "`reset()` method sets SWCOUT to value 0"]
548impl crate::Resettable for SwcoutSpec {}
mcxa_pac/flexpwm0/swcout.rs

mcxa_pac/flexpwm0/
swcout.rs
