mcxa_pac/erm0/
sr0.rs

1#[doc = "Register `SR0` reader"]
2pub type R = crate::R<Sr0Spec>;
3#[doc = "Register `SR0` writer"]
4pub type W = crate::W<Sr0Spec>;
5#[doc = "NCE1\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Nce1 {
9    #[doc = "0: No non-correctable error event on Memory 1 detected."]
10    NoError = 0,
11    #[doc = "1: Non-correctable error event on Memory 1 detected."]
12    Error = 1,
13}
14impl From<Nce1> for bool {
15    #[inline(always)]
16    fn from(variant: Nce1) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `NCE1` reader - NCE1"]
21pub type Nce1R = crate::BitReader<Nce1>;
22impl Nce1R {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Nce1 {
26        match self.bits {
27            false => Nce1::NoError,
28            true => Nce1::Error,
29        }
30    }
31    #[doc = "No non-correctable error event on Memory 1 detected."]
32    #[inline(always)]
33    pub fn is_no_error(&self) -> bool {
34        *self == Nce1::NoError
35    }
36    #[doc = "Non-correctable error event on Memory 1 detected."]
37    #[inline(always)]
38    pub fn is_error(&self) -> bool {
39        *self == Nce1::Error
40    }
41}
42#[doc = "Field `NCE1` writer - NCE1"]
43pub type Nce1W<'a, REG> = crate::BitWriter1C<'a, REG, Nce1>;
44impl<'a, REG> Nce1W<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "No non-correctable error event on Memory 1 detected."]
49    #[inline(always)]
50    pub fn no_error(self) -> &'a mut crate::W<REG> {
51        self.variant(Nce1::NoError)
52    }
53    #[doc = "Non-correctable error event on Memory 1 detected."]
54    #[inline(always)]
55    pub fn error(self) -> &'a mut crate::W<REG> {
56        self.variant(Nce1::Error)
57    }
58}
59#[doc = "SBC1\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Sbc1 {
63    #[doc = "0: No single-bit correction event on Memory 1 detected."]
64    NoEvent = 0,
65    #[doc = "1: Single-bit correction event on Memory 1 detected."]
66    Event = 1,
67}
68impl From<Sbc1> for bool {
69    #[inline(always)]
70    fn from(variant: Sbc1) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `SBC1` reader - SBC1"]
75pub type Sbc1R = crate::BitReader<Sbc1>;
76impl Sbc1R {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Sbc1 {
80        match self.bits {
81            false => Sbc1::NoEvent,
82            true => Sbc1::Event,
83        }
84    }
85    #[doc = "No single-bit correction event on Memory 1 detected."]
86    #[inline(always)]
87    pub fn is_no_event(&self) -> bool {
88        *self == Sbc1::NoEvent
89    }
90    #[doc = "Single-bit correction event on Memory 1 detected."]
91    #[inline(always)]
92    pub fn is_event(&self) -> bool {
93        *self == Sbc1::Event
94    }
95}
96#[doc = "Field `SBC1` writer - SBC1"]
97pub type Sbc1W<'a, REG> = crate::BitWriter1C<'a, REG, Sbc1>;
98impl<'a, REG> Sbc1W<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "No single-bit correction event on Memory 1 detected."]
103    #[inline(always)]
104    pub fn no_event(self) -> &'a mut crate::W<REG> {
105        self.variant(Sbc1::NoEvent)
106    }
107    #[doc = "Single-bit correction event on Memory 1 detected."]
108    #[inline(always)]
109    pub fn event(self) -> &'a mut crate::W<REG> {
110        self.variant(Sbc1::Event)
111    }
112}
113#[doc = "NCE0\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Nce0 {
117    #[doc = "0: No non-correctable error event on Memory 0 detected."]
118    NoError = 0,
119    #[doc = "1: Non-correctable error event on Memory 0 detected."]
120    Error = 1,
121}
122impl From<Nce0> for bool {
123    #[inline(always)]
124    fn from(variant: Nce0) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `NCE0` reader - NCE0"]
129pub type Nce0R = crate::BitReader<Nce0>;
130impl Nce0R {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Nce0 {
134        match self.bits {
135            false => Nce0::NoError,
136            true => Nce0::Error,
137        }
138    }
139    #[doc = "No non-correctable error event on Memory 0 detected."]
140    #[inline(always)]
141    pub fn is_no_error(&self) -> bool {
142        *self == Nce0::NoError
143    }
144    #[doc = "Non-correctable error event on Memory 0 detected."]
145    #[inline(always)]
146    pub fn is_error(&self) -> bool {
147        *self == Nce0::Error
148    }
149}
150#[doc = "Field `NCE0` writer - NCE0"]
151pub type Nce0W<'a, REG> = crate::BitWriter1C<'a, REG, Nce0>;
152impl<'a, REG> Nce0W<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "No non-correctable error event on Memory 0 detected."]
157    #[inline(always)]
158    pub fn no_error(self) -> &'a mut crate::W<REG> {
159        self.variant(Nce0::NoError)
160    }
161    #[doc = "Non-correctable error event on Memory 0 detected."]
162    #[inline(always)]
163    pub fn error(self) -> &'a mut crate::W<REG> {
164        self.variant(Nce0::Error)
165    }
166}
167#[doc = "SBC0\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Sbc0 {
171    #[doc = "0: No single-bit correction event on Memory 0 detected."]
172    NoEvent = 0,
173    #[doc = "1: Single-bit correction event on Memory 0 detected."]
174    Event = 1,
175}
176impl From<Sbc0> for bool {
177    #[inline(always)]
178    fn from(variant: Sbc0) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `SBC0` reader - SBC0"]
183pub type Sbc0R = crate::BitReader<Sbc0>;
184impl Sbc0R {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Sbc0 {
188        match self.bits {
189            false => Sbc0::NoEvent,
190            true => Sbc0::Event,
191        }
192    }
193    #[doc = "No single-bit correction event on Memory 0 detected."]
194    #[inline(always)]
195    pub fn is_no_event(&self) -> bool {
196        *self == Sbc0::NoEvent
197    }
198    #[doc = "Single-bit correction event on Memory 0 detected."]
199    #[inline(always)]
200    pub fn is_event(&self) -> bool {
201        *self == Sbc0::Event
202    }
203}
204#[doc = "Field `SBC0` writer - SBC0"]
205pub type Sbc0W<'a, REG> = crate::BitWriter1C<'a, REG, Sbc0>;
206impl<'a, REG> Sbc0W<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "No single-bit correction event on Memory 0 detected."]
211    #[inline(always)]
212    pub fn no_event(self) -> &'a mut crate::W<REG> {
213        self.variant(Sbc0::NoEvent)
214    }
215    #[doc = "Single-bit correction event on Memory 0 detected."]
216    #[inline(always)]
217    pub fn event(self) -> &'a mut crate::W<REG> {
218        self.variant(Sbc0::Event)
219    }
220}
221impl R {
222    #[doc = "Bit 26 - NCE1"]
223    #[inline(always)]
224    pub fn nce1(&self) -> Nce1R {
225        Nce1R::new(((self.bits >> 26) & 1) != 0)
226    }
227    #[doc = "Bit 27 - SBC1"]
228    #[inline(always)]
229    pub fn sbc1(&self) -> Sbc1R {
230        Sbc1R::new(((self.bits >> 27) & 1) != 0)
231    }
232    #[doc = "Bit 30 - NCE0"]
233    #[inline(always)]
234    pub fn nce0(&self) -> Nce0R {
235        Nce0R::new(((self.bits >> 30) & 1) != 0)
236    }
237    #[doc = "Bit 31 - SBC0"]
238    #[inline(always)]
239    pub fn sbc0(&self) -> Sbc0R {
240        Sbc0R::new(((self.bits >> 31) & 1) != 0)
241    }
242}
243#[cfg(feature = "debug")]
244impl core::fmt::Debug for R {
245    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
246        f.debug_struct("SR0")
247            .field("nce1", &self.nce1())
248            .field("sbc1", &self.sbc1())
249            .field("nce0", &self.nce0())
250            .field("sbc0", &self.sbc0())
251            .finish()
252    }
253}
254impl W {
255    #[doc = "Bit 26 - NCE1"]
256    #[inline(always)]
257    pub fn nce1(&mut self) -> Nce1W<'_, Sr0Spec> {
258        Nce1W::new(self, 26)
259    }
260    #[doc = "Bit 27 - SBC1"]
261    #[inline(always)]
262    pub fn sbc1(&mut self) -> Sbc1W<'_, Sr0Spec> {
263        Sbc1W::new(self, 27)
264    }
265    #[doc = "Bit 30 - NCE0"]
266    #[inline(always)]
267    pub fn nce0(&mut self) -> Nce0W<'_, Sr0Spec> {
268        Nce0W::new(self, 30)
269    }
270    #[doc = "Bit 31 - SBC0"]
271    #[inline(always)]
272    pub fn sbc0(&mut self) -> Sbc0W<'_, Sr0Spec> {
273        Sbc0W::new(self, 31)
274    }
275}
276#[doc = "ERM Status Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`sr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
277pub struct Sr0Spec;
278impl crate::RegisterSpec for Sr0Spec {
279    type Ux = u32;
280}
281#[doc = "`read()` method returns [`sr0::R`](R) reader structure"]
282impl crate::Readable for Sr0Spec {}
283#[doc = "`write(|w| ..)` method takes [`sr0::W`](W) writer structure"]
284impl crate::Writable for Sr0Spec {
285    type Safety = crate::Unsafe;
286    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0xcc00_0000;
287}
288#[doc = "`reset()` method sets SR0 to value 0"]
289impl crate::Resettable for Sr0Spec {}
mcxa_pac/erm0/sr0.rs

mcxa_pac/erm0/
sr0.rs
