mcxa_pac/eqdc0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub type R = crate::R<CtrlSpec>;
3#[doc = "Register `CTRL` writer"]
4pub type W = crate::W<CtrlSpec>;
5#[doc = "Load Okay\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Ldok {
9    #[doc = "0: No loading action taken. Users can write new values to buffered registers (writing into outer-set of these buffered registers)"]
10    Ldok0 = 0,
11    #[doc = "1: Outer-set values are ready to be loaded into inner-set and take effect. The loading time point depends on CTRL2\\[LDMOD\\]."]
12    Ldok1 = 1,
13}
14impl From<Ldok> for bool {
15    #[inline(always)]
16    fn from(variant: Ldok) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `LDOK` reader - Load Okay"]
21pub type LdokR = crate::BitReader<Ldok>;
22impl LdokR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Ldok {
26        match self.bits {
27            false => Ldok::Ldok0,
28            true => Ldok::Ldok1,
29        }
30    }
31    #[doc = "No loading action taken. Users can write new values to buffered registers (writing into outer-set of these buffered registers)"]
32    #[inline(always)]
33    pub fn is_ldok0(&self) -> bool {
34        *self == Ldok::Ldok0
35    }
36    #[doc = "Outer-set values are ready to be loaded into inner-set and take effect. The loading time point depends on CTRL2\\[LDMOD\\]."]
37    #[inline(always)]
38    pub fn is_ldok1(&self) -> bool {
39        *self == Ldok::Ldok1
40    }
41}
42#[doc = "Field `LDOK` writer - Load Okay"]
43pub type LdokW<'a, REG> = crate::BitWriter<'a, REG, Ldok>;
44impl<'a, REG> LdokW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "No loading action taken. Users can write new values to buffered registers (writing into outer-set of these buffered registers)"]
49    #[inline(always)]
50    pub fn ldok0(self) -> &'a mut crate::W<REG> {
51        self.variant(Ldok::Ldok0)
52    }
53    #[doc = "Outer-set values are ready to be loaded into inner-set and take effect. The loading time point depends on CTRL2\\[LDMOD\\]."]
54    #[inline(always)]
55    pub fn ldok1(self) -> &'a mut crate::W<REG> {
56        self.variant(Ldok::Ldok1)
57    }
58}
59#[doc = "DMA Enable\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Dmaen {
63    #[doc = "0: DMA is disabled"]
64    Dmaen0 = 0,
65    #[doc = "1: DMA is enabled. DMA request asserts automatically when the values in the outer-set of buffered compare registers (UCOMP0/LCOMP0;UCOMP1/LCOMP1;UCOMP2/LCOMP2;UCOMP3/LCOMP3), initial registers(UINIT/LINIT) and modulus registers (UMOD/LMOD) are loaded into the inner-set of buffer and then LDOK is cleared automatically. After the completion of this DMA transfer, LDOK is set automatically, it ensures outer-set values can be loaded into inner-set which in turn triggers DMA again."]
66    Dmaen1 = 1,
67}
68impl From<Dmaen> for bool {
69    #[inline(always)]
70    fn from(variant: Dmaen) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `DMAEN` reader - DMA Enable"]
75pub type DmaenR = crate::BitReader<Dmaen>;
76impl DmaenR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Dmaen {
80        match self.bits {
81            false => Dmaen::Dmaen0,
82            true => Dmaen::Dmaen1,
83        }
84    }
85    #[doc = "DMA is disabled"]
86    #[inline(always)]
87    pub fn is_dmaen_0(&self) -> bool {
88        *self == Dmaen::Dmaen0
89    }
90    #[doc = "DMA is enabled. DMA request asserts automatically when the values in the outer-set of buffered compare registers (UCOMP0/LCOMP0;UCOMP1/LCOMP1;UCOMP2/LCOMP2;UCOMP3/LCOMP3), initial registers(UINIT/LINIT) and modulus registers (UMOD/LMOD) are loaded into the inner-set of buffer and then LDOK is cleared automatically. After the completion of this DMA transfer, LDOK is set automatically, it ensures outer-set values can be loaded into inner-set which in turn triggers DMA again."]
91    #[inline(always)]
92    pub fn is_dmaen_1(&self) -> bool {
93        *self == Dmaen::Dmaen1
94    }
95}
96#[doc = "Field `DMAEN` writer - DMA Enable"]
97pub type DmaenW<'a, REG> = crate::BitWriter<'a, REG, Dmaen>;
98impl<'a, REG> DmaenW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "DMA is disabled"]
103    #[inline(always)]
104    pub fn dmaen_0(self) -> &'a mut crate::W<REG> {
105        self.variant(Dmaen::Dmaen0)
106    }
107    #[doc = "DMA is enabled. DMA request asserts automatically when the values in the outer-set of buffered compare registers (UCOMP0/LCOMP0;UCOMP1/LCOMP1;UCOMP2/LCOMP2;UCOMP3/LCOMP3), initial registers(UINIT/LINIT) and modulus registers (UMOD/LMOD) are loaded into the inner-set of buffer and then LDOK is cleared automatically. After the completion of this DMA transfer, LDOK is set automatically, it ensures outer-set values can be loaded into inner-set which in turn triggers DMA again."]
108    #[inline(always)]
109    pub fn dmaen_1(self) -> &'a mut crate::W<REG> {
110        self.variant(Dmaen::Dmaen1)
111    }
112}
113#[doc = "Watchdog Enable\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Wde {
117    #[doc = "0: Disabled"]
118    Wde0 = 0,
119    #[doc = "1: Enabled"]
120    Wde1 = 1,
121}
122impl From<Wde> for bool {
123    #[inline(always)]
124    fn from(variant: Wde) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `WDE` reader - Watchdog Enable"]
129pub type WdeR = crate::BitReader<Wde>;
130impl WdeR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Wde {
134        match self.bits {
135            false => Wde::Wde0,
136            true => Wde::Wde1,
137        }
138    }
139    #[doc = "Disabled"]
140    #[inline(always)]
141    pub fn is_wde0(&self) -> bool {
142        *self == Wde::Wde0
143    }
144    #[doc = "Enabled"]
145    #[inline(always)]
146    pub fn is_wde1(&self) -> bool {
147        *self == Wde::Wde1
148    }
149}
150#[doc = "Field `WDE` writer - Watchdog Enable"]
151pub type WdeW<'a, REG> = crate::BitWriter<'a, REG, Wde>;
152impl<'a, REG> WdeW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "Disabled"]
157    #[inline(always)]
158    pub fn wde0(self) -> &'a mut crate::W<REG> {
159        self.variant(Wde::Wde0)
160    }
161    #[doc = "Enabled"]
162    #[inline(always)]
163    pub fn wde1(self) -> &'a mut crate::W<REG> {
164        self.variant(Wde::Wde1)
165    }
166}
167#[doc = "Watchdog Timeout Interrupt Enable\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Wdie {
171    #[doc = "0: Disabled"]
172    Wdie0 = 0,
173    #[doc = "1: Enabled"]
174    Wdie1 = 1,
175}
176impl From<Wdie> for bool {
177    #[inline(always)]
178    fn from(variant: Wdie) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `WDIE` reader - Watchdog Timeout Interrupt Enable"]
183pub type WdieR = crate::BitReader<Wdie>;
184impl WdieR {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Wdie {
188        match self.bits {
189            false => Wdie::Wdie0,
190            true => Wdie::Wdie1,
191        }
192    }
193    #[doc = "Disabled"]
194    #[inline(always)]
195    pub fn is_wdie0(&self) -> bool {
196        *self == Wdie::Wdie0
197    }
198    #[doc = "Enabled"]
199    #[inline(always)]
200    pub fn is_wdie1(&self) -> bool {
201        *self == Wdie::Wdie1
202    }
203}
204#[doc = "Field `WDIE` writer - Watchdog Timeout Interrupt Enable"]
205pub type WdieW<'a, REG> = crate::BitWriter<'a, REG, Wdie>;
206impl<'a, REG> WdieW<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Disabled"]
211    #[inline(always)]
212    pub fn wdie0(self) -> &'a mut crate::W<REG> {
213        self.variant(Wdie::Wdie0)
214    }
215    #[doc = "Enabled"]
216    #[inline(always)]
217    pub fn wdie1(self) -> &'a mut crate::W<REG> {
218        self.variant(Wdie::Wdie1)
219    }
220}
221#[doc = "Watchdog Timeout Interrupt Request\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Wdirq {
225    #[doc = "0: No Watchdog timeout interrupt has occurred"]
226    Wdirq0 = 0,
227    #[doc = "1: Watchdog timeout interrupt has occurred"]
228    Wdirq1 = 1,
229}
230impl From<Wdirq> for bool {
231    #[inline(always)]
232    fn from(variant: Wdirq) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `WDIRQ` reader - Watchdog Timeout Interrupt Request"]
237pub type WdirqR = crate::BitReader<Wdirq>;
238impl WdirqR {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> Wdirq {
242        match self.bits {
243            false => Wdirq::Wdirq0,
244            true => Wdirq::Wdirq1,
245        }
246    }
247    #[doc = "No Watchdog timeout interrupt has occurred"]
248    #[inline(always)]
249    pub fn is_wdirq0(&self) -> bool {
250        *self == Wdirq::Wdirq0
251    }
252    #[doc = "Watchdog timeout interrupt has occurred"]
253    #[inline(always)]
254    pub fn is_wdirq1(&self) -> bool {
255        *self == Wdirq::Wdirq1
256    }
257}
258#[doc = "Field `WDIRQ` writer - Watchdog Timeout Interrupt Request"]
259pub type WdirqW<'a, REG> = crate::BitWriter1C<'a, REG, Wdirq>;
260impl<'a, REG> WdirqW<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "No Watchdog timeout interrupt has occurred"]
265    #[inline(always)]
266    pub fn wdirq0(self) -> &'a mut crate::W<REG> {
267        self.variant(Wdirq::Wdirq0)
268    }
269    #[doc = "Watchdog timeout interrupt has occurred"]
270    #[inline(always)]
271    pub fn wdirq1(self) -> &'a mut crate::W<REG> {
272        self.variant(Wdirq::Wdirq1)
273    }
274}
275#[doc = "Select Positive/Negative Edge of INDEX/PRESET Pulse\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum Xne {
279    #[doc = "0: Use positive edge of INDEX/PRESET pulse"]
280    Xne0 = 0,
281    #[doc = "1: Use negative edge of INDEX/PRESET pulse"]
282    Xne1 = 1,
283}
284impl From<Xne> for bool {
285    #[inline(always)]
286    fn from(variant: Xne) -> Self {
287        variant as u8 != 0
288    }
289}
290#[doc = "Field `XNE` reader - Select Positive/Negative Edge of INDEX/PRESET Pulse"]
291pub type XneR = crate::BitReader<Xne>;
292impl XneR {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub const fn variant(&self) -> Xne {
296        match self.bits {
297            false => Xne::Xne0,
298            true => Xne::Xne1,
299        }
300    }
301    #[doc = "Use positive edge of INDEX/PRESET pulse"]
302    #[inline(always)]
303    pub fn is_xne0(&self) -> bool {
304        *self == Xne::Xne0
305    }
306    #[doc = "Use negative edge of INDEX/PRESET pulse"]
307    #[inline(always)]
308    pub fn is_xne1(&self) -> bool {
309        *self == Xne::Xne1
310    }
311}
312#[doc = "Field `XNE` writer - Select Positive/Negative Edge of INDEX/PRESET Pulse"]
313pub type XneW<'a, REG> = crate::BitWriter<'a, REG, Xne>;
314impl<'a, REG> XneW<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317{
318    #[doc = "Use positive edge of INDEX/PRESET pulse"]
319    #[inline(always)]
320    pub fn xne0(self) -> &'a mut crate::W<REG> {
321        self.variant(Xne::Xne0)
322    }
323    #[doc = "Use negative edge of INDEX/PRESET pulse"]
324    #[inline(always)]
325    pub fn xne1(self) -> &'a mut crate::W<REG> {
326        self.variant(Xne::Xne1)
327    }
328}
329#[doc = "INDEX Triggered Initialization of Position Counters UPOS and LPOS\n\nValue on reset: 0"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum Xip {
333    #[doc = "0: INDEX pulse does not initialize the position counter"]
334    Xip0 = 0,
335    #[doc = "1: INDEX pulse initializes the position counter"]
336    Xip1 = 1,
337}
338impl From<Xip> for bool {
339    #[inline(always)]
340    fn from(variant: Xip) -> Self {
341        variant as u8 != 0
342    }
343}
344#[doc = "Field `XIP` reader - INDEX Triggered Initialization of Position Counters UPOS and LPOS"]
345pub type XipR = crate::BitReader<Xip>;
346impl XipR {
347    #[doc = "Get enumerated values variant"]
348    #[inline(always)]
349    pub const fn variant(&self) -> Xip {
350        match self.bits {
351            false => Xip::Xip0,
352            true => Xip::Xip1,
353        }
354    }
355    #[doc = "INDEX pulse does not initialize the position counter"]
356    #[inline(always)]
357    pub fn is_xip0(&self) -> bool {
358        *self == Xip::Xip0
359    }
360    #[doc = "INDEX pulse initializes the position counter"]
361    #[inline(always)]
362    pub fn is_xip1(&self) -> bool {
363        *self == Xip::Xip1
364    }
365}
366#[doc = "Field `XIP` writer - INDEX Triggered Initialization of Position Counters UPOS and LPOS"]
367pub type XipW<'a, REG> = crate::BitWriter<'a, REG, Xip>;
368impl<'a, REG> XipW<'a, REG>
369where
370    REG: crate::Writable + crate::RegisterSpec,
371{
372    #[doc = "INDEX pulse does not initialize the position counter"]
373    #[inline(always)]
374    pub fn xip0(self) -> &'a mut crate::W<REG> {
375        self.variant(Xip::Xip0)
376    }
377    #[doc = "INDEX pulse initializes the position counter"]
378    #[inline(always)]
379    pub fn xip1(self) -> &'a mut crate::W<REG> {
380        self.variant(Xip::Xip1)
381    }
382}
383#[doc = "INDEX/PRESET Pulse Interrupt Enable\n\nValue on reset: 0"]
384#[cfg_attr(feature = "defmt", derive(defmt::Format))]
385#[derive(Clone, Copy, Debug, PartialEq, Eq)]
386pub enum Xie {
387    #[doc = "0: Disabled"]
388    Xie0 = 0,
389    #[doc = "1: Enabled"]
390    Xie1 = 1,
391}
392impl From<Xie> for bool {
393    #[inline(always)]
394    fn from(variant: Xie) -> Self {
395        variant as u8 != 0
396    }
397}
398#[doc = "Field `XIE` reader - INDEX/PRESET Pulse Interrupt Enable"]
399pub type XieR = crate::BitReader<Xie>;
400impl XieR {
401    #[doc = "Get enumerated values variant"]
402    #[inline(always)]
403    pub const fn variant(&self) -> Xie {
404        match self.bits {
405            false => Xie::Xie0,
406            true => Xie::Xie1,
407        }
408    }
409    #[doc = "Disabled"]
410    #[inline(always)]
411    pub fn is_xie0(&self) -> bool {
412        *self == Xie::Xie0
413    }
414    #[doc = "Enabled"]
415    #[inline(always)]
416    pub fn is_xie1(&self) -> bool {
417        *self == Xie::Xie1
418    }
419}
420#[doc = "Field `XIE` writer - INDEX/PRESET Pulse Interrupt Enable"]
421pub type XieW<'a, REG> = crate::BitWriter<'a, REG, Xie>;
422impl<'a, REG> XieW<'a, REG>
423where
424    REG: crate::Writable + crate::RegisterSpec,
425{
426    #[doc = "Disabled"]
427    #[inline(always)]
428    pub fn xie0(self) -> &'a mut crate::W<REG> {
429        self.variant(Xie::Xie0)
430    }
431    #[doc = "Enabled"]
432    #[inline(always)]
433    pub fn xie1(self) -> &'a mut crate::W<REG> {
434        self.variant(Xie::Xie1)
435    }
436}
437#[doc = "INDEX/PRESET Pulse Interrupt Request\n\nValue on reset: 0"]
438#[cfg_attr(feature = "defmt", derive(defmt::Format))]
439#[derive(Clone, Copy, Debug, PartialEq, Eq)]
440pub enum Xirq {
441    #[doc = "0: INDEX/PRESET pulse has not occurred"]
442    Xirq0 = 0,
443    #[doc = "1: INDEX/PRESET pulse has occurred"]
444    Xirq1 = 1,
445}
446impl From<Xirq> for bool {
447    #[inline(always)]
448    fn from(variant: Xirq) -> Self {
449        variant as u8 != 0
450    }
451}
452#[doc = "Field `XIRQ` reader - INDEX/PRESET Pulse Interrupt Request"]
453pub type XirqR = crate::BitReader<Xirq>;
454impl XirqR {
455    #[doc = "Get enumerated values variant"]
456    #[inline(always)]
457    pub const fn variant(&self) -> Xirq {
458        match self.bits {
459            false => Xirq::Xirq0,
460            true => Xirq::Xirq1,
461        }
462    }
463    #[doc = "INDEX/PRESET pulse has not occurred"]
464    #[inline(always)]
465    pub fn is_xirq0(&self) -> bool {
466        *self == Xirq::Xirq0
467    }
468    #[doc = "INDEX/PRESET pulse has occurred"]
469    #[inline(always)]
470    pub fn is_xirq1(&self) -> bool {
471        *self == Xirq::Xirq1
472    }
473}
474#[doc = "Field `XIRQ` writer - INDEX/PRESET Pulse Interrupt Request"]
475pub type XirqW<'a, REG> = crate::BitWriter1C<'a, REG, Xirq>;
476impl<'a, REG> XirqW<'a, REG>
477where
478    REG: crate::Writable + crate::RegisterSpec,
479{
480    #[doc = "INDEX/PRESET pulse has not occurred"]
481    #[inline(always)]
482    pub fn xirq0(self) -> &'a mut crate::W<REG> {
483        self.variant(Xirq::Xirq0)
484    }
485    #[doc = "INDEX/PRESET pulse has occurred"]
486    #[inline(always)]
487    pub fn xirq1(self) -> &'a mut crate::W<REG> {
488        self.variant(Xirq::Xirq1)
489    }
490}
491#[doc = "Enable Single Phase Mode\n\nValue on reset: 0"]
492#[cfg_attr(feature = "defmt", derive(defmt::Format))]
493#[derive(Clone, Copy, Debug, PartialEq, Eq)]
494pub enum Ph1 {
495    #[doc = "0: Standard quadrature decoder, where PHASEA and PHASEB represent a two-phase quadrature signal."]
496    Ph10 = 0,
497    #[doc = "1: Single phase mode, bypass the quadrature decoder, refer to CTRL2\\[CMODE\\] description"]
498    Ph11 = 1,
499}
500impl From<Ph1> for bool {
501    #[inline(always)]
502    fn from(variant: Ph1) -> Self {
503        variant as u8 != 0
504    }
505}
506#[doc = "Field `PH1` reader - Enable Single Phase Mode"]
507pub type Ph1R = crate::BitReader<Ph1>;
508impl Ph1R {
509    #[doc = "Get enumerated values variant"]
510    #[inline(always)]
511    pub const fn variant(&self) -> Ph1 {
512        match self.bits {
513            false => Ph1::Ph10,
514            true => Ph1::Ph11,
515        }
516    }
517    #[doc = "Standard quadrature decoder, where PHASEA and PHASEB represent a two-phase quadrature signal."]
518    #[inline(always)]
519    pub fn is_ph10(&self) -> bool {
520        *self == Ph1::Ph10
521    }
522    #[doc = "Single phase mode, bypass the quadrature decoder, refer to CTRL2\\[CMODE\\] description"]
523    #[inline(always)]
524    pub fn is_ph11(&self) -> bool {
525        *self == Ph1::Ph11
526    }
527}
528#[doc = "Field `PH1` writer - Enable Single Phase Mode"]
529pub type Ph1W<'a, REG> = crate::BitWriter<'a, REG, Ph1>;
530impl<'a, REG> Ph1W<'a, REG>
531where
532    REG: crate::Writable + crate::RegisterSpec,
533{
534    #[doc = "Standard quadrature decoder, where PHASEA and PHASEB represent a two-phase quadrature signal."]
535    #[inline(always)]
536    pub fn ph10(self) -> &'a mut crate::W<REG> {
537        self.variant(Ph1::Ph10)
538    }
539    #[doc = "Single phase mode, bypass the quadrature decoder, refer to CTRL2\\[CMODE\\] description"]
540    #[inline(always)]
541    pub fn ph11(self) -> &'a mut crate::W<REG> {
542        self.variant(Ph1::Ph11)
543    }
544}
545#[doc = "Enable Reverse Direction Counting\n\nValue on reset: 0"]
546#[cfg_attr(feature = "defmt", derive(defmt::Format))]
547#[derive(Clone, Copy, Debug, PartialEq, Eq)]
548pub enum Rev {
549    #[doc = "0: Count normally and the position counter initialization uses upper/lower initialization register UINIT/LINIT"]
550    Rev0 = 0,
551    #[doc = "1: Count in the reverse direction and the position counter initialization uses upper/lower modulus register UMOD/LMOD"]
552    Rev1 = 1,
553}
554impl From<Rev> for bool {
555    #[inline(always)]
556    fn from(variant: Rev) -> Self {
557        variant as u8 != 0
558    }
559}
560#[doc = "Field `REV` reader - Enable Reverse Direction Counting"]
561pub type RevR = crate::BitReader<Rev>;
562impl RevR {
563    #[doc = "Get enumerated values variant"]
564    #[inline(always)]
565    pub const fn variant(&self) -> Rev {
566        match self.bits {
567            false => Rev::Rev0,
568            true => Rev::Rev1,
569        }
570    }
571    #[doc = "Count normally and the position counter initialization uses upper/lower initialization register UINIT/LINIT"]
572    #[inline(always)]
573    pub fn is_rev0(&self) -> bool {
574        *self == Rev::Rev0
575    }
576    #[doc = "Count in the reverse direction and the position counter initialization uses upper/lower modulus register UMOD/LMOD"]
577    #[inline(always)]
578    pub fn is_rev1(&self) -> bool {
579        *self == Rev::Rev1
580    }
581}
582#[doc = "Field `REV` writer - Enable Reverse Direction Counting"]
583pub type RevW<'a, REG> = crate::BitWriter<'a, REG, Rev>;
584impl<'a, REG> RevW<'a, REG>
585where
586    REG: crate::Writable + crate::RegisterSpec,
587{
588    #[doc = "Count normally and the position counter initialization uses upper/lower initialization register UINIT/LINIT"]
589    #[inline(always)]
590    pub fn rev0(self) -> &'a mut crate::W<REG> {
591        self.variant(Rev::Rev0)
592    }
593    #[doc = "Count in the reverse direction and the position counter initialization uses upper/lower modulus register UMOD/LMOD"]
594    #[inline(always)]
595    pub fn rev1(self) -> &'a mut crate::W<REG> {
596        self.variant(Rev::Rev1)
597    }
598}
599#[doc = "Software-Triggered Initialization of Position Counters UPOS and LPOS\n\nValue on reset: 0"]
600#[cfg_attr(feature = "defmt", derive(defmt::Format))]
601#[derive(Clone, Copy, Debug, PartialEq, Eq)]
602pub enum Swip {
603    #[doc = "0: No action"]
604    Swip0 = 0,
605    #[doc = "1: Initialize position counter"]
606    Swip1 = 1,
607}
608impl From<Swip> for bool {
609    #[inline(always)]
610    fn from(variant: Swip) -> Self {
611        variant as u8 != 0
612    }
613}
614#[doc = "Field `SWIP` reader - Software-Triggered Initialization of Position Counters UPOS and LPOS"]
615pub type SwipR = crate::BitReader<Swip>;
616impl SwipR {
617    #[doc = "Get enumerated values variant"]
618    #[inline(always)]
619    pub const fn variant(&self) -> Swip {
620        match self.bits {
621            false => Swip::Swip0,
622            true => Swip::Swip1,
623        }
624    }
625    #[doc = "No action"]
626    #[inline(always)]
627    pub fn is_swip0(&self) -> bool {
628        *self == Swip::Swip0
629    }
630    #[doc = "Initialize position counter"]
631    #[inline(always)]
632    pub fn is_swip1(&self) -> bool {
633        *self == Swip::Swip1
634    }
635}
636#[doc = "Field `SWIP` writer - Software-Triggered Initialization of Position Counters UPOS and LPOS"]
637pub type SwipW<'a, REG> = crate::BitWriter<'a, REG, Swip>;
638impl<'a, REG> SwipW<'a, REG>
639where
640    REG: crate::Writable + crate::RegisterSpec,
641{
642    #[doc = "No action"]
643    #[inline(always)]
644    pub fn swip0(self) -> &'a mut crate::W<REG> {
645        self.variant(Swip::Swip0)
646    }
647    #[doc = "Initialize position counter"]
648    #[inline(always)]
649    pub fn swip1(self) -> &'a mut crate::W<REG> {
650        self.variant(Swip::Swip1)
651    }
652}
653#[doc = "Use Negative Edge of HOME/ENABLE Input\n\nValue on reset: 0"]
654#[cfg_attr(feature = "defmt", derive(defmt::Format))]
655#[derive(Clone, Copy, Debug, PartialEq, Eq)]
656pub enum Hne {
657    #[doc = "0: When CTRL\\[OPMODE\\] = 0,use HOME positive edge to trigger initialization of position counters. When CTRL\\[OPMODE\\] = 1,use ENABLE high level to enable POS/POSD/WDG/REV counters"]
658    Hne0 = 0,
659    #[doc = "1: When CTRL\\[OPMODE\\] = 0,use HOME negative edge to trigger initialization of position counters. When CTRL\\[OPMODE\\] = 1,use ENABLE low level to enable POS/POSD/WDG/REV counters"]
660    Hne1 = 1,
661}
662impl From<Hne> for bool {
663    #[inline(always)]
664    fn from(variant: Hne) -> Self {
665        variant as u8 != 0
666    }
667}
668#[doc = "Field `HNE` reader - Use Negative Edge of HOME/ENABLE Input"]
669pub type HneR = crate::BitReader<Hne>;
670impl HneR {
671    #[doc = "Get enumerated values variant"]
672    #[inline(always)]
673    pub const fn variant(&self) -> Hne {
674        match self.bits {
675            false => Hne::Hne0,
676            true => Hne::Hne1,
677        }
678    }
679    #[doc = "When CTRL\\[OPMODE\\] = 0,use HOME positive edge to trigger initialization of position counters. When CTRL\\[OPMODE\\] = 1,use ENABLE high level to enable POS/POSD/WDG/REV counters"]
680    #[inline(always)]
681    pub fn is_hne0(&self) -> bool {
682        *self == Hne::Hne0
683    }
684    #[doc = "When CTRL\\[OPMODE\\] = 0,use HOME negative edge to trigger initialization of position counters. When CTRL\\[OPMODE\\] = 1,use ENABLE low level to enable POS/POSD/WDG/REV counters"]
685    #[inline(always)]
686    pub fn is_hne1(&self) -> bool {
687        *self == Hne::Hne1
688    }
689}
690#[doc = "Field `HNE` writer - Use Negative Edge of HOME/ENABLE Input"]
691pub type HneW<'a, REG> = crate::BitWriter<'a, REG, Hne>;
692impl<'a, REG> HneW<'a, REG>
693where
694    REG: crate::Writable + crate::RegisterSpec,
695{
696    #[doc = "When CTRL\\[OPMODE\\] = 0,use HOME positive edge to trigger initialization of position counters. When CTRL\\[OPMODE\\] = 1,use ENABLE high level to enable POS/POSD/WDG/REV counters"]
697    #[inline(always)]
698    pub fn hne0(self) -> &'a mut crate::W<REG> {
699        self.variant(Hne::Hne0)
700    }
701    #[doc = "When CTRL\\[OPMODE\\] = 0,use HOME negative edge to trigger initialization of position counters. When CTRL\\[OPMODE\\] = 1,use ENABLE low level to enable POS/POSD/WDG/REV counters"]
702    #[inline(always)]
703    pub fn hne1(self) -> &'a mut crate::W<REG> {
704        self.variant(Hne::Hne1)
705    }
706}
707#[doc = "Enable HOME to Initialize Position Counter UPOS/LPOS\n\nValue on reset: 0"]
708#[cfg_attr(feature = "defmt", derive(defmt::Format))]
709#[derive(Clone, Copy, Debug, PartialEq, Eq)]
710pub enum Hip {
711    #[doc = "0: No action"]
712    Hip0 = 0,
713    #[doc = "1: HOME signal initializes the position counter"]
714    Hip1 = 1,
715}
716impl From<Hip> for bool {
717    #[inline(always)]
718    fn from(variant: Hip) -> Self {
719        variant as u8 != 0
720    }
721}
722#[doc = "Field `HIP` reader - Enable HOME to Initialize Position Counter UPOS/LPOS"]
723pub type HipR = crate::BitReader<Hip>;
724impl HipR {
725    #[doc = "Get enumerated values variant"]
726    #[inline(always)]
727    pub const fn variant(&self) -> Hip {
728        match self.bits {
729            false => Hip::Hip0,
730            true => Hip::Hip1,
731        }
732    }
733    #[doc = "No action"]
734    #[inline(always)]
735    pub fn is_hip0(&self) -> bool {
736        *self == Hip::Hip0
737    }
738    #[doc = "HOME signal initializes the position counter"]
739    #[inline(always)]
740    pub fn is_hip1(&self) -> bool {
741        *self == Hip::Hip1
742    }
743}
744#[doc = "Field `HIP` writer - Enable HOME to Initialize Position Counter UPOS/LPOS"]
745pub type HipW<'a, REG> = crate::BitWriter<'a, REG, Hip>;
746impl<'a, REG> HipW<'a, REG>
747where
748    REG: crate::Writable + crate::RegisterSpec,
749{
750    #[doc = "No action"]
751    #[inline(always)]
752    pub fn hip0(self) -> &'a mut crate::W<REG> {
753        self.variant(Hip::Hip0)
754    }
755    #[doc = "HOME signal initializes the position counter"]
756    #[inline(always)]
757    pub fn hip1(self) -> &'a mut crate::W<REG> {
758        self.variant(Hip::Hip1)
759    }
760}
761#[doc = "HOME/ENABLE Interrupt Enable\n\nValue on reset: 0"]
762#[cfg_attr(feature = "defmt", derive(defmt::Format))]
763#[derive(Clone, Copy, Debug, PartialEq, Eq)]
764pub enum Hie {
765    #[doc = "0: Disabled"]
766    Hie0 = 0,
767    #[doc = "1: Enabled"]
768    Hie1 = 1,
769}
770impl From<Hie> for bool {
771    #[inline(always)]
772    fn from(variant: Hie) -> Self {
773        variant as u8 != 0
774    }
775}
776#[doc = "Field `HIE` reader - HOME/ENABLE Interrupt Enable"]
777pub type HieR = crate::BitReader<Hie>;
778impl HieR {
779    #[doc = "Get enumerated values variant"]
780    #[inline(always)]
781    pub const fn variant(&self) -> Hie {
782        match self.bits {
783            false => Hie::Hie0,
784            true => Hie::Hie1,
785        }
786    }
787    #[doc = "Disabled"]
788    #[inline(always)]
789    pub fn is_hie0(&self) -> bool {
790        *self == Hie::Hie0
791    }
792    #[doc = "Enabled"]
793    #[inline(always)]
794    pub fn is_hie1(&self) -> bool {
795        *self == Hie::Hie1
796    }
797}
798#[doc = "Field `HIE` writer - HOME/ENABLE Interrupt Enable"]
799pub type HieW<'a, REG> = crate::BitWriter<'a, REG, Hie>;
800impl<'a, REG> HieW<'a, REG>
801where
802    REG: crate::Writable + crate::RegisterSpec,
803{
804    #[doc = "Disabled"]
805    #[inline(always)]
806    pub fn hie0(self) -> &'a mut crate::W<REG> {
807        self.variant(Hie::Hie0)
808    }
809    #[doc = "Enabled"]
810    #[inline(always)]
811    pub fn hie1(self) -> &'a mut crate::W<REG> {
812        self.variant(Hie::Hie1)
813    }
814}
815#[doc = "HOME/ENABLE Signal Transition Interrupt Request\n\nValue on reset: 0"]
816#[cfg_attr(feature = "defmt", derive(defmt::Format))]
817#[derive(Clone, Copy, Debug, PartialEq, Eq)]
818pub enum Hirq {
819    #[doc = "0: No transition on the HOME/ENABLE signal has occurred"]
820    Hirq0 = 0,
821    #[doc = "1: A transition on the HOME/ENABLE signal has occurred"]
822    Hirq1 = 1,
823}
824impl From<Hirq> for bool {
825    #[inline(always)]
826    fn from(variant: Hirq) -> Self {
827        variant as u8 != 0
828    }
829}
830#[doc = "Field `HIRQ` reader - HOME/ENABLE Signal Transition Interrupt Request"]
831pub type HirqR = crate::BitReader<Hirq>;
832impl HirqR {
833    #[doc = "Get enumerated values variant"]
834    #[inline(always)]
835    pub const fn variant(&self) -> Hirq {
836        match self.bits {
837            false => Hirq::Hirq0,
838            true => Hirq::Hirq1,
839        }
840    }
841    #[doc = "No transition on the HOME/ENABLE signal has occurred"]
842    #[inline(always)]
843    pub fn is_hirq0(&self) -> bool {
844        *self == Hirq::Hirq0
845    }
846    #[doc = "A transition on the HOME/ENABLE signal has occurred"]
847    #[inline(always)]
848    pub fn is_hirq1(&self) -> bool {
849        *self == Hirq::Hirq1
850    }
851}
852#[doc = "Field `HIRQ` writer - HOME/ENABLE Signal Transition Interrupt Request"]
853pub type HirqW<'a, REG> = crate::BitWriter1C<'a, REG, Hirq>;
854impl<'a, REG> HirqW<'a, REG>
855where
856    REG: crate::Writable + crate::RegisterSpec,
857{
858    #[doc = "No transition on the HOME/ENABLE signal has occurred"]
859    #[inline(always)]
860    pub fn hirq0(self) -> &'a mut crate::W<REG> {
861        self.variant(Hirq::Hirq0)
862    }
863    #[doc = "A transition on the HOME/ENABLE signal has occurred"]
864    #[inline(always)]
865    pub fn hirq1(self) -> &'a mut crate::W<REG> {
866        self.variant(Hirq::Hirq1)
867    }
868}
869impl R {
870    #[doc = "Bit 0 - Load Okay"]
871    #[inline(always)]
872    pub fn ldok(&self) -> LdokR {
873        LdokR::new((self.bits & 1) != 0)
874    }
875    #[doc = "Bit 1 - DMA Enable"]
876    #[inline(always)]
877    pub fn dmaen(&self) -> DmaenR {
878        DmaenR::new(((self.bits >> 1) & 1) != 0)
879    }
880    #[doc = "Bit 2 - Watchdog Enable"]
881    #[inline(always)]
882    pub fn wde(&self) -> WdeR {
883        WdeR::new(((self.bits >> 2) & 1) != 0)
884    }
885    #[doc = "Bit 3 - Watchdog Timeout Interrupt Enable"]
886    #[inline(always)]
887    pub fn wdie(&self) -> WdieR {
888        WdieR::new(((self.bits >> 3) & 1) != 0)
889    }
890    #[doc = "Bit 4 - Watchdog Timeout Interrupt Request"]
891    #[inline(always)]
892    pub fn wdirq(&self) -> WdirqR {
893        WdirqR::new(((self.bits >> 4) & 1) != 0)
894    }
895    #[doc = "Bit 5 - Select Positive/Negative Edge of INDEX/PRESET Pulse"]
896    #[inline(always)]
897    pub fn xne(&self) -> XneR {
898        XneR::new(((self.bits >> 5) & 1) != 0)
899    }
900    #[doc = "Bit 6 - INDEX Triggered Initialization of Position Counters UPOS and LPOS"]
901    #[inline(always)]
902    pub fn xip(&self) -> XipR {
903        XipR::new(((self.bits >> 6) & 1) != 0)
904    }
905    #[doc = "Bit 7 - INDEX/PRESET Pulse Interrupt Enable"]
906    #[inline(always)]
907    pub fn xie(&self) -> XieR {
908        XieR::new(((self.bits >> 7) & 1) != 0)
909    }
910    #[doc = "Bit 8 - INDEX/PRESET Pulse Interrupt Request"]
911    #[inline(always)]
912    pub fn xirq(&self) -> XirqR {
913        XirqR::new(((self.bits >> 8) & 1) != 0)
914    }
915    #[doc = "Bit 9 - Enable Single Phase Mode"]
916    #[inline(always)]
917    pub fn ph1(&self) -> Ph1R {
918        Ph1R::new(((self.bits >> 9) & 1) != 0)
919    }
920    #[doc = "Bit 10 - Enable Reverse Direction Counting"]
921    #[inline(always)]
922    pub fn rev(&self) -> RevR {
923        RevR::new(((self.bits >> 10) & 1) != 0)
924    }
925    #[doc = "Bit 11 - Software-Triggered Initialization of Position Counters UPOS and LPOS"]
926    #[inline(always)]
927    pub fn swip(&self) -> SwipR {
928        SwipR::new(((self.bits >> 11) & 1) != 0)
929    }
930    #[doc = "Bit 12 - Use Negative Edge of HOME/ENABLE Input"]
931    #[inline(always)]
932    pub fn hne(&self) -> HneR {
933        HneR::new(((self.bits >> 12) & 1) != 0)
934    }
935    #[doc = "Bit 13 - Enable HOME to Initialize Position Counter UPOS/LPOS"]
936    #[inline(always)]
937    pub fn hip(&self) -> HipR {
938        HipR::new(((self.bits >> 13) & 1) != 0)
939    }
940    #[doc = "Bit 14 - HOME/ENABLE Interrupt Enable"]
941    #[inline(always)]
942    pub fn hie(&self) -> HieR {
943        HieR::new(((self.bits >> 14) & 1) != 0)
944    }
945    #[doc = "Bit 15 - HOME/ENABLE Signal Transition Interrupt Request"]
946    #[inline(always)]
947    pub fn hirq(&self) -> HirqR {
948        HirqR::new(((self.bits >> 15) & 1) != 0)
949    }
950}
951#[cfg(feature = "debug")]
952impl core::fmt::Debug for R {
953    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
954        f.debug_struct("CTRL")
955            .field("ldok", &self.ldok())
956            .field("dmaen", &self.dmaen())
957            .field("wde", &self.wde())
958            .field("wdie", &self.wdie())
959            .field("wdirq", &self.wdirq())
960            .field("xne", &self.xne())
961            .field("xip", &self.xip())
962            .field("xie", &self.xie())
963            .field("xirq", &self.xirq())
964            .field("ph1", &self.ph1())
965            .field("rev", &self.rev())
966            .field("swip", &self.swip())
967            .field("hne", &self.hne())
968            .field("hip", &self.hip())
969            .field("hie", &self.hie())
970            .field("hirq", &self.hirq())
971            .finish()
972    }
973}
974impl W {
975    #[doc = "Bit 0 - Load Okay"]
976    #[inline(always)]
977    pub fn ldok(&mut self) -> LdokW<'_, CtrlSpec> {
978        LdokW::new(self, 0)
979    }
980    #[doc = "Bit 1 - DMA Enable"]
981    #[inline(always)]
982    pub fn dmaen(&mut self) -> DmaenW<'_, CtrlSpec> {
983        DmaenW::new(self, 1)
984    }
985    #[doc = "Bit 2 - Watchdog Enable"]
986    #[inline(always)]
987    pub fn wde(&mut self) -> WdeW<'_, CtrlSpec> {
988        WdeW::new(self, 2)
989    }
990    #[doc = "Bit 3 - Watchdog Timeout Interrupt Enable"]
991    #[inline(always)]
992    pub fn wdie(&mut self) -> WdieW<'_, CtrlSpec> {
993        WdieW::new(self, 3)
994    }
995    #[doc = "Bit 4 - Watchdog Timeout Interrupt Request"]
996    #[inline(always)]
997    pub fn wdirq(&mut self) -> WdirqW<'_, CtrlSpec> {
998        WdirqW::new(self, 4)
999    }
1000    #[doc = "Bit 5 - Select Positive/Negative Edge of INDEX/PRESET Pulse"]
1001    #[inline(always)]
1002    pub fn xne(&mut self) -> XneW<'_, CtrlSpec> {
1003        XneW::new(self, 5)
1004    }
1005    #[doc = "Bit 6 - INDEX Triggered Initialization of Position Counters UPOS and LPOS"]
1006    #[inline(always)]
1007    pub fn xip(&mut self) -> XipW<'_, CtrlSpec> {
1008        XipW::new(self, 6)
1009    }
1010    #[doc = "Bit 7 - INDEX/PRESET Pulse Interrupt Enable"]
1011    #[inline(always)]
1012    pub fn xie(&mut self) -> XieW<'_, CtrlSpec> {
1013        XieW::new(self, 7)
1014    }
1015    #[doc = "Bit 8 - INDEX/PRESET Pulse Interrupt Request"]
1016    #[inline(always)]
1017    pub fn xirq(&mut self) -> XirqW<'_, CtrlSpec> {
1018        XirqW::new(self, 8)
1019    }
1020    #[doc = "Bit 9 - Enable Single Phase Mode"]
1021    #[inline(always)]
1022    pub fn ph1(&mut self) -> Ph1W<'_, CtrlSpec> {
1023        Ph1W::new(self, 9)
1024    }
1025    #[doc = "Bit 10 - Enable Reverse Direction Counting"]
1026    #[inline(always)]
1027    pub fn rev(&mut self) -> RevW<'_, CtrlSpec> {
1028        RevW::new(self, 10)
1029    }
1030    #[doc = "Bit 11 - Software-Triggered Initialization of Position Counters UPOS and LPOS"]
1031    #[inline(always)]
1032    pub fn swip(&mut self) -> SwipW<'_, CtrlSpec> {
1033        SwipW::new(self, 11)
1034    }
1035    #[doc = "Bit 12 - Use Negative Edge of HOME/ENABLE Input"]
1036    #[inline(always)]
1037    pub fn hne(&mut self) -> HneW<'_, CtrlSpec> {
1038        HneW::new(self, 12)
1039    }
1040    #[doc = "Bit 13 - Enable HOME to Initialize Position Counter UPOS/LPOS"]
1041    #[inline(always)]
1042    pub fn hip(&mut self) -> HipW<'_, CtrlSpec> {
1043        HipW::new(self, 13)
1044    }
1045    #[doc = "Bit 14 - HOME/ENABLE Interrupt Enable"]
1046    #[inline(always)]
1047    pub fn hie(&mut self) -> HieW<'_, CtrlSpec> {
1048        HieW::new(self, 14)
1049    }
1050    #[doc = "Bit 15 - HOME/ENABLE Signal Transition Interrupt Request"]
1051    #[inline(always)]
1052    pub fn hirq(&mut self) -> HirqW<'_, CtrlSpec> {
1053        HirqW::new(self, 15)
1054    }
1055}
1056#[doc = "Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
1057pub struct CtrlSpec;
1058impl crate::RegisterSpec for CtrlSpec {
1059    type Ux = u16;
1060}
1061#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"]
1062impl crate::Readable for CtrlSpec {}
1063#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"]
1064impl crate::Writable for CtrlSpec {
1065    type Safety = crate::Unsafe;
1066    const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0x8110;
1067}
1068#[doc = "`reset()` method sets CTRL to value 0"]
1069impl crate::Resettable for CtrlSpec {}
mcxa_pac/eqdc0/ctrl.rs

mcxa_pac/eqdc0/
ctrl.rs
