1#[doc = "Register `CSW` reader"]
2pub type R = crate::R<CswSpec>;
3#[doc = "Register `CSW` writer"]
4pub type W = crate::W<CswSpec>;
5#[doc = "Resynchronization Request\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum ResynchReq {
9 #[doc = "0: No request"]
10 NoRequest = 0,
11 #[doc = "1: Request for resynchronization"]
12 Request = 1,
13}
14impl From<ResynchReq> for bool {
15 #[inline(always)]
16 fn from(variant: ResynchReq) -> Self {
17 variant as u8 != 0
18 }
19}
20#[doc = "Field `RESYNCH_REQ` reader - Resynchronization Request"]
21pub type ResynchReqR = crate::BitReader<ResynchReq>;
22impl ResynchReqR {
23 #[doc = "Get enumerated values variant"]
24 #[inline(always)]
25 pub const fn variant(&self) -> ResynchReq {
26 match self.bits {
27 false => ResynchReq::NoRequest,
28 true => ResynchReq::Request,
29 }
30 }
31 #[doc = "No request"]
32 #[inline(always)]
33 pub fn is_no_request(&self) -> bool {
34 *self == ResynchReq::NoRequest
35 }
36 #[doc = "Request for resynchronization"]
37 #[inline(always)]
38 pub fn is_request(&self) -> bool {
39 *self == ResynchReq::Request
40 }
41}
42#[doc = "Field `RESYNCH_REQ` writer - Resynchronization Request"]
43pub type ResynchReqW<'a, REG> = crate::BitWriter<'a, REG, ResynchReq>;
44impl<'a, REG> ResynchReqW<'a, REG>
45where
46 REG: crate::Writable + crate::RegisterSpec,
47{
48 #[doc = "No request"]
49 #[inline(always)]
50 pub fn no_request(self) -> &'a mut crate::W<REG> {
51 self.variant(ResynchReq::NoRequest)
52 }
53 #[doc = "Request for resynchronization"]
54 #[inline(always)]
55 pub fn request(self) -> &'a mut crate::W<REG> {
56 self.variant(ResynchReq::Request)
57 }
58}
59#[doc = "Request Pending\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum ReqPending {
63 #[doc = "0: No request pending"]
64 NoRequestPending = 0,
65 #[doc = "1: Request for resynchronization pending"]
66 RequestPending = 1,
67}
68impl From<ReqPending> for bool {
69 #[inline(always)]
70 fn from(variant: ReqPending) -> Self {
71 variant as u8 != 0
72 }
73}
74#[doc = "Field `REQ_PENDING` reader - Request Pending"]
75pub type ReqPendingR = crate::BitReader<ReqPending>;
76impl ReqPendingR {
77 #[doc = "Get enumerated values variant"]
78 #[inline(always)]
79 pub const fn variant(&self) -> ReqPending {
80 match self.bits {
81 false => ReqPending::NoRequestPending,
82 true => ReqPending::RequestPending,
83 }
84 }
85 #[doc = "No request pending"]
86 #[inline(always)]
87 pub fn is_no_request_pending(&self) -> bool {
88 *self == ReqPending::NoRequestPending
89 }
90 #[doc = "Request for resynchronization pending"]
91 #[inline(always)]
92 pub fn is_request_pending(&self) -> bool {
93 *self == ReqPending::RequestPending
94 }
95}
96#[doc = "Field `REQ_PENDING` writer - Request Pending"]
97pub type ReqPendingW<'a, REG> = crate::BitWriter<'a, REG, ReqPending>;
98impl<'a, REG> ReqPendingW<'a, REG>
99where
100 REG: crate::Writable + crate::RegisterSpec,
101{
102 #[doc = "No request pending"]
103 #[inline(always)]
104 pub fn no_request_pending(self) -> &'a mut crate::W<REG> {
105 self.variant(ReqPending::NoRequestPending)
106 }
107 #[doc = "Request for resynchronization pending"]
108 #[inline(always)]
109 pub fn request_pending(self) -> &'a mut crate::W<REG> {
110 self.variant(ReqPending::RequestPending)
111 }
112}
113#[doc = "DBGMB Overrun Error\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum DbgOrErr {
117 #[doc = "0: No overrun"]
118 NoOverrunErr = 0,
119 #[doc = "1: Overrun occurred"]
120 OverrunErr = 1,
121}
122impl From<DbgOrErr> for bool {
123 #[inline(always)]
124 fn from(variant: DbgOrErr) -> Self {
125 variant as u8 != 0
126 }
127}
128#[doc = "Field `DBG_OR_ERR` reader - DBGMB Overrun Error"]
129pub type DbgOrErrR = crate::BitReader<DbgOrErr>;
130impl DbgOrErrR {
131 #[doc = "Get enumerated values variant"]
132 #[inline(always)]
133 pub const fn variant(&self) -> DbgOrErr {
134 match self.bits {
135 false => DbgOrErr::NoOverrunErr,
136 true => DbgOrErr::OverrunErr,
137 }
138 }
139 #[doc = "No overrun"]
140 #[inline(always)]
141 pub fn is_no_overrun_err(&self) -> bool {
142 *self == DbgOrErr::NoOverrunErr
143 }
144 #[doc = "Overrun occurred"]
145 #[inline(always)]
146 pub fn is_overrun_err(&self) -> bool {
147 *self == DbgOrErr::OverrunErr
148 }
149}
150#[doc = "Field `DBG_OR_ERR` writer - DBGMB Overrun Error"]
151pub type DbgOrErrW<'a, REG> = crate::BitWriter<'a, REG, DbgOrErr>;
152impl<'a, REG> DbgOrErrW<'a, REG>
153where
154 REG: crate::Writable + crate::RegisterSpec,
155{
156 #[doc = "No overrun"]
157 #[inline(always)]
158 pub fn no_overrun_err(self) -> &'a mut crate::W<REG> {
159 self.variant(DbgOrErr::NoOverrunErr)
160 }
161 #[doc = "Overrun occurred"]
162 #[inline(always)]
163 pub fn overrun_err(self) -> &'a mut crate::W<REG> {
164 self.variant(DbgOrErr::OverrunErr)
165 }
166}
167#[doc = "AHB Overrun Error\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum AhbOrErr {
171 #[doc = "0: No overrun"]
172 NoAhbOverrunErr = 0,
173 #[doc = "1: Overrun occurred"]
174 AhbOverrunErr = 1,
175}
176impl From<AhbOrErr> for bool {
177 #[inline(always)]
178 fn from(variant: AhbOrErr) -> Self {
179 variant as u8 != 0
180 }
181}
182#[doc = "Field `AHB_OR_ERR` reader - AHB Overrun Error"]
183pub type AhbOrErrR = crate::BitReader<AhbOrErr>;
184impl AhbOrErrR {
185 #[doc = "Get enumerated values variant"]
186 #[inline(always)]
187 pub const fn variant(&self) -> AhbOrErr {
188 match self.bits {
189 false => AhbOrErr::NoAhbOverrunErr,
190 true => AhbOrErr::AhbOverrunErr,
191 }
192 }
193 #[doc = "No overrun"]
194 #[inline(always)]
195 pub fn is_no_ahb_overrun_err(&self) -> bool {
196 *self == AhbOrErr::NoAhbOverrunErr
197 }
198 #[doc = "Overrun occurred"]
199 #[inline(always)]
200 pub fn is_ahb_overrun_err(&self) -> bool {
201 *self == AhbOrErr::AhbOverrunErr
202 }
203}
204#[doc = "Field `AHB_OR_ERR` writer - AHB Overrun Error"]
205pub type AhbOrErrW<'a, REG> = crate::BitWriter<'a, REG, AhbOrErr>;
206impl<'a, REG> AhbOrErrW<'a, REG>
207where
208 REG: crate::Writable + crate::RegisterSpec,
209{
210 #[doc = "No overrun"]
211 #[inline(always)]
212 pub fn no_ahb_overrun_err(self) -> &'a mut crate::W<REG> {
213 self.variant(AhbOrErr::NoAhbOverrunErr)
214 }
215 #[doc = "Overrun occurred"]
216 #[inline(always)]
217 pub fn ahb_overrun_err(self) -> &'a mut crate::W<REG> {
218 self.variant(AhbOrErr::AhbOverrunErr)
219 }
220}
221#[doc = "Soft Reset\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum SoftReset {
225 #[doc = "0: No effect"]
226 NoEff = 0,
227 #[doc = "1: Reset"]
228 Reset = 1,
229}
230impl From<SoftReset> for bool {
231 #[inline(always)]
232 fn from(variant: SoftReset) -> Self {
233 variant as u8 != 0
234 }
235}
236#[doc = "Field `SOFT_RESET` reader - Soft Reset"]
237pub type SoftResetR = crate::BitReader<SoftReset>;
238impl SoftResetR {
239 #[doc = "Get enumerated values variant"]
240 #[inline(always)]
241 pub const fn variant(&self) -> SoftReset {
242 match self.bits {
243 false => SoftReset::NoEff,
244 true => SoftReset::Reset,
245 }
246 }
247 #[doc = "No effect"]
248 #[inline(always)]
249 pub fn is_no_eff(&self) -> bool {
250 *self == SoftReset::NoEff
251 }
252 #[doc = "Reset"]
253 #[inline(always)]
254 pub fn is_reset(&self) -> bool {
255 *self == SoftReset::Reset
256 }
257}
258#[doc = "Field `SOFT_RESET` writer - Soft Reset"]
259pub type SoftResetW<'a, REG> = crate::BitWriter<'a, REG, SoftReset>;
260impl<'a, REG> SoftResetW<'a, REG>
261where
262 REG: crate::Writable + crate::RegisterSpec,
263{
264 #[doc = "No effect"]
265 #[inline(always)]
266 pub fn no_eff(self) -> &'a mut crate::W<REG> {
267 self.variant(SoftReset::NoEff)
268 }
269 #[doc = "Reset"]
270 #[inline(always)]
271 pub fn reset(self) -> &'a mut crate::W<REG> {
272 self.variant(SoftReset::Reset)
273 }
274}
275#[doc = "Chip Reset Request\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum ChipResetReq {
279 #[doc = "0: No effect"]
280 NoEff = 0,
281 #[doc = "1: Reset"]
282 Reset = 1,
283}
284impl From<ChipResetReq> for bool {
285 #[inline(always)]
286 fn from(variant: ChipResetReq) -> Self {
287 variant as u8 != 0
288 }
289}
290#[doc = "Field `CHIP_RESET_REQ` reader - Chip Reset Request"]
291pub type ChipResetReqR = crate::BitReader<ChipResetReq>;
292impl ChipResetReqR {
293 #[doc = "Get enumerated values variant"]
294 #[inline(always)]
295 pub const fn variant(&self) -> ChipResetReq {
296 match self.bits {
297 false => ChipResetReq::NoEff,
298 true => ChipResetReq::Reset,
299 }
300 }
301 #[doc = "No effect"]
302 #[inline(always)]
303 pub fn is_no_eff(&self) -> bool {
304 *self == ChipResetReq::NoEff
305 }
306 #[doc = "Reset"]
307 #[inline(always)]
308 pub fn is_reset(&self) -> bool {
309 *self == ChipResetReq::Reset
310 }
311}
312#[doc = "Field `CHIP_RESET_REQ` writer - Chip Reset Request"]
313pub type ChipResetReqW<'a, REG> = crate::BitWriter<'a, REG, ChipResetReq>;
314impl<'a, REG> ChipResetReqW<'a, REG>
315where
316 REG: crate::Writable + crate::RegisterSpec,
317{
318 #[doc = "No effect"]
319 #[inline(always)]
320 pub fn no_eff(self) -> &'a mut crate::W<REG> {
321 self.variant(ChipResetReq::NoEff)
322 }
323 #[doc = "Reset"]
324 #[inline(always)]
325 pub fn reset(self) -> &'a mut crate::W<REG> {
326 self.variant(ChipResetReq::Reset)
327 }
328}
329impl R {
330 #[doc = "Bit 0 - Resynchronization Request"]
331 #[inline(always)]
332 pub fn resynch_req(&self) -> ResynchReqR {
333 ResynchReqR::new((self.bits & 1) != 0)
334 }
335 #[doc = "Bit 1 - Request Pending"]
336 #[inline(always)]
337 pub fn req_pending(&self) -> ReqPendingR {
338 ReqPendingR::new(((self.bits >> 1) & 1) != 0)
339 }
340 #[doc = "Bit 2 - DBGMB Overrun Error"]
341 #[inline(always)]
342 pub fn dbg_or_err(&self) -> DbgOrErrR {
343 DbgOrErrR::new(((self.bits >> 2) & 1) != 0)
344 }
345 #[doc = "Bit 3 - AHB Overrun Error"]
346 #[inline(always)]
347 pub fn ahb_or_err(&self) -> AhbOrErrR {
348 AhbOrErrR::new(((self.bits >> 3) & 1) != 0)
349 }
350 #[doc = "Bit 4 - Soft Reset"]
351 #[inline(always)]
352 pub fn soft_reset(&self) -> SoftResetR {
353 SoftResetR::new(((self.bits >> 4) & 1) != 0)
354 }
355 #[doc = "Bit 5 - Chip Reset Request"]
356 #[inline(always)]
357 pub fn chip_reset_req(&self) -> ChipResetReqR {
358 ChipResetReqR::new(((self.bits >> 5) & 1) != 0)
359 }
360}
361#[cfg(feature = "debug")]
362impl core::fmt::Debug for R {
363 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
364 f.debug_struct("CSW")
365 .field("resynch_req", &self.resynch_req())
366 .field("req_pending", &self.req_pending())
367 .field("dbg_or_err", &self.dbg_or_err())
368 .field("ahb_or_err", &self.ahb_or_err())
369 .field("soft_reset", &self.soft_reset())
370 .field("chip_reset_req", &self.chip_reset_req())
371 .finish()
372 }
373}
374impl W {
375 #[doc = "Bit 0 - Resynchronization Request"]
376 #[inline(always)]
377 pub fn resynch_req(&mut self) -> ResynchReqW<'_, CswSpec> {
378 ResynchReqW::new(self, 0)
379 }
380 #[doc = "Bit 1 - Request Pending"]
381 #[inline(always)]
382 pub fn req_pending(&mut self) -> ReqPendingW<'_, CswSpec> {
383 ReqPendingW::new(self, 1)
384 }
385 #[doc = "Bit 2 - DBGMB Overrun Error"]
386 #[inline(always)]
387 pub fn dbg_or_err(&mut self) -> DbgOrErrW<'_, CswSpec> {
388 DbgOrErrW::new(self, 2)
389 }
390 #[doc = "Bit 3 - AHB Overrun Error"]
391 #[inline(always)]
392 pub fn ahb_or_err(&mut self) -> AhbOrErrW<'_, CswSpec> {
393 AhbOrErrW::new(self, 3)
394 }
395 #[doc = "Bit 4 - Soft Reset"]
396 #[inline(always)]
397 pub fn soft_reset(&mut self) -> SoftResetW<'_, CswSpec> {
398 SoftResetW::new(self, 4)
399 }
400 #[doc = "Bit 5 - Chip Reset Request"]
401 #[inline(always)]
402 pub fn chip_reset_req(&mut self) -> ChipResetReqW<'_, CswSpec> {
403 ChipResetReqW::new(self, 5)
404 }
405}
406#[doc = "Command and Status Word\n\nYou can [`read`](crate::Reg::read) this register and get [`csw::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csw::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
407pub struct CswSpec;
408impl crate::RegisterSpec for CswSpec {
409 type Ux = u32;
410}
411#[doc = "`read()` method returns [`csw::R`](R) reader structure"]
412impl crate::Readable for CswSpec {}
413#[doc = "`write(|w| ..)` method takes [`csw::W`](W) writer structure"]
414impl crate::Writable for CswSpec {
415 type Safety = crate::Unsafe;
416}
417#[doc = "`reset()` method sets CSW to value 0"]
418impl crate::Resettable for CswSpec {}