mcxa_pac/usb0/
usbtrc0.rs

1#[doc = "Register `USBTRC0` reader"]
2pub type R = crate::R<Usbtrc0Spec>;
3#[doc = "Register `USBTRC0` writer"]
4pub type W = crate::W<Usbtrc0Spec>;
5#[doc = "USB Asynchronous Interrupt\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum UsbResumeInt {
9    #[doc = "0: Not generated"]
10    NoAsyncInt = 0,
11    #[doc = "1: Generated because of the USB asynchronous interrupt"]
12    SyncIntGenerated = 1,
13}
14impl From<UsbResumeInt> for bool {
15    #[inline(always)]
16    fn from(variant: UsbResumeInt) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `USB_RESUME_INT` reader - USB Asynchronous Interrupt"]
21pub type UsbResumeIntR = crate::BitReader<UsbResumeInt>;
22impl UsbResumeIntR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> UsbResumeInt {
26        match self.bits {
27            false => UsbResumeInt::NoAsyncInt,
28            true => UsbResumeInt::SyncIntGenerated,
29        }
30    }
31    #[doc = "Not generated"]
32    #[inline(always)]
33    pub fn is_no_async_int(&self) -> bool {
34        *self == UsbResumeInt::NoAsyncInt
35    }
36    #[doc = "Generated because of the USB asynchronous interrupt"]
37    #[inline(always)]
38    pub fn is_sync_int_generated(&self) -> bool {
39        *self == UsbResumeInt::SyncIntGenerated
40    }
41}
42#[doc = "Synchronous USB Interrupt Detect\n\nValue on reset: 0"]
43#[cfg_attr(feature = "defmt", derive(defmt::Format))]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45pub enum SyncDet {
46    #[doc = "0: Not detected"]
47    NoSyncInt = 0,
48    #[doc = "1: Detected"]
49    SyncIntDetected = 1,
50}
51impl From<SyncDet> for bool {
52    #[inline(always)]
53    fn from(variant: SyncDet) -> Self {
54        variant as u8 != 0
55    }
56}
57#[doc = "Field `SYNC_DET` reader - Synchronous USB Interrupt Detect"]
58pub type SyncDetR = crate::BitReader<SyncDet>;
59impl SyncDetR {
60    #[doc = "Get enumerated values variant"]
61    #[inline(always)]
62    pub const fn variant(&self) -> SyncDet {
63        match self.bits {
64            false => SyncDet::NoSyncInt,
65            true => SyncDet::SyncIntDetected,
66        }
67    }
68    #[doc = "Not detected"]
69    #[inline(always)]
70    pub fn is_no_sync_int(&self) -> bool {
71        *self == SyncDet::NoSyncInt
72    }
73    #[doc = "Detected"]
74    #[inline(always)]
75    pub fn is_sync_int_detected(&self) -> bool {
76        *self == SyncDet::SyncIntDetected
77    }
78}
79#[doc = "Field `USB_CLK_RECOVERY_INT` reader - Combined USB Clock Recovery interrupt status"]
80pub type UsbClkRecoveryIntR = crate::BitReader;
81#[doc = "VREGIN Rising Edge Interrupt Detect\n\nValue on reset: 0"]
82#[cfg_attr(feature = "defmt", derive(defmt::Format))]
83#[derive(Clone, Copy, Debug, PartialEq, Eq)]
84pub enum VredgDet {
85    #[doc = "0: Not detected"]
86    NoVregReInt = 0,
87    #[doc = "1: Detected"]
88    VregReIntDetected = 1,
89}
90impl From<VredgDet> for bool {
91    #[inline(always)]
92    fn from(variant: VredgDet) -> Self {
93        variant as u8 != 0
94    }
95}
96#[doc = "Field `VREDG_DET` reader - VREGIN Rising Edge Interrupt Detect"]
97pub type VredgDetR = crate::BitReader<VredgDet>;
98impl VredgDetR {
99    #[doc = "Get enumerated values variant"]
100    #[inline(always)]
101    pub const fn variant(&self) -> VredgDet {
102        match self.bits {
103            false => VredgDet::NoVregReInt,
104            true => VredgDet::VregReIntDetected,
105        }
106    }
107    #[doc = "Not detected"]
108    #[inline(always)]
109    pub fn is_no_vreg_re_int(&self) -> bool {
110        *self == VredgDet::NoVregReInt
111    }
112    #[doc = "Detected"]
113    #[inline(always)]
114    pub fn is_vreg_re_int_detected(&self) -> bool {
115        *self == VredgDet::VregReIntDetected
116    }
117}
118#[doc = "VREGIN Falling Edge Interrupt Detect\n\nValue on reset: 0"]
119#[cfg_attr(feature = "defmt", derive(defmt::Format))]
120#[derive(Clone, Copy, Debug, PartialEq, Eq)]
121pub enum VfedgDet {
122    #[doc = "0: Not detected"]
123    NoVregFeInt = 0,
124    #[doc = "1: Detected"]
125    VregFeIntDetected = 1,
126}
127impl From<VfedgDet> for bool {
128    #[inline(always)]
129    fn from(variant: VfedgDet) -> Self {
130        variant as u8 != 0
131    }
132}
133#[doc = "Field `VFEDG_DET` reader - VREGIN Falling Edge Interrupt Detect"]
134pub type VfedgDetR = crate::BitReader<VfedgDet>;
135impl VfedgDetR {
136    #[doc = "Get enumerated values variant"]
137    #[inline(always)]
138    pub const fn variant(&self) -> VfedgDet {
139        match self.bits {
140            false => VfedgDet::NoVregFeInt,
141            true => VfedgDet::VregFeIntDetected,
142        }
143    }
144    #[doc = "Not detected"]
145    #[inline(always)]
146    pub fn is_no_vreg_fe_int(&self) -> bool {
147        *self == VfedgDet::NoVregFeInt
148    }
149    #[doc = "Detected"]
150    #[inline(always)]
151    pub fn is_vreg_fe_int_detected(&self) -> bool {
152        *self == VfedgDet::VregFeIntDetected
153    }
154}
155#[doc = "Asynchronous Resume Interrupt Enable\n\nValue on reset: 0"]
156#[cfg_attr(feature = "defmt", derive(defmt::Format))]
157#[derive(Clone, Copy, Debug, PartialEq, Eq)]
158pub enum Usbresmen {
159    #[doc = "0: Disable"]
160    DisAsyncWakeup = 0,
161    #[doc = "1: Enable"]
162    EnAsyncWakeup = 1,
163}
164impl From<Usbresmen> for bool {
165    #[inline(always)]
166    fn from(variant: Usbresmen) -> Self {
167        variant as u8 != 0
168    }
169}
170#[doc = "Field `USBRESMEN` reader - Asynchronous Resume Interrupt Enable"]
171pub type UsbresmenR = crate::BitReader<Usbresmen>;
172impl UsbresmenR {
173    #[doc = "Get enumerated values variant"]
174    #[inline(always)]
175    pub const fn variant(&self) -> Usbresmen {
176        match self.bits {
177            false => Usbresmen::DisAsyncWakeup,
178            true => Usbresmen::EnAsyncWakeup,
179        }
180    }
181    #[doc = "Disable"]
182    #[inline(always)]
183    pub fn is_dis_async_wakeup(&self) -> bool {
184        *self == Usbresmen::DisAsyncWakeup
185    }
186    #[doc = "Enable"]
187    #[inline(always)]
188    pub fn is_en_async_wakeup(&self) -> bool {
189        *self == Usbresmen::EnAsyncWakeup
190    }
191}
192#[doc = "Field `USBRESMEN` writer - Asynchronous Resume Interrupt Enable"]
193pub type UsbresmenW<'a, REG> = crate::BitWriter<'a, REG, Usbresmen>;
194impl<'a, REG> UsbresmenW<'a, REG>
195where
196    REG: crate::Writable + crate::RegisterSpec,
197{
198    #[doc = "Disable"]
199    #[inline(always)]
200    pub fn dis_async_wakeup(self) -> &'a mut crate::W<REG> {
201        self.variant(Usbresmen::DisAsyncWakeup)
202    }
203    #[doc = "Enable"]
204    #[inline(always)]
205    pub fn en_async_wakeup(self) -> &'a mut crate::W<REG> {
206        self.variant(Usbresmen::EnAsyncWakeup)
207    }
208}
209#[doc = "Field `VREGIN_STS` reader - VREGIN Status"]
210pub type VreginStsR = crate::BitReader;
211#[doc = "USB Reset\n\nValue on reset: 0"]
212#[cfg_attr(feature = "defmt", derive(defmt::Format))]
213#[derive(Clone, Copy, Debug, PartialEq, Eq)]
214pub enum Usbreset {
215    #[doc = "0: Normal USBFS operation"]
216    NormalOperation = 0,
217    #[doc = "1: Returns USBFS to its reset state"]
218    ForceHardReset = 1,
219}
220impl From<Usbreset> for bool {
221    #[inline(always)]
222    fn from(variant: Usbreset) -> Self {
223        variant as u8 != 0
224    }
225}
226#[doc = "Field `USBRESET` writer - USB Reset"]
227pub type UsbresetW<'a, REG> = crate::BitWriter<'a, REG, Usbreset>;
228impl<'a, REG> UsbresetW<'a, REG>
229where
230    REG: crate::Writable + crate::RegisterSpec,
231{
232    #[doc = "Normal USBFS operation"]
233    #[inline(always)]
234    pub fn normal_operation(self) -> &'a mut crate::W<REG> {
235        self.variant(Usbreset::NormalOperation)
236    }
237    #[doc = "Returns USBFS to its reset state"]
238    #[inline(always)]
239    pub fn force_hard_reset(self) -> &'a mut crate::W<REG> {
240        self.variant(Usbreset::ForceHardReset)
241    }
242}
243impl R {
244    #[doc = "Bit 0 - USB Asynchronous Interrupt"]
245    #[inline(always)]
246    pub fn usb_resume_int(&self) -> UsbResumeIntR {
247        UsbResumeIntR::new((self.bits & 1) != 0)
248    }
249    #[doc = "Bit 1 - Synchronous USB Interrupt Detect"]
250    #[inline(always)]
251    pub fn sync_det(&self) -> SyncDetR {
252        SyncDetR::new(((self.bits >> 1) & 1) != 0)
253    }
254    #[doc = "Bit 2 - Combined USB Clock Recovery interrupt status"]
255    #[inline(always)]
256    pub fn usb_clk_recovery_int(&self) -> UsbClkRecoveryIntR {
257        UsbClkRecoveryIntR::new(((self.bits >> 2) & 1) != 0)
258    }
259    #[doc = "Bit 3 - VREGIN Rising Edge Interrupt Detect"]
260    #[inline(always)]
261    pub fn vredg_det(&self) -> VredgDetR {
262        VredgDetR::new(((self.bits >> 3) & 1) != 0)
263    }
264    #[doc = "Bit 4 - VREGIN Falling Edge Interrupt Detect"]
265    #[inline(always)]
266    pub fn vfedg_det(&self) -> VfedgDetR {
267        VfedgDetR::new(((self.bits >> 4) & 1) != 0)
268    }
269    #[doc = "Bit 5 - Asynchronous Resume Interrupt Enable"]
270    #[inline(always)]
271    pub fn usbresmen(&self) -> UsbresmenR {
272        UsbresmenR::new(((self.bits >> 5) & 1) != 0)
273    }
274    #[doc = "Bit 6 - VREGIN Status"]
275    #[inline(always)]
276    pub fn vregin_sts(&self) -> VreginStsR {
277        VreginStsR::new(((self.bits >> 6) & 1) != 0)
278    }
279}
280#[cfg(feature = "debug")]
281impl core::fmt::Debug for R {
282    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
283        f.debug_struct("USBTRC0")
284            .field("usb_resume_int", &self.usb_resume_int())
285            .field("sync_det", &self.sync_det())
286            .field("usb_clk_recovery_int", &self.usb_clk_recovery_int())
287            .field("vredg_det", &self.vredg_det())
288            .field("vfedg_det", &self.vfedg_det())
289            .field("usbresmen", &self.usbresmen())
290            .field("vregin_sts", &self.vregin_sts())
291            .finish()
292    }
293}
294impl W {
295    #[doc = "Bit 5 - Asynchronous Resume Interrupt Enable"]
296    #[inline(always)]
297    pub fn usbresmen(&mut self) -> UsbresmenW<'_, Usbtrc0Spec> {
298        UsbresmenW::new(self, 5)
299    }
300    #[doc = "Bit 7 - USB Reset"]
301    #[inline(always)]
302    pub fn usbreset(&mut self) -> UsbresetW<'_, Usbtrc0Spec> {
303        UsbresetW::new(self, 7)
304    }
305}
306#[doc = "USB Transceiver Control 0\n\nYou can [`read`](crate::Reg::read) this register and get [`usbtrc0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usbtrc0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
307pub struct Usbtrc0Spec;
308impl crate::RegisterSpec for Usbtrc0Spec {
309    type Ux = u8;
310}
311#[doc = "`read()` method returns [`usbtrc0::R`](R) reader structure"]
312impl crate::Readable for Usbtrc0Spec {}
313#[doc = "`write(|w| ..)` method takes [`usbtrc0::W`](W) writer structure"]
314impl crate::Writable for Usbtrc0Spec {
315    type Safety = crate::Unsafe;
316}
317#[doc = "`reset()` method sets USBTRC0 to value 0"]
318impl crate::Resettable for Usbtrc0Spec {}
mcxa_pac/usb0/usbtrc0.rs

mcxa_pac/usb0/
usbtrc0.rs
