1#[doc = "Register `CSCLR` writer"]
2pub type W = crate::W<CsclrSpec>;
3#[doc = "Redundant Signals error/fault Detected\n\nValue on reset: 0"]
4#[cfg_attr(feature = "defmt", derive(defmt::Format))]
5#[derive(Clone, Copy, Debug, PartialEq, Eq)]
6pub enum RedSigsClr {
7 #[doc = "0: No effect, ignored"]
8 RedSigsNoeffect = 0,
9 #[doc = "1: Clears the CSER\\[RED_SIGS\\] bit."]
10 RedSigsClear = 1,
11}
12impl From<RedSigsClr> for bool {
13 #[inline(always)]
14 fn from(variant: RedSigsClr) -> Self {
15 variant as u8 != 0
16 }
17}
18#[doc = "Field `RED_SIGS_CLR` writer - Redundant Signals error/fault Detected"]
19pub type RedSigsClrW<'a, REG> = crate::BitWriter<'a, REG, RedSigsClr>;
20impl<'a, REG> RedSigsClrW<'a, REG>
21where
22 REG: crate::Writable + crate::RegisterSpec,
23{
24 #[doc = "No effect, ignored"]
25 #[inline(always)]
26 pub fn red_sigs_noeffect(self) -> &'a mut crate::W<REG> {
27 self.variant(RedSigsClr::RedSigsNoeffect)
28 }
29 #[doc = "Clears the CSER\\[RED_SIGS\\] bit."]
30 #[inline(always)]
31 pub fn red_sigs_clear(self) -> &'a mut crate::W<REG> {
32 self.variant(RedSigsClr::RedSigsClear)
33 }
34}
35#[doc = "Read only: Redundant FSM error/fault detected\n\nValue on reset: 0"]
36#[cfg_attr(feature = "defmt", derive(defmt::Format))]
37#[derive(Clone, Copy, Debug, PartialEq, Eq)]
38pub enum RedFsmClr {
39 #[doc = "0: No effect, ignored"]
40 RedFsmNoeffect = 0,
41 #[doc = "1: Clears the CSER\\[RED_FSM\\] bit."]
42 RedFsmClear = 1,
43}
44impl From<RedFsmClr> for bool {
45 #[inline(always)]
46 fn from(variant: RedFsmClr) -> Self {
47 variant as u8 != 0
48 }
49}
50#[doc = "Field `RED_FSM_CLR` writer - Read only: Redundant FSM error/fault detected"]
51pub type RedFsmClrW<'a, REG> = crate::BitWriter<'a, REG, RedFsmClr>;
52impl<'a, REG> RedFsmClrW<'a, REG>
53where
54 REG: crate::Writable + crate::RegisterSpec,
55{
56 #[doc = "No effect, ignored"]
57 #[inline(always)]
58 pub fn red_fsm_noeffect(self) -> &'a mut crate::W<REG> {
59 self.variant(RedFsmClr::RedFsmNoeffect)
60 }
61 #[doc = "Clears the CSER\\[RED_FSM\\] bit."]
62 #[inline(always)]
63 pub fn red_fsm_clear(self) -> &'a mut crate::W<REG> {
64 self.variant(RedFsmClr::RedFsmClear)
65 }
66}
67#[doc = "Read only: Local-EDC error/fault detected\n\nValue on reset: 0"]
68#[cfg_attr(feature = "defmt", derive(defmt::Format))]
69#[derive(Clone, Copy, Debug, PartialEq, Eq)]
70pub enum LocalEdcClr {
71 #[doc = "0: No effect, ignored"]
72 LocalEdcNoeffect = 0,
73 #[doc = "1: Clears the CSER\\[LOCAL_EDC\\] bit."]
74 LocalEdcClear = 1,
75}
76impl From<LocalEdcClr> for bool {
77 #[inline(always)]
78 fn from(variant: LocalEdcClr) -> Self {
79 variant as u8 != 0
80 }
81}
82#[doc = "Field `LOCAL_EDC_CLR` writer - Read only: Local-EDC error/fault detected"]
83pub type LocalEdcClrW<'a, REG> = crate::BitWriter<'a, REG, LocalEdcClr>;
84impl<'a, REG> LocalEdcClrW<'a, REG>
85where
86 REG: crate::Writable + crate::RegisterSpec,
87{
88 #[doc = "No effect, ignored"]
89 #[inline(always)]
90 pub fn local_edc_noeffect(self) -> &'a mut crate::W<REG> {
91 self.variant(LocalEdcClr::LocalEdcNoeffect)
92 }
93 #[doc = "Clears the CSER\\[LOCAL_EDC\\] bit."]
94 #[inline(always)]
95 pub fn local_edc_clear(self) -> &'a mut crate::W<REG> {
96 self.variant(LocalEdcClr::LocalEdcClear)
97 }
98}
99#[doc = "Read only: Bus-EDC error/fault detected\n\nValue on reset: 0"]
100#[cfg_attr(feature = "defmt", derive(defmt::Format))]
101#[derive(Clone, Copy, Debug, PartialEq, Eq)]
102pub enum BusEdcClr {
103 #[doc = "0: No effect, ignored"]
104 BusEdcNoeffect = 0,
105 #[doc = "1: Clears the CSER\\[BUS_EDC\\] bit."]
106 BusEdcClear = 1,
107}
108impl From<BusEdcClr> for bool {
109 #[inline(always)]
110 fn from(variant: BusEdcClr) -> Self {
111 variant as u8 != 0
112 }
113}
114#[doc = "Field `BUS_EDC_CLR` writer - Read only: Bus-EDC error/fault detected"]
115pub type BusEdcClrW<'a, REG> = crate::BitWriter<'a, REG, BusEdcClr>;
116impl<'a, REG> BusEdcClrW<'a, REG>
117where
118 REG: crate::Writable + crate::RegisterSpec,
119{
120 #[doc = "No effect, ignored"]
121 #[inline(always)]
122 pub fn bus_edc_noeffect(self) -> &'a mut crate::W<REG> {
123 self.variant(BusEdcClr::BusEdcNoeffect)
124 }
125 #[doc = "Clears the CSER\\[BUS_EDC\\] bit."]
126 #[inline(always)]
127 pub fn bus_edc_clear(self) -> &'a mut crate::W<REG> {
128 self.variant(BusEdcClr::BusEdcClear)
129 }
130}
131#[cfg(feature = "debug")]
132impl core::fmt::Debug for crate::generic::Reg<CsclrSpec> {
133 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
134 write!(f, "(not readable)")
135 }
136}
137impl W {
138 #[doc = "Bit 0 - Redundant Signals error/fault Detected"]
139 #[inline(always)]
140 pub fn red_sigs_clr(&mut self) -> RedSigsClrW<'_, CsclrSpec> {
141 RedSigsClrW::new(self, 0)
142 }
143 #[doc = "Bit 1 - Read only: Redundant FSM error/fault detected"]
144 #[inline(always)]
145 pub fn red_fsm_clr(&mut self) -> RedFsmClrW<'_, CsclrSpec> {
146 RedFsmClrW::new(self, 1)
147 }
148 #[doc = "Bit 2 - Read only: Local-EDC error/fault detected"]
149 #[inline(always)]
150 pub fn local_edc_clr(&mut self) -> LocalEdcClrW<'_, CsclrSpec> {
151 LocalEdcClrW::new(self, 2)
152 }
153 #[doc = "Bit 3 - Read only: Bus-EDC error/fault detected"]
154 #[inline(always)]
155 pub fn bus_edc_clr(&mut self) -> BusEdcClrW<'_, CsclrSpec> {
156 BusEdcClrW::new(self, 3)
157 }
158}
159#[doc = "Common Security Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
160pub struct CsclrSpec;
161impl crate::RegisterSpec for CsclrSpec {
162 type Ux = u32;
163}
164#[doc = "`write(|w| ..)` method takes [`csclr::W`](W) writer structure"]
165impl crate::Writable for CsclrSpec {
166 type Safety = crate::Unsafe;
167}
168#[doc = "`reset()` method sets CSCLR to value 0"]
169impl crate::Resettable for CsclrSpec {}