1#[doc = "Register `CTIMERGLOBALSTARTEN` reader"]
2pub type R = crate::R<CtimerglobalstartenSpec>;
3#[doc = "Register `CTIMERGLOBALSTARTEN` writer"]
4pub type W = crate::W<CtimerglobalstartenSpec>;
5#[doc = "Enables the CTIMER0 function clock\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Ctimer0ClkEn {
9 #[doc = "0: Disable"]
10 Disable = 0,
11 #[doc = "1: Enable"]
12 Enable = 1,
13}
14impl From<Ctimer0ClkEn> for bool {
15 #[inline(always)]
16 fn from(variant: Ctimer0ClkEn) -> Self {
17 variant as u8 != 0
18 }
19}
20#[doc = "Field `CTIMER0_CLK_EN` reader - Enables the CTIMER0 function clock"]
21pub type Ctimer0ClkEnR = crate::BitReader<Ctimer0ClkEn>;
22impl Ctimer0ClkEnR {
23 #[doc = "Get enumerated values variant"]
24 #[inline(always)]
25 pub const fn variant(&self) -> Ctimer0ClkEn {
26 match self.bits {
27 false => Ctimer0ClkEn::Disable,
28 true => Ctimer0ClkEn::Enable,
29 }
30 }
31 #[doc = "Disable"]
32 #[inline(always)]
33 pub fn is_disable(&self) -> bool {
34 *self == Ctimer0ClkEn::Disable
35 }
36 #[doc = "Enable"]
37 #[inline(always)]
38 pub fn is_enable(&self) -> bool {
39 *self == Ctimer0ClkEn::Enable
40 }
41}
42#[doc = "Field `CTIMER0_CLK_EN` writer - Enables the CTIMER0 function clock"]
43pub type Ctimer0ClkEnW<'a, REG> = crate::BitWriter<'a, REG, Ctimer0ClkEn>;
44impl<'a, REG> Ctimer0ClkEnW<'a, REG>
45where
46 REG: crate::Writable + crate::RegisterSpec,
47{
48 #[doc = "Disable"]
49 #[inline(always)]
50 pub fn disable(self) -> &'a mut crate::W<REG> {
51 self.variant(Ctimer0ClkEn::Disable)
52 }
53 #[doc = "Enable"]
54 #[inline(always)]
55 pub fn enable(self) -> &'a mut crate::W<REG> {
56 self.variant(Ctimer0ClkEn::Enable)
57 }
58}
59#[doc = "Enables the CTIMER1 function clock\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Ctimer1ClkEn {
63 #[doc = "0: Disable"]
64 Disable = 0,
65 #[doc = "1: Enable"]
66 Enable = 1,
67}
68impl From<Ctimer1ClkEn> for bool {
69 #[inline(always)]
70 fn from(variant: Ctimer1ClkEn) -> Self {
71 variant as u8 != 0
72 }
73}
74#[doc = "Field `CTIMER1_CLK_EN` reader - Enables the CTIMER1 function clock"]
75pub type Ctimer1ClkEnR = crate::BitReader<Ctimer1ClkEn>;
76impl Ctimer1ClkEnR {
77 #[doc = "Get enumerated values variant"]
78 #[inline(always)]
79 pub const fn variant(&self) -> Ctimer1ClkEn {
80 match self.bits {
81 false => Ctimer1ClkEn::Disable,
82 true => Ctimer1ClkEn::Enable,
83 }
84 }
85 #[doc = "Disable"]
86 #[inline(always)]
87 pub fn is_disable(&self) -> bool {
88 *self == Ctimer1ClkEn::Disable
89 }
90 #[doc = "Enable"]
91 #[inline(always)]
92 pub fn is_enable(&self) -> bool {
93 *self == Ctimer1ClkEn::Enable
94 }
95}
96#[doc = "Field `CTIMER1_CLK_EN` writer - Enables the CTIMER1 function clock"]
97pub type Ctimer1ClkEnW<'a, REG> = crate::BitWriter<'a, REG, Ctimer1ClkEn>;
98impl<'a, REG> Ctimer1ClkEnW<'a, REG>
99where
100 REG: crate::Writable + crate::RegisterSpec,
101{
102 #[doc = "Disable"]
103 #[inline(always)]
104 pub fn disable(self) -> &'a mut crate::W<REG> {
105 self.variant(Ctimer1ClkEn::Disable)
106 }
107 #[doc = "Enable"]
108 #[inline(always)]
109 pub fn enable(self) -> &'a mut crate::W<REG> {
110 self.variant(Ctimer1ClkEn::Enable)
111 }
112}
113#[doc = "Enables the CTIMER2 function clock\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Ctimer2ClkEn {
117 #[doc = "0: Disable"]
118 Disable = 0,
119 #[doc = "1: Enable"]
120 Enable = 1,
121}
122impl From<Ctimer2ClkEn> for bool {
123 #[inline(always)]
124 fn from(variant: Ctimer2ClkEn) -> Self {
125 variant as u8 != 0
126 }
127}
128#[doc = "Field `CTIMER2_CLK_EN` reader - Enables the CTIMER2 function clock"]
129pub type Ctimer2ClkEnR = crate::BitReader<Ctimer2ClkEn>;
130impl Ctimer2ClkEnR {
131 #[doc = "Get enumerated values variant"]
132 #[inline(always)]
133 pub const fn variant(&self) -> Ctimer2ClkEn {
134 match self.bits {
135 false => Ctimer2ClkEn::Disable,
136 true => Ctimer2ClkEn::Enable,
137 }
138 }
139 #[doc = "Disable"]
140 #[inline(always)]
141 pub fn is_disable(&self) -> bool {
142 *self == Ctimer2ClkEn::Disable
143 }
144 #[doc = "Enable"]
145 #[inline(always)]
146 pub fn is_enable(&self) -> bool {
147 *self == Ctimer2ClkEn::Enable
148 }
149}
150#[doc = "Field `CTIMER2_CLK_EN` writer - Enables the CTIMER2 function clock"]
151pub type Ctimer2ClkEnW<'a, REG> = crate::BitWriter<'a, REG, Ctimer2ClkEn>;
152impl<'a, REG> Ctimer2ClkEnW<'a, REG>
153where
154 REG: crate::Writable + crate::RegisterSpec,
155{
156 #[doc = "Disable"]
157 #[inline(always)]
158 pub fn disable(self) -> &'a mut crate::W<REG> {
159 self.variant(Ctimer2ClkEn::Disable)
160 }
161 #[doc = "Enable"]
162 #[inline(always)]
163 pub fn enable(self) -> &'a mut crate::W<REG> {
164 self.variant(Ctimer2ClkEn::Enable)
165 }
166}
167#[doc = "Enables the CTIMER3 function clock\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Ctimer3ClkEn {
171 #[doc = "0: Disable"]
172 Disable = 0,
173 #[doc = "1: Enable"]
174 Enable = 1,
175}
176impl From<Ctimer3ClkEn> for bool {
177 #[inline(always)]
178 fn from(variant: Ctimer3ClkEn) -> Self {
179 variant as u8 != 0
180 }
181}
182#[doc = "Field `CTIMER3_CLK_EN` reader - Enables the CTIMER3 function clock"]
183pub type Ctimer3ClkEnR = crate::BitReader<Ctimer3ClkEn>;
184impl Ctimer3ClkEnR {
185 #[doc = "Get enumerated values variant"]
186 #[inline(always)]
187 pub const fn variant(&self) -> Ctimer3ClkEn {
188 match self.bits {
189 false => Ctimer3ClkEn::Disable,
190 true => Ctimer3ClkEn::Enable,
191 }
192 }
193 #[doc = "Disable"]
194 #[inline(always)]
195 pub fn is_disable(&self) -> bool {
196 *self == Ctimer3ClkEn::Disable
197 }
198 #[doc = "Enable"]
199 #[inline(always)]
200 pub fn is_enable(&self) -> bool {
201 *self == Ctimer3ClkEn::Enable
202 }
203}
204#[doc = "Field `CTIMER3_CLK_EN` writer - Enables the CTIMER3 function clock"]
205pub type Ctimer3ClkEnW<'a, REG> = crate::BitWriter<'a, REG, Ctimer3ClkEn>;
206impl<'a, REG> Ctimer3ClkEnW<'a, REG>
207where
208 REG: crate::Writable + crate::RegisterSpec,
209{
210 #[doc = "Disable"]
211 #[inline(always)]
212 pub fn disable(self) -> &'a mut crate::W<REG> {
213 self.variant(Ctimer3ClkEn::Disable)
214 }
215 #[doc = "Enable"]
216 #[inline(always)]
217 pub fn enable(self) -> &'a mut crate::W<REG> {
218 self.variant(Ctimer3ClkEn::Enable)
219 }
220}
221#[doc = "Enables the CTIMER4 function clock\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Ctimer4ClkEn {
225 #[doc = "0: Disable"]
226 Disable = 0,
227 #[doc = "1: Enable"]
228 Enable = 1,
229}
230impl From<Ctimer4ClkEn> for bool {
231 #[inline(always)]
232 fn from(variant: Ctimer4ClkEn) -> Self {
233 variant as u8 != 0
234 }
235}
236#[doc = "Field `CTIMER4_CLK_EN` reader - Enables the CTIMER4 function clock"]
237pub type Ctimer4ClkEnR = crate::BitReader<Ctimer4ClkEn>;
238impl Ctimer4ClkEnR {
239 #[doc = "Get enumerated values variant"]
240 #[inline(always)]
241 pub const fn variant(&self) -> Ctimer4ClkEn {
242 match self.bits {
243 false => Ctimer4ClkEn::Disable,
244 true => Ctimer4ClkEn::Enable,
245 }
246 }
247 #[doc = "Disable"]
248 #[inline(always)]
249 pub fn is_disable(&self) -> bool {
250 *self == Ctimer4ClkEn::Disable
251 }
252 #[doc = "Enable"]
253 #[inline(always)]
254 pub fn is_enable(&self) -> bool {
255 *self == Ctimer4ClkEn::Enable
256 }
257}
258#[doc = "Field `CTIMER4_CLK_EN` writer - Enables the CTIMER4 function clock"]
259pub type Ctimer4ClkEnW<'a, REG> = crate::BitWriter<'a, REG, Ctimer4ClkEn>;
260impl<'a, REG> Ctimer4ClkEnW<'a, REG>
261where
262 REG: crate::Writable + crate::RegisterSpec,
263{
264 #[doc = "Disable"]
265 #[inline(always)]
266 pub fn disable(self) -> &'a mut crate::W<REG> {
267 self.variant(Ctimer4ClkEn::Disable)
268 }
269 #[doc = "Enable"]
270 #[inline(always)]
271 pub fn enable(self) -> &'a mut crate::W<REG> {
272 self.variant(Ctimer4ClkEn::Enable)
273 }
274}
275impl R {
276 #[doc = "Bit 0 - Enables the CTIMER0 function clock"]
277 #[inline(always)]
278 pub fn ctimer0_clk_en(&self) -> Ctimer0ClkEnR {
279 Ctimer0ClkEnR::new((self.bits & 1) != 0)
280 }
281 #[doc = "Bit 1 - Enables the CTIMER1 function clock"]
282 #[inline(always)]
283 pub fn ctimer1_clk_en(&self) -> Ctimer1ClkEnR {
284 Ctimer1ClkEnR::new(((self.bits >> 1) & 1) != 0)
285 }
286 #[doc = "Bit 2 - Enables the CTIMER2 function clock"]
287 #[inline(always)]
288 pub fn ctimer2_clk_en(&self) -> Ctimer2ClkEnR {
289 Ctimer2ClkEnR::new(((self.bits >> 2) & 1) != 0)
290 }
291 #[doc = "Bit 3 - Enables the CTIMER3 function clock"]
292 #[inline(always)]
293 pub fn ctimer3_clk_en(&self) -> Ctimer3ClkEnR {
294 Ctimer3ClkEnR::new(((self.bits >> 3) & 1) != 0)
295 }
296 #[doc = "Bit 4 - Enables the CTIMER4 function clock"]
297 #[inline(always)]
298 pub fn ctimer4_clk_en(&self) -> Ctimer4ClkEnR {
299 Ctimer4ClkEnR::new(((self.bits >> 4) & 1) != 0)
300 }
301}
302#[cfg(feature = "debug")]
303impl core::fmt::Debug for R {
304 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
305 f.debug_struct("CTIMERGLOBALSTARTEN")
306 .field("ctimer0_clk_en", &self.ctimer0_clk_en())
307 .field("ctimer1_clk_en", &self.ctimer1_clk_en())
308 .field("ctimer2_clk_en", &self.ctimer2_clk_en())
309 .field("ctimer3_clk_en", &self.ctimer3_clk_en())
310 .field("ctimer4_clk_en", &self.ctimer4_clk_en())
311 .finish()
312 }
313}
314impl W {
315 #[doc = "Bit 0 - Enables the CTIMER0 function clock"]
316 #[inline(always)]
317 pub fn ctimer0_clk_en(&mut self) -> Ctimer0ClkEnW<'_, CtimerglobalstartenSpec> {
318 Ctimer0ClkEnW::new(self, 0)
319 }
320 #[doc = "Bit 1 - Enables the CTIMER1 function clock"]
321 #[inline(always)]
322 pub fn ctimer1_clk_en(&mut self) -> Ctimer1ClkEnW<'_, CtimerglobalstartenSpec> {
323 Ctimer1ClkEnW::new(self, 1)
324 }
325 #[doc = "Bit 2 - Enables the CTIMER2 function clock"]
326 #[inline(always)]
327 pub fn ctimer2_clk_en(&mut self) -> Ctimer2ClkEnW<'_, CtimerglobalstartenSpec> {
328 Ctimer2ClkEnW::new(self, 2)
329 }
330 #[doc = "Bit 3 - Enables the CTIMER3 function clock"]
331 #[inline(always)]
332 pub fn ctimer3_clk_en(&mut self) -> Ctimer3ClkEnW<'_, CtimerglobalstartenSpec> {
333 Ctimer3ClkEnW::new(self, 3)
334 }
335 #[doc = "Bit 4 - Enables the CTIMER4 function clock"]
336 #[inline(always)]
337 pub fn ctimer4_clk_en(&mut self) -> Ctimer4ClkEnW<'_, CtimerglobalstartenSpec> {
338 Ctimer4ClkEnW::new(self, 4)
339 }
340}
341#[doc = "CTIMER Global Start Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ctimerglobalstarten::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctimerglobalstarten::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
342pub struct CtimerglobalstartenSpec;
343impl crate::RegisterSpec for CtimerglobalstartenSpec {
344 type Ux = u32;
345}
346#[doc = "`read()` method returns [`ctimerglobalstarten::R`](R) reader structure"]
347impl crate::Readable for CtimerglobalstartenSpec {}
348#[doc = "`write(|w| ..)` method takes [`ctimerglobalstarten::W`](W) writer structure"]
349impl crate::Writable for CtimerglobalstartenSpec {
350 type Safety = crate::Unsafe;
351}
352#[doc = "`reset()` method sets CTIMERGLOBALSTARTEN to value 0"]
353impl crate::Resettable for CtimerglobalstartenSpec {}