mcxa_pac/lptmr0/
csr.rs

1#[doc = "Register `CSR` reader"]
2pub type R = crate::R<CsrSpec>;
3#[doc = "Register `CSR` writer"]
4pub type W = crate::W<CsrSpec>;
5#[doc = "Timer Enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Ten {
9    #[doc = "0: Disable"]
10    Ten0 = 0,
11    #[doc = "1: Enable"]
12    Ten1 = 1,
13}
14impl From<Ten> for bool {
15    #[inline(always)]
16    fn from(variant: Ten) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `TEN` reader - Timer Enable"]
21pub type TenR = crate::BitReader<Ten>;
22impl TenR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Ten {
26        match self.bits {
27            false => Ten::Ten0,
28            true => Ten::Ten1,
29        }
30    }
31    #[doc = "Disable"]
32    #[inline(always)]
33    pub fn is_ten0(&self) -> bool {
34        *self == Ten::Ten0
35    }
36    #[doc = "Enable"]
37    #[inline(always)]
38    pub fn is_ten1(&self) -> bool {
39        *self == Ten::Ten1
40    }
41}
42#[doc = "Field `TEN` writer - Timer Enable"]
43pub type TenW<'a, REG> = crate::BitWriter<'a, REG, Ten>;
44impl<'a, REG> TenW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Disable"]
49    #[inline(always)]
50    pub fn ten0(self) -> &'a mut crate::W<REG> {
51        self.variant(Ten::Ten0)
52    }
53    #[doc = "Enable"]
54    #[inline(always)]
55    pub fn ten1(self) -> &'a mut crate::W<REG> {
56        self.variant(Ten::Ten1)
57    }
58}
59#[doc = "Timer Mode Select\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Tms {
63    #[doc = "0: Time Counter"]
64    Tms0 = 0,
65    #[doc = "1: Pulse Counter"]
66    Tms1 = 1,
67}
68impl From<Tms> for bool {
69    #[inline(always)]
70    fn from(variant: Tms) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `TMS` reader - Timer Mode Select"]
75pub type TmsR = crate::BitReader<Tms>;
76impl TmsR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Tms {
80        match self.bits {
81            false => Tms::Tms0,
82            true => Tms::Tms1,
83        }
84    }
85    #[doc = "Time Counter"]
86    #[inline(always)]
87    pub fn is_tms0(&self) -> bool {
88        *self == Tms::Tms0
89    }
90    #[doc = "Pulse Counter"]
91    #[inline(always)]
92    pub fn is_tms1(&self) -> bool {
93        *self == Tms::Tms1
94    }
95}
96#[doc = "Field `TMS` writer - Timer Mode Select"]
97pub type TmsW<'a, REG> = crate::BitWriter<'a, REG, Tms>;
98impl<'a, REG> TmsW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Time Counter"]
103    #[inline(always)]
104    pub fn tms0(self) -> &'a mut crate::W<REG> {
105        self.variant(Tms::Tms0)
106    }
107    #[doc = "Pulse Counter"]
108    #[inline(always)]
109    pub fn tms1(self) -> &'a mut crate::W<REG> {
110        self.variant(Tms::Tms1)
111    }
112}
113#[doc = "Timer Free-Running Counter\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Tfc {
117    #[doc = "0: Reset when TCF asserts"]
118    Tfc0 = 0,
119    #[doc = "1: Reset on overflow"]
120    Tfc1 = 1,
121}
122impl From<Tfc> for bool {
123    #[inline(always)]
124    fn from(variant: Tfc) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `TFC` reader - Timer Free-Running Counter"]
129pub type TfcR = crate::BitReader<Tfc>;
130impl TfcR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Tfc {
134        match self.bits {
135            false => Tfc::Tfc0,
136            true => Tfc::Tfc1,
137        }
138    }
139    #[doc = "Reset when TCF asserts"]
140    #[inline(always)]
141    pub fn is_tfc0(&self) -> bool {
142        *self == Tfc::Tfc0
143    }
144    #[doc = "Reset on overflow"]
145    #[inline(always)]
146    pub fn is_tfc1(&self) -> bool {
147        *self == Tfc::Tfc1
148    }
149}
150#[doc = "Field `TFC` writer - Timer Free-Running Counter"]
151pub type TfcW<'a, REG> = crate::BitWriter<'a, REG, Tfc>;
152impl<'a, REG> TfcW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "Reset when TCF asserts"]
157    #[inline(always)]
158    pub fn tfc0(self) -> &'a mut crate::W<REG> {
159        self.variant(Tfc::Tfc0)
160    }
161    #[doc = "Reset on overflow"]
162    #[inline(always)]
163    pub fn tfc1(self) -> &'a mut crate::W<REG> {
164        self.variant(Tfc::Tfc1)
165    }
166}
167#[doc = "Timer Pin Polarity\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Tpp {
171    #[doc = "0: Active-high"]
172    Tpp0 = 0,
173    #[doc = "1: Active-low"]
174    Tpp1 = 1,
175}
176impl From<Tpp> for bool {
177    #[inline(always)]
178    fn from(variant: Tpp) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `TPP` reader - Timer Pin Polarity"]
183pub type TppR = crate::BitReader<Tpp>;
184impl TppR {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Tpp {
188        match self.bits {
189            false => Tpp::Tpp0,
190            true => Tpp::Tpp1,
191        }
192    }
193    #[doc = "Active-high"]
194    #[inline(always)]
195    pub fn is_tpp0(&self) -> bool {
196        *self == Tpp::Tpp0
197    }
198    #[doc = "Active-low"]
199    #[inline(always)]
200    pub fn is_tpp1(&self) -> bool {
201        *self == Tpp::Tpp1
202    }
203}
204#[doc = "Field `TPP` writer - Timer Pin Polarity"]
205pub type TppW<'a, REG> = crate::BitWriter<'a, REG, Tpp>;
206impl<'a, REG> TppW<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Active-high"]
211    #[inline(always)]
212    pub fn tpp0(self) -> &'a mut crate::W<REG> {
213        self.variant(Tpp::Tpp0)
214    }
215    #[doc = "Active-low"]
216    #[inline(always)]
217    pub fn tpp1(self) -> &'a mut crate::W<REG> {
218        self.variant(Tpp::Tpp1)
219    }
220}
221#[doc = "Timer Pin Select\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224#[repr(u8)]
225pub enum Tps {
226    #[doc = "0: Input 0"]
227    Tps00 = 0,
228    #[doc = "1: Input 1"]
229    Tps01 = 1,
230    #[doc = "2: Input 2"]
231    Tps10 = 2,
232    #[doc = "3: Input 3"]
233    Tps11 = 3,
234}
235impl From<Tps> for u8 {
236    #[inline(always)]
237    fn from(variant: Tps) -> Self {
238        variant as _
239    }
240}
241impl crate::FieldSpec for Tps {
242    type Ux = u8;
243}
244impl crate::IsEnum for Tps {}
245#[doc = "Field `TPS` reader - Timer Pin Select"]
246pub type TpsR = crate::FieldReader<Tps>;
247impl TpsR {
248    #[doc = "Get enumerated values variant"]
249    #[inline(always)]
250    pub const fn variant(&self) -> Tps {
251        match self.bits {
252            0 => Tps::Tps00,
253            1 => Tps::Tps01,
254            2 => Tps::Tps10,
255            3 => Tps::Tps11,
256            _ => unreachable!(),
257        }
258    }
259    #[doc = "Input 0"]
260    #[inline(always)]
261    pub fn is_tps00(&self) -> bool {
262        *self == Tps::Tps00
263    }
264    #[doc = "Input 1"]
265    #[inline(always)]
266    pub fn is_tps01(&self) -> bool {
267        *self == Tps::Tps01
268    }
269    #[doc = "Input 2"]
270    #[inline(always)]
271    pub fn is_tps10(&self) -> bool {
272        *self == Tps::Tps10
273    }
274    #[doc = "Input 3"]
275    #[inline(always)]
276    pub fn is_tps11(&self) -> bool {
277        *self == Tps::Tps11
278    }
279}
280#[doc = "Field `TPS` writer - Timer Pin Select"]
281pub type TpsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Tps, crate::Safe>;
282impl<'a, REG> TpsW<'a, REG>
283where
284    REG: crate::Writable + crate::RegisterSpec,
285    REG::Ux: From<u8>,
286{
287    #[doc = "Input 0"]
288    #[inline(always)]
289    pub fn tps00(self) -> &'a mut crate::W<REG> {
290        self.variant(Tps::Tps00)
291    }
292    #[doc = "Input 1"]
293    #[inline(always)]
294    pub fn tps01(self) -> &'a mut crate::W<REG> {
295        self.variant(Tps::Tps01)
296    }
297    #[doc = "Input 2"]
298    #[inline(always)]
299    pub fn tps10(self) -> &'a mut crate::W<REG> {
300        self.variant(Tps::Tps10)
301    }
302    #[doc = "Input 3"]
303    #[inline(always)]
304    pub fn tps11(self) -> &'a mut crate::W<REG> {
305        self.variant(Tps::Tps11)
306    }
307}
308#[doc = "Timer Interrupt Enable\n\nValue on reset: 0"]
309#[cfg_attr(feature = "defmt", derive(defmt::Format))]
310#[derive(Clone, Copy, Debug, PartialEq, Eq)]
311pub enum Tie {
312    #[doc = "0: Disable"]
313    Tie0 = 0,
314    #[doc = "1: Enable"]
315    Tie1 = 1,
316}
317impl From<Tie> for bool {
318    #[inline(always)]
319    fn from(variant: Tie) -> Self {
320        variant as u8 != 0
321    }
322}
323#[doc = "Field `TIE` reader - Timer Interrupt Enable"]
324pub type TieR = crate::BitReader<Tie>;
325impl TieR {
326    #[doc = "Get enumerated values variant"]
327    #[inline(always)]
328    pub const fn variant(&self) -> Tie {
329        match self.bits {
330            false => Tie::Tie0,
331            true => Tie::Tie1,
332        }
333    }
334    #[doc = "Disable"]
335    #[inline(always)]
336    pub fn is_tie0(&self) -> bool {
337        *self == Tie::Tie0
338    }
339    #[doc = "Enable"]
340    #[inline(always)]
341    pub fn is_tie1(&self) -> bool {
342        *self == Tie::Tie1
343    }
344}
345#[doc = "Field `TIE` writer - Timer Interrupt Enable"]
346pub type TieW<'a, REG> = crate::BitWriter<'a, REG, Tie>;
347impl<'a, REG> TieW<'a, REG>
348where
349    REG: crate::Writable + crate::RegisterSpec,
350{
351    #[doc = "Disable"]
352    #[inline(always)]
353    pub fn tie0(self) -> &'a mut crate::W<REG> {
354        self.variant(Tie::Tie0)
355    }
356    #[doc = "Enable"]
357    #[inline(always)]
358    pub fn tie1(self) -> &'a mut crate::W<REG> {
359        self.variant(Tie::Tie1)
360    }
361}
362#[doc = "Timer Compare Flag\n\nValue on reset: 0"]
363#[cfg_attr(feature = "defmt", derive(defmt::Format))]
364#[derive(Clone, Copy, Debug, PartialEq, Eq)]
365pub enum Tcf {
366    #[doc = "0: CNR != (CMR + 1)"]
367    Tcf0 = 0,
368    #[doc = "1: CNR = (CMR + 1)"]
369    Tcf1 = 1,
370}
371impl From<Tcf> for bool {
372    #[inline(always)]
373    fn from(variant: Tcf) -> Self {
374        variant as u8 != 0
375    }
376}
377#[doc = "Field `TCF` reader - Timer Compare Flag"]
378pub type TcfR = crate::BitReader<Tcf>;
379impl TcfR {
380    #[doc = "Get enumerated values variant"]
381    #[inline(always)]
382    pub const fn variant(&self) -> Tcf {
383        match self.bits {
384            false => Tcf::Tcf0,
385            true => Tcf::Tcf1,
386        }
387    }
388    #[doc = "CNR != (CMR + 1)"]
389    #[inline(always)]
390    pub fn is_tcf0(&self) -> bool {
391        *self == Tcf::Tcf0
392    }
393    #[doc = "CNR = (CMR + 1)"]
394    #[inline(always)]
395    pub fn is_tcf1(&self) -> bool {
396        *self == Tcf::Tcf1
397    }
398}
399#[doc = "Field `TCF` writer - Timer Compare Flag"]
400pub type TcfW<'a, REG> = crate::BitWriter1C<'a, REG, Tcf>;
401impl<'a, REG> TcfW<'a, REG>
402where
403    REG: crate::Writable + crate::RegisterSpec,
404{
405    #[doc = "CNR != (CMR + 1)"]
406    #[inline(always)]
407    pub fn tcf0(self) -> &'a mut crate::W<REG> {
408        self.variant(Tcf::Tcf0)
409    }
410    #[doc = "CNR = (CMR + 1)"]
411    #[inline(always)]
412    pub fn tcf1(self) -> &'a mut crate::W<REG> {
413        self.variant(Tcf::Tcf1)
414    }
415}
416#[doc = "Timer DMA Request Enable\n\nValue on reset: 0"]
417#[cfg_attr(feature = "defmt", derive(defmt::Format))]
418#[derive(Clone, Copy, Debug, PartialEq, Eq)]
419pub enum Tdre {
420    #[doc = "0: Disable"]
421    Trde0 = 0,
422    #[doc = "1: Enable"]
423    Trde1 = 1,
424}
425impl From<Tdre> for bool {
426    #[inline(always)]
427    fn from(variant: Tdre) -> Self {
428        variant as u8 != 0
429    }
430}
431#[doc = "Field `TDRE` reader - Timer DMA Request Enable"]
432pub type TdreR = crate::BitReader<Tdre>;
433impl TdreR {
434    #[doc = "Get enumerated values variant"]
435    #[inline(always)]
436    pub const fn variant(&self) -> Tdre {
437        match self.bits {
438            false => Tdre::Trde0,
439            true => Tdre::Trde1,
440        }
441    }
442    #[doc = "Disable"]
443    #[inline(always)]
444    pub fn is_trde0(&self) -> bool {
445        *self == Tdre::Trde0
446    }
447    #[doc = "Enable"]
448    #[inline(always)]
449    pub fn is_trde1(&self) -> bool {
450        *self == Tdre::Trde1
451    }
452}
453#[doc = "Field `TDRE` writer - Timer DMA Request Enable"]
454pub type TdreW<'a, REG> = crate::BitWriter<'a, REG, Tdre>;
455impl<'a, REG> TdreW<'a, REG>
456where
457    REG: crate::Writable + crate::RegisterSpec,
458{
459    #[doc = "Disable"]
460    #[inline(always)]
461    pub fn trde0(self) -> &'a mut crate::W<REG> {
462        self.variant(Tdre::Trde0)
463    }
464    #[doc = "Enable"]
465    #[inline(always)]
466    pub fn trde1(self) -> &'a mut crate::W<REG> {
467        self.variant(Tdre::Trde1)
468    }
469}
470impl R {
471    #[doc = "Bit 0 - Timer Enable"]
472    #[inline(always)]
473    pub fn ten(&self) -> TenR {
474        TenR::new((self.bits & 1) != 0)
475    }
476    #[doc = "Bit 1 - Timer Mode Select"]
477    #[inline(always)]
478    pub fn tms(&self) -> TmsR {
479        TmsR::new(((self.bits >> 1) & 1) != 0)
480    }
481    #[doc = "Bit 2 - Timer Free-Running Counter"]
482    #[inline(always)]
483    pub fn tfc(&self) -> TfcR {
484        TfcR::new(((self.bits >> 2) & 1) != 0)
485    }
486    #[doc = "Bit 3 - Timer Pin Polarity"]
487    #[inline(always)]
488    pub fn tpp(&self) -> TppR {
489        TppR::new(((self.bits >> 3) & 1) != 0)
490    }
491    #[doc = "Bits 4:5 - Timer Pin Select"]
492    #[inline(always)]
493    pub fn tps(&self) -> TpsR {
494        TpsR::new(((self.bits >> 4) & 3) as u8)
495    }
496    #[doc = "Bit 6 - Timer Interrupt Enable"]
497    #[inline(always)]
498    pub fn tie(&self) -> TieR {
499        TieR::new(((self.bits >> 6) & 1) != 0)
500    }
501    #[doc = "Bit 7 - Timer Compare Flag"]
502    #[inline(always)]
503    pub fn tcf(&self) -> TcfR {
504        TcfR::new(((self.bits >> 7) & 1) != 0)
505    }
506    #[doc = "Bit 8 - Timer DMA Request Enable"]
507    #[inline(always)]
508    pub fn tdre(&self) -> TdreR {
509        TdreR::new(((self.bits >> 8) & 1) != 0)
510    }
511}
512#[cfg(feature = "debug")]
513impl core::fmt::Debug for R {
514    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
515        f.debug_struct("CSR")
516            .field("ten", &self.ten())
517            .field("tms", &self.tms())
518            .field("tfc", &self.tfc())
519            .field("tpp", &self.tpp())
520            .field("tps", &self.tps())
521            .field("tie", &self.tie())
522            .field("tcf", &self.tcf())
523            .field("tdre", &self.tdre())
524            .finish()
525    }
526}
527impl W {
528    #[doc = "Bit 0 - Timer Enable"]
529    #[inline(always)]
530    pub fn ten(&mut self) -> TenW<'_, CsrSpec> {
531        TenW::new(self, 0)
532    }
533    #[doc = "Bit 1 - Timer Mode Select"]
534    #[inline(always)]
535    pub fn tms(&mut self) -> TmsW<'_, CsrSpec> {
536        TmsW::new(self, 1)
537    }
538    #[doc = "Bit 2 - Timer Free-Running Counter"]
539    #[inline(always)]
540    pub fn tfc(&mut self) -> TfcW<'_, CsrSpec> {
541        TfcW::new(self, 2)
542    }
543    #[doc = "Bit 3 - Timer Pin Polarity"]
544    #[inline(always)]
545    pub fn tpp(&mut self) -> TppW<'_, CsrSpec> {
546        TppW::new(self, 3)
547    }
548    #[doc = "Bits 4:5 - Timer Pin Select"]
549    #[inline(always)]
550    pub fn tps(&mut self) -> TpsW<'_, CsrSpec> {
551        TpsW::new(self, 4)
552    }
553    #[doc = "Bit 6 - Timer Interrupt Enable"]
554    #[inline(always)]
555    pub fn tie(&mut self) -> TieW<'_, CsrSpec> {
556        TieW::new(self, 6)
557    }
558    #[doc = "Bit 7 - Timer Compare Flag"]
559    #[inline(always)]
560    pub fn tcf(&mut self) -> TcfW<'_, CsrSpec> {
561        TcfW::new(self, 7)
562    }
563    #[doc = "Bit 8 - Timer DMA Request Enable"]
564    #[inline(always)]
565    pub fn tdre(&mut self) -> TdreW<'_, CsrSpec> {
566        TdreW::new(self, 8)
567    }
568}
569#[doc = "Control Status\n\nYou can [`read`](crate::Reg::read) this register and get [`csr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
570pub struct CsrSpec;
571impl crate::RegisterSpec for CsrSpec {
572    type Ux = u32;
573}
574#[doc = "`read()` method returns [`csr::R`](R) reader structure"]
575impl crate::Readable for CsrSpec {}
576#[doc = "`write(|w| ..)` method takes [`csr::W`](W) writer structure"]
577impl crate::Writable for CsrSpec {
578    type Safety = crate::Unsafe;
579    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x80;
580}
581#[doc = "`reset()` method sets CSR to value 0"]
582impl crate::Resettable for CsrSpec {}
mcxa_pac/lptmr0/csr.rs

mcxa_pac/lptmr0/
csr.rs
